Datasheet GS74117AX-8I, GS74117AX-8, GS74117AX-7I, GS74117AX-7, GS74117AX-12I Datasheet (GSI)
...Page 1
GS74117AX
FP-BGA
256K x 16
Commercial Temp
Industrial Temp
4Mb Asynchronous SRAM
Features
• Fast access time: 7, 8, 10, 12 ns
• CMOS low power operation: 150/130/105/95 mA at
minimum cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Byte control
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package:
X: 6 mm x 10 mm Fine Pitch Ball Grid Array
package
Description
The GS74117A is a high speed CMOS Static RAM organized
as 262,144 words by 16 bits. Static design eliminates the need
for external clocks or timing strobes. The GS operates on a
single 3.3 V power supply and all inputs and outputs are TTLcompatible. The GS74117A is available in a 6 x 10 mm Fine
Pitch BGA package.
Pin Descriptions
7, 8, 10, 12 ns
3.3 V V
Center VDD and V
Fine Pitch BGA 256K x 16 Bump Configuration
123456
0
ALB
BDQ1UB A
CDQ3DQ2A
DVSSDQ4A
EVDDDQ5NC A16DQ12V
FDQ6DQ7A
GDQ8NC A
HNCA12A
OE A
Package X
6 x 10 mm Bump Pitch
Top View
1
A
A2NC
3
A4CE DQ
5
A6DQ15DQ
17
A7DQ13V
8
A9DQ10DQ
10A11
13A14A15
WE DQ
16
14
DD
SS
11
9
NC
DD
SS
Symbol Description
17
A0–A
DQ
1–DQ16 Data input/output
CE
LB
UB
WE
OE
V
DD
V
SS
NC No connect
Rev: 1.02 10/2002 1/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Address input
Chip enable input
Lower byte enable input
(DQ1 to DQ8)
Upper byte enable input
(DQ9 to DQ16)
Write enable input
Output enable input
+3.3 V power supply
Ground
Page 2
Block Diagram
Truth Table
A
A
CE
WE
OE
UB
LB
0
17
_____
_____
Address
Input
Buffer
Control
Row
Decoder
Memory Array
Column
Decoder
I/O Buffer
DQ
1
DQ
GS74117AX
16
CE OE WE LB UB DQ1 to DQ
H X X X X Not Selected Not Selected ISB1, ISB
L L Read Read
LLH
LXL
L H H X X High Z High Z
L X X H H High Z High Z
Note: X: “H” or “L”
L H Read High Z
H L High Z Read
LL Write Write
L H Write Not Write, High Z
H L Not Write, High Z Write
8
DQ9 to DQ
16
VDD Current
2
DD
I
Rev: 1.02 10/2002 2/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Page 3
Absolute Maximum Ratings
Parameter Symbol Rating Unit
GS74117AX
Supply Voltage V
Input Voltage V
Output Voltage V
DD
IN
OUT
–0.5 to +4.6 V
–0.5 to V
DD
+0.5
(≤ 4.6 V max.)
–0.5 to V
DD
+0.5
(≤ 4.6 V max.)
V
V
Allowable power dissipation PD 0.7 W
Storage temperature T
STG
–55 to 150
o
C
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device
reliability.
Recommended Operating Conditions
Parameter Symbol Min Typ Max Unit
Supply Voltage for -7/-8/-10/-12
Input High Voltage V
Input Low Voltage V
V
DD
IH
IL
3.0 3.3 3.6 V
V
2.0 —
DD
+0.3
–0.3 — 0.8 V
V
Ambient Temperature,
Commercial Range
Ambient Temperature,
Industrial Range
Ac 0—70
T
T
I
A
–40 — 85
o
C
o
C
Notes:
1. Input overshoot voltage should be less than V
+2 V and not exceed 20 ns.
DD
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Rev: 1.02 10/2002 3/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Page 4
GS74117AX
Capacitance
Parameter Symbol Test Condition Max Unit
Input Capacitance C
Output Capacitance C
IN
OUT VOUT = 0 V 7 pF
Notes:
A
1. Tested at T
= 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
IN
V
= 0 V 5 pF
DC I/O Pin Characteristics
Parameter Symbol Test Conditions Min Max
Input Leakage
Current
Output Leakage
Current
Output High Voltage V
Output Low Voltage V
I
IL
I
LO
OH IOH = –4 mA 2.4 —
OL
IN
V
= 0 to V
DD
Output High Z
V
OUT
= 0 to V
LO
I
DD
= +4 mA — 0.4 V
– 1 uA 1 uA
–1 uA 1 uA
Power Supply Currents
Parameter Symbol Test Conditions
CE ≤ VIL
Operating
Supply
Current
Standby
Current
Standby
Current
I
I
I
SB1
SB2
DD
All other inputs
≥ V
IH or ≤ VIL
Min. cycle time
I
OUT = 0 mA
CE ≥ V
All other inputs
≥ V
IH
or ≤V
Min. cycle time
CE ≥ VDD – 0.2 V
All other inputs
≥ V
DD – 0.2 V or ≤ 0.2 V
0 to 70°C –40 to 85°C
Unit
7 ns 8 ns 10 ns 12 ns 7 ns 8 ns 10 ns 12 ns
150 130 105 90 160 140 115 100 mA
IH
IL
28 30 25 22 38 40 35 32 mA
10 20 mA
Rev: 1.02 10/2002 4/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Page 5
AC Test Conditions
Parameter Conditions
Input high level VIH = 2.4 V
Input low level V
IL
= 0.4 V
DQ
Output Load 1
50Ω
GS74117AX
1
30pF
Input rise time tr = 1 V/ns
Input fall time tf = 1 V/ns
Input reference level 1.4 V
Output reference level 1.4 V
Output load Fig. 1& 2
Note:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted.
3. Output load 2 for t
LZ, tHZ, tOLZ and tOHZ
VT = 1.4 V
Output Load 2
DQ
5pF
1
3.3 V
589Ω
434Ω
Rev: 1.02 10/2002 5/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Page 6
AC Characteristics
Read Cycle
GS74117AX
Parameter Symbol
Read cycle time t
Address access time t
Chip enable access time (CE
Byte enable access time (UB
Output enable to output valid (OE
)t
, LB)tAB—3—3.5—4—5ns
)tOE —3—3.5—4—5ns
Output hold from address change t
Chip enable to output in low Z (CE
Output enable to output in low Z (OE
Byte enable to output in low Z (UB
Chip disable to output in High Z (CE
Output disable to output in High Z (OE
Byte disable to output in High Z (UB
)
)
, LB)
)
)
, LB)
-7 -8 -10 -12
Min Max Min Max Min Max Min Max
RC
AA — 7 — 8 — 10 — 12 ns
AC
OH
*
t
LZ
OLZ
t
t
BLZ
*
t
HZ
t
OHZ
t
BHZ
7 — 8 — 10 — 12 — ns
— 7 — 8 — 10 — 12 ns
3—3—3—3—ns
3—3—3—3—ns
*
0—0—0—0—ns
*
0—0—0—0—ns
—3.5—4—5—6ns
*
—3—3.5—4—5 ns
*
—3—3.5—4—5 ns
Unit
* These parameters are sampled and are not 100% tested.
Read Cycle 1: CE = OE = VIL, WE = VIH, UB and, or LB = V
IL
RC
t
Address
tAA
OH
t
Data Out Previous Data Data valid
Rev: 1.02 10/2002 6/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Page 7
GS74117AX
Read Cycle 2: WE = V
Write Cycle
IH
Address
CE
UB, LB
OE
Data Out
High impedance
tLZ
tBLZ
tOLZ
tAA
tAC
tRC
tAB
tOE
tHZ
tBHZ
tOHZ
Data valid
Parameter Symbol
Write cycle time tWC 7 — 8 — 10 — 12 — ns
Address valid to end of write tAW 5 — 5.5 — 7 — 8 — ns
Chip enable to end of write tCW 5 — 5.5 — 7 — 8 — ns
Byte enable to end of write tBW 5 — 5.5 — 7 — 8 — ns
Data set up time tDW 3.5 — 4 — 4.5 — 6 — ns
Data hold time tDH 0 — 0 — 0 — 0 — ns
Write pulse width tWP 5 — 5.5 — 7 — 8 — ns
Address set up time tAS 0 — 0 — 0 — 0 — ns
Write recovery time (WE
Write recovery time (CE
Output Low Z from end of write
Write to output in High Z
* These parameters are sampled and are not 100% tested.
) tWR 0—0—0—0—ns
) tWR10—0—0—0—ns
*
tWLZ
*
tWHZ
-7 -8 -10 -12
Min Max Min Max Min Max Min Max
3—3—3—3—ns
—3—3.5—4—5ns
Unit
Rev: 1.02 10/2002 7/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Page 8
Write Cycle 1: WE control
GS74117AX
tWC
Address
Write Cycle 2: CE control
Address
OE
CE
UB, LB
WE
Data In
Data Out
tAW
tCW
tBW
tAS tWP
tWC
tWR
tDW tDH
Data valid
tWLZtWHZ
High impedance
tAW
OE
tAS tCW
CE
tBW
UB, LB
tWP
WE
tDW tDH
Data In
Data Out
Rev: 1.02 10/2002 8/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Data valid
High impedance
tWR1
Page 9
Write Cycle 3: UB, LB control
Address
GS74117AX
tWC
OE
CE
UB, LB
WE
Data In
Data Out
tAW
tAS tCW
tBW
tWP
tWR1
tDW tDH
Data valid
High impedance
Rev: 1.02 10/2002 9/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Page 10
Package X—6 mm x 10 mm FP-BGA
GS74117AX
Pin A1
Index
A
A1
D
Top View
Side View
aaa
Symbol Unit: mm
A 1.10±0.10
A1 0.20~0.30
f
b
E
c 0.36(TYP)
D 10.0±0.05
D1 5.25
E 6.0±0.05
E1 3.75
e 0.75(TYP)
aaa 0.10
f
0.30~0.40
c
Pin A1
Index
A B C D E F G H
fb
Solder Ball
1
2
3
4
e
E1
5
6
e
D1
Bottom View
Rev: 1.02 10/2002 10/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Page 11
Ordering Information
GS74117AX
Part Number
GS74117AX-7 6 mm x 10 mm BGA 7 ns Commercial
GS74117AX-8 6 mm x 10 mm BGA 8 ns Commercial
GS74117AX-10 6 mm x 10 mm BGA 10 ns Commercial
GS74117AX-12 6 mm x 10 mm BGA 12 ns Commercial
GS74117AX-7I 6 mm x 10 mm BGA 7 ns Industrial
GS74117AX-8I 6 mm x 10 mm BGA 8 ns Industrial
GS74117AX-10I 6 mm x 10 mm BGA 10 ns Industrial
GS74117AX-12I 6 mm x 10 mm BGA 12 ns Industrial
*
Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example:
GS74117AX-8T
*
Package Access Time Temp. Range Status
Rev: 1.02 10/2002 11/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Page 12
4Mb Asynchronous Datasheet Revision History
GS74117AX
Rev. Code: Old;
New
74117A_r1 Format/Content
74117A_r1; 74117A_r1_01 Content
74117A_r1_01; 74117A_r1_02 Content
Types of Changes
Format or Content
Page #/Revisions/Reason
• Creation of new datasheet
• Updated Recommended Operating Conditions table on page 3
• Updated Read Cycle and Write Cycle AC Characteristics tables
• Removed 6 ns speed bin from entire document
Rev: 1.02 10/2002 12/12 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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