Datasheet GS71208TP-8 Datasheet (GSI)

GS71208TP

TSOP

128K x 8

Commercial Temp
Industrial Temp

1Mb Asynchronous SRAM

Features

• Fast access time: 8 ns

• CMOS low power operation: 150 mA at minimum cycle time

• Single 3.3 V ± 0.3 V power supply

• All inputs and outputs are TTL-compatible

• Fully static operation

• Industrial Temperature Option: –40° to 85°C

• Package line up
TP: 400 mil, 32-pin TSOP Type II package

Description

The GS71208 is a high speed CMOS Static RAM organized as
131,072 words by 8 bits. Static design eliminates the need for
external clocks or timing strobes. The GS operates on a single

3.3 V power supply and all inputs and outputs are TTL-com-

patible. The GS71208 is available in a 400 mil TSOP Type-II
package.

Center VDD and V

TSOP-II 128K x 8-Pin Configuration

A3
A2
A1
A0
CE
DQ1
DQ2
V

DD

V

SS

DQ3
DQ4
WE
A16
A15
A14
A13

1
2
3
4
5
6
7

400 mil TSOP II

8
9
10
11
12
13
14
15
16

32-pin

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

8 ns

3.3 V V

A4
A5
A6
A7
OE
DQ8
DQ7
V

SS

V

DD

DQ6
DQ5
A8
A9
A10
A11
A12

DD

SS

Pin Descriptions

Symbol Description

A0–A16 Address input

DQ1–DQ8 Data input/output

CE Chip enable input
WE Write enable input
OE Output enable input

V

DD

V

SS

NC No connect

+3.3 V power supply

Ground

Rev: 1.03 10/2001 1/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Block Diagram

GS71208TP

A0

A16

CE

WE

OE

Address

Input

Buffer

Control

Row

Decoder

Memory Array

Column
Decoder

I/O Buffer

DQ1

DQ8

Truth Table

CE OE WE DQ1 to DQ8

H X X Not Selected ISB1, ISB2

L L H Read

VDD Current

IDDL X L Write

L H H High Z

Note: X: “H” or “L”

Rev: 1.03 10/2001 2/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Absolute Maximum Ratings

Parameter Symbol Rating Unit

Supply Voltage VDD –0.5 to +4.6 V

GS71208TP

Input Voltage VIN

Output Voltage VOUT

Allowable power dissipation PD 0.7 W

Storage temperature TSTG –55 to 150

Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Rec­ommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device
reliability.

–0.5 to V

(≤ 4.6 V max.)

–0.5 to V

(≤ 4.6 V max.)

DD

DD

+0.5

+0.5

V

V

o

C

Recommended Operating Conditions

Parameter Symbol Min Typ Max Unit

Supply Voltage for -8

Input High Voltage VIH 2.0 —

Input Low Voltage VIL –0.3 — 0.8 V

Ambient Temperature,

Commercial Range

V

DD

TAc 0 — 70

3.135 3.3 3.6 V
VDD +0.3

V

o

C

Ambient Temperature,

Industrial Range

Note:

1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns.

2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.

TAI –40 — 85

o

C

Capacitance

Parameter Symbol Test Condition Max Unit

Input Capacitance CIN VIN = 0 V 5 pF

Output Capacitance COUT VOUT = 0 V 7 pF

Notes:

1. Tested at TA = 25°C, f = 1 MHz

2. These parameters are sampled and are not 100% tested.

Rev: 1.03 10/2001 3/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

DC I/O Pin Characteristics

Parameter Symbol Test Conditions Min Max

GS71208TP

Input Leakage

Current

Output Leakage

Current

Output High Voltage VOH IOH = –4mA 2.4 —

Output Low Voltage VOL ILO = +4mA — 0.4 V

IIL

ILO

VIN = 0 to V

Output High Z

VOUT = 0 to V

DD

DD

–1 uA 1 uA

–1 uA 1 uA

Power Supply Currents

Parameter Symbol Test Conditions

CE ≤ VIL

Operating

Supply

Current

IDD (max)

All other inputs

≥ VIH or ≤ VIL

Min. cycle time

IOUT = 0 mA

0 to 70°C –40 to 85°C

8 ns 8 ns

150 mA 160 mA

CE ≥ VIH

Standby

Current

Standby

Current

Rev: 1.03 10/2001 4/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

ISB1 (max)

ISB2 (max)

All other inputs

≥ VIH or ≤VIL

Min. cycle time

CE ≥ VDD – 0.2 V

All other inputs

≥ VDD – 0.2 V or ≤ 0.2 V

55 mA 65 mA

15 mA 25 mA

AC Test Conditions

Parameter Conditions

Input high level VIH = 2.4 V

Input low level VIL = 0.4 V

DQ

Output Load 1

50Ω

GS71208TP

1

30pF

Input rise time tr = 1 V/ns

Input fall time tf = 1 V/ns

Input reference level 1.4 V

Output reference level 1.4 V

Output load Fig. 1& 2

Note:

1. Include scope and jig capacitance.

2. Test conditions as specified with output loading as shown in Fig. 1

unless otherwise noted.

3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ

AC Characteristics

Read Cycle

Parameter Symbol

VT = 1.4 V

Output Load 2

DQ

5pF

Min Max

3.3 V

589Ω

1

434Ω

-8
Unit

Read cycle time tRC 8 — ns

Address access time tAA — 8 ns

Chip enable access time (CE) tAC — 8 ns

Output enable to output valid (OE) tOE — 3.5 ns

Output hold from address change tOH 3 — ns

Chip enable to output in low Z (CE)

Output enable to output in low Z (OE)

Chip disable to output in High Z (CE)

Output disable to output in High Z (OE)

* These parameters are sampled and are not 100% tested

Rev: 1.03 10/2001 5/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

tLZ

tOLZ

tHZ

tOHZ

*

*

*

*

3 — ns

0 — ns

— 4 ns

— 3.5 ns

GS71208TP

Read Cycle 1: CE = OE = VIL, WE = V

Address

Data Out Previous Data Data valid

Read Cycle 2: WE = V

IH

Address

CE

OE

Data Out

IH

High impedance

tOH

tLZ

tAA

tOLZ

tAC

tAA

tRC

tRC

tOE

tHZ

tOHZ

DATA VALID

Rev: 1.03 10/2001 6/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Write Cycle

GS71208TP

Parameter Symbol

Write cycle time tWC 8 — ns

Address valid to end of write tAW 5.5 — ns

Chip enable to end of write tCW 5.5 — ns

Data set up time tDW 4 — ns

Data hold time tDH 0 — ns

Write pulse width tWP 5.5 — ns

Address set up time tAS 0 — ns

Write recovery time (WE) tWR 0 — ns

Write recovery time (CE) tWR1 0 — ns

Output Low Z from end of write

Write to output in High Z

* These parameters are sampled and are not 100% tested

tWLZ

tWHZ

-8

Min Max

*

*

3 — ns

— 3.5 ns

Unit

Rev: 1.03 10/2001 7/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Write Cycle 1: WE control

Address

GS71208TP

tWC

CE

WE

Data In

Data Out

Write Cycle 2: CE control

Address

OE

CE

OE

tAW

tCW

tAS tWP

tWC

tAW

tAS tCW

tWR

tDW tDH

DATA VALID

tWLZtWHZ

HIGH IMPED ANCE

tWR1

tWP

WE

tDW tDH

Data In

Data Out

DATA VALID

HIGH IMPED ANCE

Rev: 1.03 10/2001 8/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

32-Pin TSOP-II, 400mil

GS71208TP

Dimension in inch Dimension in mm

min nom max min nom max

32

D

c

Symbol

A 0.039 — 0.05 — — 1.27

A1 0.002 — 0.006 0.01 — 0.15

E1

E

A

A2 0.037 0.040 0.045 0.90 1.02 1.14

b 0.012 0.016 0.018 0.30 0.40 0.45

c 0.0047 0.0051 0.0062 0.12 0.13 0.16

1

e

b

ZD

A2

A

A1

y

L

D 0.820 0.825 0.830 20.82 20.95 21.08

ZD — 0.037 — — 0.95 —

E 0.455 0.463 0.471 11.56 11.76 11.96

E1 0.395 0.400 0.405 10.03 10.16 10.29

e — 0.05 — — 1.27 —

L1

L 0.017 0.020 0.023 0.40 0.50 0.60

L1 0.024 0.031 0.039 0.60 0.80 1.00

Q

Detail A

y 0.00 — 0.003 0.00 — 0.76

Q

o

0

—

o

5

o

0

—

5

o

Note:

1.Dimension D includes mold flash, protrusions or gate burrs.

2. Dimension E does not include interlead flash.

3. Controlling dimension: mm

Rev: 1.03 10/2001 9/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Ordering Information

GS71208TP

Part Number

GS71208TP-8 400 mil TSOP-II 8 ns Commercial

*

Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example:

GS71208TP-8T

*

Package Access Time Temp. Range Status

Rev: 1.03 10/2001 10/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Revision History

GS71208TP

Rev. Code: Old;

New

1.00 12/1999/1.01 12/1999 Content
GS71208Rev1.01 12/1999KRev

1.01 2/2000L

71208_r1_01; 71208_r1_02 Format/Content

71208_r1_02; 71208_r1_03 Content

Types of Changes

Format or Content

Format/Content

Page #/Revisions/Reason

1. Added TP package to 71208

• GSI LogoAdded Dimension D to 32 pin 400 ml TSOP II Package.

• Updated format to comply with Technical Publications standard

• Specifically noted that numbers in Power Supply Currents table are worst
case scenario

• Removed all references to other parts except 71208TP-8

Rev: 1.03 10/2001 11/11 © 1999, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.