z 3A Output Current
z Wide 4.5V to 27V Operating Input Range
z Integrated 100mΩ Power MOSFET Switches
z Output Adjustable from 0.925V to 24V
z Up to 96% Efficiency
z Programmable Soft-Start
z Stable with Low ESR Ceramic Output Capacitors
z Fixed 400KHz Frequency
z Cycle-by-Cycle Over Current Protection
z Input Under Voltage Lockout
z SOP8L-EP Package
TYPICAL APPLICATION
z Distributed Power Systems
z Networking Systems
z FPGA, DSP, ASIC Power Supplies
z Green Electronics/ Appliances
z Notebook Computers
GENERAL DESCRIPTION
The LSP5503 is a monolithic synchronous buck
regulator. The device integrates 100m MOSFETS
that provide 3A continuous load cur-rent over a wide
operating input voltage of 4.5V to 27V. Current mode
control provides fast transient response and
cycle-by-cycle cur-rent limit.
An adjustable soft-start prevents inrush current at turn
on. In shutdown mode, the supply cur-rent drops
below 1µA.
This device, available in an SOP8L-EP package,
provides a very compact system solution with minimal
reliance on external components.
PIN ASSIGNMENT
(Top View)
PIN DESCRIPTION
Name No. Description
BS 1
IN 2
SW 3 Switch Output. Connect this pin to the switching end of the inductor.
G 4 Ground.
FB 5
COMP 6
EN 7
SS 8
Bootstrap. This pin acts as the positive rail for the high-side switch’s gate driver.
Connect a 0.1uF capacitor between BS and SW.
Input Supply. Bypass this pin to G with a low ESR capacitor. See Input Capacitor
in the Application Information section.
Feedback Input. The voltage at this pin is regulated to 0.925V. Connect to the
resistor divider between output and ground to set output voltage.
Compensation Pin. See Stability Compensation in the Application Information
section.
Enable Input. When higher than 2.5V, this pin turns the IC on. When lower than
1.3V, this pin turns the IC off. Output voltage is discharged when the IC is off. This
pin should not be left open.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from
SS to GND to set the soft-start period. A 0.1µF capacitor sets the soft-start period
to 15ms. To disable the soft-start feature, leave SS unconnected.
LSP5503 Rev. 1.3 1 of 10 2009/09
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LSP5503
3A Synchronous Step Down DC/DC Converter
ABSOLUTE MAXIMUM RATINGS
Parameter Value Unit
IN Supply Voltage -0.3 to 30 V
SW Voltage -1 to VIN + 0.3 V
BS Voltage VSW – 0.3 to VSW + 6 V
EN, FB, COMP Voltage -0.3 to 6 V
Continuous SW Current Internally limited A
Junction to Ambient Thermal Resistance (JA)
(Test on Approximately 3 in
2
Copper Area 1OZ copper FR4 board)
Junction to Ambient Case Resistance (JC) 10 °C/W
Maximum Power Dissipation 1.8 W
Operating Junction Temperature -40 to 150 °C
Storage Temperature -55 to 150 °C
Lead Temperature (Soldering, 10 sec) 300 °C
(
Note: Exceeding these limits may damage the device. Exposure to absolute maximum rating conditions for long
periods may affect device reliability.)
ELECTRICAL CHARACTERISTICS
(V
= 12V, TA= 25°C unless otherwise specified.)
IN
Parameter SymbolTest Conditions Min. Typ. Max. Unit
High-Side Switch Leakage VEN = 0V, VSW = 0V 9 10 µA
Upper Switch Current Limit 3.5 4.0 A
Lower Switch Current Limit 0.9 A
COMP to Current Limit
Transconductance
Error Amplifier Transconductance GEA I
Error Amplifier DC Gain A
5.2 A/V
G
COMP
= ±10µA 800 µA/V
COMP
480 V/V
VEA
Switching Frequency fSW 350 400 470 kHz
Short Circuit Switching Frequency VFB = 0 150 kHz
Maximum Duty Cycle D
V
MAX
= 0.8V 90 %
FB
Minimum On Time 220 nS
EN Shutdown Threshold Voltage VEN Rising 1.1 1.3 1.5 V
EN Shutdown Threshold Voltage
Hys-terisis
200 mV
EN Lockout Threshold Voltage 2.2 2.5 2.7 V
EN Lockout Hysterisis 210 mV
Supply Current in Shutdown VEN = 0 0.3 3.0 µA
IC Supply Current in Operation VEN = 3V, VFB = 1.0V 1.4 1.5 mA
Input UVLO Threshold Rising UVLO VEN Rising3.80 4.05 4.40 V
Input UVLO Threshold Hysteresis 210 mV
Soft-start Current VSS = 0V 12 µA
Soft-start Period CSS = 0.1µF 10 mS
Thermal Shutdown Temperature Hysteresis = 10°C 160 °C
50 °C/W
mΩ
mΩ
LSP5503 Rev. 1.3 2 of 10 2009/09
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LSP5503
3A Synchronous Step Down DC/DC Converter
FUNCTIONAL BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION
The LSP5503 is a synchronous rectified, cur-rent-mode, step-down regulator. It regulates in-put voltages from 4.5V
to 23V down to an out-put voltage as low as 0.925V, and supplies up to 3A of load current.
The LSP5503 uses current-mode control to regulate the output voltage. The output voltage is measured at FB
through a resistive voltage divider and amplified through the internal trans-conductance error amplifier. The voltage
at the COMP pin is compared to the switch current
measured internally to control the output voltage.
The converter uses internal N-Channel MOSFET switches to step-down the input voltage to the regulated output
voltage. Since the high side MOSFET requires a gate voltage greater than the input voltage, a boost capacitor
connected between SW and BS is needed to drive the high side gate. The boost capacitor is charged from the
internal 5V rail when SW is low.
When the LSP5503 FB pin exceeds 20% of the nominal regulation voltage of 0.925V, the over volt-age comparator
is tripped and the COMP pin and the SS pin are discharged to GND, forcing the high-side switch off.
LSP5503 Rev. 1.3 3 of 10 2009/09
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LSP5503
3A Synchronous Step Down DC/DC Converter
APPLICATION INFORMATION
Output Voltage Setting
Figure1. Output Voltage Setting
Figure 1 shows the connections for setting the output voltage. Select the proper ratio of the two feedback resistors
RFB1 and RFB2 based on the output voltage. Typically, use RFB2 10k and determine RFB1 from the following
equation:
(1)
Inductor Selection
The inductor maintains a continuous current to the output load. This inductor current has a ripple that is dependent
on the inductance value: higher inductance reduces the peak-to-peak ripple current. The trade off for high
inductance value is the increase in inductor core size and series resistance, and the reduction in current handling
capability. In general, select an inductance value L based on the ripple current requirement:
)VV(V
L−•=
where V
is the input voltage, V
IN
output current, and K
ripple current being 30% of the maximum output current.
With this inductor value, the peak inductor current is I
is less that the 4A current limit. Finally, select the inductor core size so that it does not saturate at 4A. Typical
inductor values for various output voltages are shown in Table 1.
Input Capacitor
The input capacitor needs to be carefully selected to maintain sufficiently low ripple at the supply input of the
converter. A low ESR capacitor is highly recommended. Since large current flows in and out of this capacitor during
switching, its ESR also affects efficiency.
The input capacitance needs to be higher than 10µF. The best choice is the ceramic type; however, low ESR
tantalum or electrolytic types may also be used provided that the RMS ripple current rating is higher than 50% of the
output current. The input capacitor should be placed close to the IN and G pins of the IC, with the shortest traces
possible. In the case of tantalum or electrolytic types, they can be further away if a small parallel 0.1µF ceramic
capacitor is placed right next to the IC.
KIfV
OUTINOUT
RIPPLEOUT M AXSWIN
(2)
is the output voltage, fSW is the switching frequency, I
OUT
is the ripple factor. Typically, choose K
RIPPLE
OUT
V
1.0V 1.2V 1.5V 1.8V 2.5V 3.3V5V
OUT
L 4.7uH 4.7uH 4.7uH 4.7uH 6.8µH 6.8µH 10µH
Table 1. Typical Inductor Values
• (1 + K
is the maximum
OUTMAX
= 30% to correspond to the peak-to-peak
RIPPLE
/ 2). Make sure that this peak inductor current
RIPPLE
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LSP5503
3A Synchronous Step Down DC/DC Converter
Output Capacitor
The output capacitor also needs to have low ESR to keep low output voltage ripple. The output ripple voltage is:
RKIV=
ESRRIPPLEOUTMAXRIPPLE
where I
is the maximum output current, K
OUTMAX
is the switching frequency, L is the inductor value, and C
+
capacitors, R
is very small and does not contribute to the ripple. Therefore, a lower capacitance value can be
ESR
used for ceramic capacitors. In the case of tantalum or electrolytic capacitors, the ripple is dominated by R
multiplied by the ripple current. In that case, the output capacitor is chosen to have sufficiently low ESR.
For ceramic output capacitors, typically choose a capacitance of about 22µF. For tantalum or electrolytic capacitors,
choose a capacitor with less than 50m ESR.
Optional Schottky Diode
During the transition between high-side switch and low-side switch, the body diode of the low side power MOSFET
conducts the inductor current. The forward voltage of this body diode is high. An optional Schottky diode may be
paralleled between the SW pin and GND pin to improve overall efficiency. Table 2 lists example Schottky diodes and
their Manufacturers.
Stability Compensation
C
The feedback loop of the IC is stabilized by the components at the COMP pin, as shown in Figure 2. The DC loop
gain of the system is determined by the following equation:
IN
2
LCf28V•
SW
is needed only for high ESR output capacitor
COMP2
OUT
(3)
is the ripple factor, R
RIPPLE
is the output capacitance. In the case of ceramic output
OUT
Figure 2. Stability Compensation
is the ESR of the output capacitor, fSW
ESR
ESR
(4)
The dominant pole P1 is due to C
G
f=
1P
EA
CAπ2
COMPVEA
(5)
COMP
:
The second pole P2 is the output pole:
I
f=
2P
The first zero Z1 is due to R
f=
1Z
And finally, the third pole is due to R
f=
3P
LSP5503 Rev. 1.3 5 of 10 2009/09
OUT
CVπ2
OUTOUT
(6)
COMP
and C
COMP
:
1
CRπ2
COMPCOMP
(7)
COMP
and C
COMP2
(if C
COMP2
is used):
1
CRπ2
2COMPCOMP
(8)
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LSP5503
3A Synchronous Step Down DC/DC Converter
The following steps should be used to compensate the IC:
STEP1. Set the crossover frequency at 1/10 of the switching frequency via RCOMP:
(9)
but limit RCOMP to 10k maximum.
STEP2. Set the zero fZ1 at 1/4 of the crossover frequency. If RCOMP is less than 10k, the equation for CCOMP is:
5
−
×
COMP
=
C
If RCOMP is limited to 10k, then the actual crossover frequency is 10/ (VOUTCOUT). Therefore:
COMP
STEP3. If the output capacitor’s ESR is high enough to cause a zero at lower than 4 times the crossover frequency,
an additional compensation capacitor CCOMP2 is required. The condition for using CCOMP2 is:
R
ESRCOUT
R
≥
108.1
COMP
×=
Min
)F(
(10)
5
−
⎛
⎜
⎜
⎝
OUTOUT
6
−
101.1
×
C
OUT
)F(CV102.1C
(11)
⎞
OUT
⎟
⎟
⎠
•
Ω
)(V012.0,
(12)
And the proper value for C
RC
C=
2COMP
Though C
COMP2
ESRCOUTOUT
R
COMP
is unnecessary when the output capacitor has sufficiently low ESR, a small value C
is:
COMP2
(13)
100pF may improve stability against PCB layout parasitic effects.
Table 3 shows some calculated results based on the compensation method above.