The GL816 is a highly integrated, flexible application USB 2.0 Multi-Interface
Flash Card Reader controller. It supports USB 2.0 high-speed transmission to
PCMCIA, CompactFlash
TM
(SD), Multi Media Card
TM
(CF), Micro Drive, SmartMedia
TM
(MMC), and MemoryStick
chip. Besides the flash card interface controller each, the GL816 integrates
Genesys Logic own design USB 2.0 high-speed UTMI (USB 2.0 Transceiver Macrocell Interface) transceiver. As a single chip solution for USB 2.0 multi flash
card reader, the GL816 complies with Universal Serial Bus specification rev. 2.0,
USB Storage Class specification ver.1.0, and flash card interface specification
each.
TM
(SM), Secure Digital
TM
(MS) interface on one
The GL816 can support different kinds of multi-interface combinations. For the
best performance consideration, the GL816 integrates high efficiency card
interface hardware engine for data transfer, and the 48MHz feature-enhanced
8051 micro-controller. The GL816 also supports firmware upgrade via USB
interface, and external flash read/ write for firmware upgrade and other
applications. With the advanced mobile consideration in the IA application, the
GL816 can support Inter-Media transfer, it means that the data transfer between
different cards doesn’t need the support of USB host in PC system.
The GL816 equips dedicated power control pins for different cards and power /
busy indication. And the pin assignment design fits to card sockets to provide
easier PCB layout. With 8 additional GPIOs, and firmware controllable CD, CE
pins, the GL816 can be programmed to fit your various design in USB 2.0 high
speed multi-interface flash card reader applications.
Complies with 480Mbps Universal Serial Bus specification rev. 2.0.
Complies with USB Storage Class specification rev. 1.0. (Bulk only protocol).
Operating System supported: Win XP/ 2000/ Me/ 98/ 98SE; Mac OS 9.x/ X.
Supports 1 device address and up to 10 endpoints: Control (0)/ Bulk Read (1)/ Bulk
Integrated USB 2.0 Transceiver Macrocell Interface (UTMI) transceiver and Serial
Interface Engine (SIE).
Integrated 8051 micro-controller with enhanced feature:
- Supports 48MHz clock rate.
TM
(SM), MemoryStick
TM
(MMC) interface on one chip.
- 12 clocks per instruction cycle.
- Embedded 24KB Mask ROM and 2KB+256B SRAM.
- Supports external 64KB ROM/ Flash for design flexibility.
Supports firmware upgrade via USB interface.
Supports external flash read/ write for firmware upgrade and other applications.
Supports serial EEPROM 93C86 interface for the flexibility of vendor or firmware
parameters, EEPROM size up to 2KB.
High efficiency card interface hardware engine for data transfer.
Shared pins between PCMCIA and SmartMedia
TM
interface.
PCMCIA interface:
- Supports address up to 16 bits, with fix and incremental mode.
- Supports 8 / 16 bit data mode and different timing.
- Supports WAIT# detection.
- Supports multi signal level (3.3 / 5V).
- Other control signals like CD1#, CD2#, CE1#, CE2# … etc.
SmartMedia
TM
interface:
- Supports address up to 4 bytes, 8 bit data width and different speed.
- Supports different page size, and automatic append redundant area data (8/16
- Complies with MemoryStick interface specification.
- Supports hardware BS/SDIO/SCLK signals.
- Supports INS signal.
- Supports automatic CRC16 generation and verification.
- Supports hardware CMD timeout detection.
- Supports different clock rate up to 24 MHz.
Secure Digital
TM
/ Multi Media CardTM interface
- Complies with Secure Digital / MMC interface specification.
- Supports both SD / MMC mode access: CLK/CMD/DAT0/DAT1/DAT2/DAT3.
- Command transmit and response receive can be enabled separately.
- Automatic CRC7 generation for command and CRC7 verification for response on
CMD.
- Supports automatic CRC16 generation and verification on DAT3-0.
- In addition to full packet transaction, optional single byte/ bit operation on both
CMD and DAT line/ lines.
- Data processing in block or byte.
- Supports different clock rate from 375 KHz to 24 MHz
.
Dedicated power control pins for different cards and power / busy indication.
Build-in power-on reset (POR) and low-voltage detector (LVD).
3.3 Volt operation.
Pin assignment fits to card sockets to provide easier PCB layout.
Supports 8 additional GPIOs and firmware controllable CD, CE pins.
The USB 2.0 Transceiver Macrocell, it’s the analog circuitry that handles the low
level USB protocol and signaling, and shifts the clock domain of the data from the
USB 2.0 rate to one that is compatible with the general logic.
3.2.2 SIE
The Serial Interface Engine, which contains the USB PID and address recognition
logic, and other sequencing and state machine logic to handle USB packets and
transactions.
3.2.3 EP0 FIFO
It is composed of TX0FIFO and RX0FIFO, with 64-byte FIFO each, and it is used for
endpoint 0 data transfer.
3.2.4 EP3 FIFO
It’s an 8-byte FIFO for endpoint 3.
3.2.5 Bulk FIFO
It is composed of TXFIFO and RXFIFO for data transmission and receiving
respectively, also with different modes support:
3.2.5.1 TXFIFO:
1. To ensure the continuous data transmission, TXFIFO includes 512 bytes
DATA-A FIFO, 512 bytes DATA-B FIFO, and two 16 bytes corresponding
redundant areas. All can be directly accessed by 8051 µC.
2. Normally SIE popes data, MHE pushes data for DATA A/B FIFOs, and
redundant area is pushed by MHE when SmartMedia MIF is enabled and
popped by uC.
3. Supports uC single byte access for SmartMedia ECC error correction.
4. At transmit mode SIE won’t transmit data filled in TXFIFO before uC complete
the data integrity checking.
3.2.5.2 RXFIFO:
1. To ensure the continuous data transmission, RXFIFO includes 512 bytes
DATA-A FIFO, 512 bytes DATA-B FIFO, and 16 bytes single redundant area. All
can be directly accessed by 8051 µC.
2. Normally MHE popes data, SIE pushes data for DATA A/B FIFOs, and
redundant area is pushed by uC and popped by MHE when SmartMedia MIF is
enabled.
3.2.5.3 Buffer Mode:
1. Buffer mode is enabled by firmware and is used to copy data block from source
to destination in same card for SmartMedia or MemoryStick applications.
2. Under Buffer mode, firmware can enable MIF to read source data block to
TXFIFO, check the data integrity, then enable MIF to write data in TXFIFO to
destination data block space on memory card.
3. For SmartMedia application, the redundant data write to destination data block
space is from redundant area of RXFIFO.
3.2.6 MHE (Media Hardware Engine)
The Media Hardware Engine contains 4 MIF (Media Interface), MHE control and
MCFIFO.
3.2.6.1 MIF (Media Interface):
There are PCMCIA MIF, SmartMedia MIF, MemoryStick MIF, and Secure Digital/
Multi Media Card MIF in MHE.
3.2.6.2 MCFIFO (Media Control FIFO):
It’s a 64-byte FIFO that shared by MemoryStick and SD/ MMC MIF. In MemoryStick
application, the MCFIFO is used for register read and write function; In SD/ MMC
application, it is used for command and response.
13 D14 B PCMCIA data 14
14 PCCE1# B/O PCMCIA CE1# pu
15 D15 B PCMCIA data 15
16 A10 O PCMCIA address 10
17 PCCE2# B/O PCMCIA CE2# pu
18 OE# O PCMCIA OE#
PCMCIA VS1#
19 PCVS1# B/I
ATAPI DMARQ
20 PVIO1 P Power (5 / 3.3V) for pin 3-24
21 A11 O PCMCIA address 11
PCMCIA IOR# /
22 IOR# / RE# O
SmartMedia RE#
23 A9 O PCMCIA address 9
PCMCIA IOW# /
24 IOW# / WR# O
SmartMedia WR#
25 RPU A USB resistor pull up
26 AVDD1 P Analog VDD #1
27 VPF B FS D+
28 VPH B HS D+
29 VMF B FS D-
30 VMH B HS D-
31 AGND1 P Analog GND #1
32 RREF A Reference resistor
33 AVDD2 P Analog VDD #2
34 XI I Crystal input
35 XO B Crystal input
36 AGND2 P Analog GND #2
64 DVDD2 P Digital VDD #2
65 WPD# B/I SD/MMC Write Protect Detect pu
66 GPIO1 B GPIO1 odpu
67 GPIO2 B GPIO2 odpu
68 NVMA1 O Ext. flash address 1
69 NVMA0 O Ext. flash address 0
70 NVMCS# O Ext. flash CS# pu
71 GPIO3 B GPIO3 odpu
72 GPIO4 B GPIO4 odpu
73 PWR33CB O Card 3.3V power control pd
74 EXTRST# I External reset pu
75 PWRIND O Power indicator pd
76 BSYIND O Busy indicator pd
77 DGND1 P Digital GND #1 pu
78 PGND2 P Pad GND #2
79 PCCD2# B/I PCMCIA CD2#
80 D10 B PCMCIA data 10
111 NVMOE# O Ext. flash OE#
112 NVMWE# O Ext. flash WE#
113 CS O 93C86 CS
114 SK O 93C86 Clock
115 DI O 93C86 Data in
116 DO I/SO 93C86 Data out pd
117 NVMD0 B Ext. flash Data 0 pd
118 NVMD1 B Ext. flash Data 1 pd
119 NVMD2 B Ext. flash Data 2 pd
120 NVMD3 B Ext. flash Data 3 pd
121 GPIO7 B GPIO7 odpu
122 DVDD3 P Digital VDD #3
123 NVMD4 B Ext. flash Data 4 pd
124 NVMD5 B Ext. flash Data 5 pd
125 NVMD6 B Ext. flash Data 6 pd
126 NVMD7 B Ext. flash Data 7 pd
127 BS O MemoryStick BS
128 SDIO B MemoryStick SDIO pd
Notation:
Description
Note
O Output
I Input
B Bi-directional
B/I Bi-directional, default input
B/O Bi-directional, default output
P Power
A Analog
SO Automatic output low when suspend
TA (Ambient Temperature under bias) 0°C to 70°C
Supply Voltage +3.0V to +3.6V
Ground Voltage 0V
F
12 MHz ± 100ppm
OSC
5.2 DC Characteristics
ParameterDescription Condition Min. Typ. Max. Unit
VCC Supply Voltage 3.0 3.6 V
VIH Input High Voltage 2.6 5 V
VIL Input Low Voltage 0.0 0.7 V
II Input Leakage current 0 < VIN < VCC µA
VOH Output High Voltage 3.0 V
VOL Output Low Voltage 0.2 V
IOH Output Current High mA
IOL Output Current Low mA
CIN Input Pin Capacitance 2.0 pF
I
Suspend current
SUSP
ICC Supply current
1.5K external
pull-up included
Connect to USB
with 8051 operating
µA
mA
5.3 AC Electrical Characteristics
5.3.1 UTMI Transceiver
The GL816 is fully compatible with Universal Serial Bus specification rev. 2.0 and
USB 2.0 Transceiver Macercell Interface (UTMI) specification rev. 1.01. Please
refer to the specifications for more information.