Datasheets FX465 Datasheet

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Page 1

Features

CML Semiconductor Products

PRODUCT INFORMATION

Extended Code CTCSS

FX465

Encoder/Decoder

Publication D/465/2 May 1996

Advance Information

Applications

Low-Voltage (3-Volt) Supply 47 Programmable Sub-Audio

Tones + N OTONE Meets MPT1306 and TIA/EIA 603 High Voiceband/CTCSS Isolation Separate Sub-Audio and Rx/Tx

Audio Paths and Filtering

CLKS

CLKS/XTAL

A0 - A5

D0 - D10

TONE DECODE

FILTER

TONE IN

LOAD/LATCH D5/SERIAL ENABLE D4/SERIAL ENABLE D3/SERIAL DATA IN D2/SERIAL CLOCK D1 D0 RX/TX PTL XTAL/CLOCK

XTAL

TONE IN

TONE

FILTER

CLKS

DIGITAL

INTERFACE

AND

CLOCK

GENERATION

TONE DETECT

LOGIC

TONE OUT FILTER

TONE

ROM

48 x 10

Mobile Radio Systems Community Base Stations “Sports Radio” (Japan) Sub-Audio Signalling and

Selective Calling Status and Alarm Systems Amateur Radio

REFERENCE VOLTAGE

Rx TONE DETECT

Tx TONE OUT

BIAS

FX465

TX AUDIO IN

RX AUDIO IN

DECODE COMPARATOR REF

DECODE COMPARATOR IN

CLK

AUDIO FILTER

Fig.1 Functional Block Diagram

Brief Description

The FX465 is a 3-volt, half-duplex predictive Continuous Tone Controlled Squelch System (CTCSS) encoder/decoder microcircuit. The FX465 has integral voice-band filtering for prefiltering of Tx audio and the rejection of the CTCSS tone in receive.

Under µProcessor control, the FX465 will encode and decode any one of 47 sub-audio frequencies (+NOTONE) in the range 67.0Hz to 254.1Hz. Tone frequencies and all functional commands can be loaded to the device in either pin-selectable 8-bit parallel or serial format.

A separate, Rx/Tx voice-audio path is available with a highpass (sub-audio reject) filter automatically placed in the relevant Rx or Tx voice line.

Tx AUDIO OUT

Rx AUDIO OUT

Rx TONE DECODE

New SSOP D5 package

The Rx sub-audio (CTCSS) path contains a (selected tone frequency) bandpass filter and period detector providing a logic level output (Rx Tone Detect) to indicate a successful decode operation.

Rx “Press to Listen” (PTL) and Tx “Squelch-Tail Elimination” functions are available in both command loading modes. The squelch-tail elimination function will provide (Tx tone) phase-reversal to minimise the annoying audio outputs that occur at the receiver on completion of a transmission.

Tone frequencies and filter accuracies are maintained by an on-chip 4.0MHz clock oscillator employing an external crystal or clock pulse input.

The FX465, which exhibits high audio and sub-audio performance with low falsing, is available in a 24-pin plastic small outline SSOP package.

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Pin Number Function

FX465 D5

VDD: Positive supply.

Xtal/CIock: Input to the on-chip inverter; used with a 4.0MHz Xtal or external clock source.

Xtal: Output of the on-chip inverter (clock output).

Load/Latch: Controls 8 on-chip latches and is used to latch Rx/Tx, PTL, D0 - D5. This pin is internally

pulled to VDD. A logic ‘1’ applied to this input puts the 8 latches into a 'transparent' mode. A logic ‘0’ applied to this input puts the 8 latches into the ‘latched’ mode. In parallel mode data is loaded and latched by a logic ‘1’ to ‘0’ transition (see Figure 4). In serial mode data is loaded and latched by a ‘0’ to ‘1’ to ‘0’ strobe pulse on this pin (see Figure 4).

D5/Serial Enable: Data input D5 (Parallel Mode); Serial Enable (Serial Mode). A logic ‘l’ applied to this input, together with a logic ‘0’ applied to D4/Serial Enable, will put the device into 'Serial Mode' (see Figure 4). This pin is internally pulled to VDD.

D4/Serial Enable: Data input D4 (Parallel Mode); Serial Enable (Serial Mode). A logic ‘0’ applied to this input, together with a logic ‘1’ applied to D5/Serial Enable, will place the device into ‘Serial Mode’ (see Figure 4). This pin internally pulled to VDD.

D3/Serial Data In: Data input D3 (Parallel Mode); Serial Data Input (Serial Mode).

In Serial Mode this pin becomes the serial data input for D5 - D0, Rx/Tx, PTL (see Figure 4). D5 is clocked-in first and PTL last. This pin internally pulled to VDD.

D2/Serial Clock: Data input D2 (Parallel Mode); Serial Clock Input (Serial Mode). In Serial Mode this pin becomes the Serial Clock input. Data is clocked on the positive-going edge (see Figure 4). This pin is internally pulled to VDD.

D1: Data input D1 (Parallel Mode); Not used (Serial Mode). This pin is internally pulled to VDD.

D0: Data input D0 (Parallel Mode); Not used (Serial Mode). This pin is internally pulled to VDD.

VSS: Negative supply.

Decode Comparator Ref. (I/P): Internally biased to VDD/3 or 2VDD/3 via 1.0MΩ resistors depending on

the logical state of the Rx Tone Decode pin. Rx Tone Decode = logic ‘1’ will bias this input to 2VDD/3, a logic ‘0’ will bias this input to VDD/3. This input provides the decode comparator reference voltage; switching of bias voltages provides hysteresis to reduce 'chatter' under marginal conditions.

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Pin Number Function

FX465 D5

Rx Tone Decode (O/P): The gated output of the on-chip Decode Comparator.

This output is used to gate the Rx Audio path. A logic ‘0’ on this pin indicates a successful decode and that the ‘Decode Comparator In’ pin is more positive than the ‘Decode Comparator Ref.’ input (see Table 1).

Decode Comparator In: The inverting input of the Decode Comparator. This pin is normally connected to the integrated output of the Rx Tone Detect pin.

Rx Tone Detect (O/P): In the Rx mode this output will go to a logic ‘1’ during a successful decode (Table 1). This must be externally integrated to control response and deresponse times (Figure 2).

Tx Tone Out: The CTCSS sinewave output appears on this pin under the control of the Rx/Tx pin. This output, when not transmitting a sub-audio tone, may be biased to VDD/2 as described in Table 1.

Rx/Tx: This input (Parallel Mode) selects Rx or Tx modes (see Figure 2). Logic ‘1’ = Rx; logic ‘0’ = Tx. In Serial Mode this (Rx or Tx) function is serially loaded. This pin is internally pulled to

VDD via a 1MΩ resistor.

PTL: A dual-function input. In parallel Rx mode this pin operates as a “Push To Listen” function by

enabling the Rx audio path, thus overriding the tone-squelch function. In the parallel load mode, Tx operation this input reverses the phase of the transmitting CTCSS tone (squelch tail elimination). In the serial load mode (Rx and Tx) these functions are serially loaded. Internal pull-up to VDD.

Rx Audio Out: The high-pass filtered ‘Received Audio’ output. This pin outputs audio when Rx Tone Decode = ‘0’, or PTL = ‘1’ or when ‘Notone’ is programmed (Table 2). In Tx Mode this pin is biased to VDD/2.

Tx Audio Out: The high-pass filtered ‘Transmit Audio’ output. In Tx mode this pin outputs audio present at the Tx Audio input by opening the Tx audio path. In Rx mode this pin is biased to VDD/2.

: The output of the on-chip analogue bias circuitry. Held internally at VDD/2, this pin should be

BIAS

externally decoupled to VSS via a capacitor.

Tx Audio In: The Tx Audio Input pin. Tx voice-band audio may be prefiitered, using the audio path, thus helping to avoid talk-off due to the intermodulation of speech frequencies with the transmitted CTCSS tone. This pin is internally biased to VDD/2.

Rx Audio In: The input to the audio high-pass filter in the Rx Mode.

This pin is internally biased to VDD/2.

Tone In: The input to the CTCSS tone detector; this input is internally biased to VDD/2.

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Application Information

External Components

Component Value Tolerance

1.0MΩ ±10% 560kΩ ±10% 820kΩ ±10%

0.1µF ±20% 18pF ±20% 33pF ±20%

0.1µF ±20%

0.47µF ±20%

0.1µF ±20%

small signal type

4.0MHz ±0.01%

Note: The values specified for R1, C2 and C3 have been found to be satisfactory when used with a crystal (X1) whose equivalent series resistance is <= 1000 ohms. The crystal manufacturer should be consulted to determine optimum values for different crystals. The 0.1µF value for the dc blocking capacitors C4, C5, C7, C8, C9, C10 and C11 are not a requirement. For the capacitors

C4, C5 and C10, the input impedance is internal to the device and specified as typically 550kΩ. For the remaining capacitors external circuits will be important in determining input impedance.

Fig.2 Recommended External Components

Input Pin Condition Output Pin Condition Result and/or Function

Decode Tone Tx Audio Tone Rx Audio

Comp. Rx Tone Rx Tone Tx Path Decoder Path

D0 to D5Rx/Tx PTL Input Detect Decode Enabled Enabled Enabled Enabled Notes

TONE 00 X 01 YES YES NO NO (BIAS)1 NOTONE 0 XX 01 NO (BIAS)YES NO NO (BIAS)2 TONE 10 0 0 1 NO (BIAS)NO YES NO (BIAS)3 TONE 11 0 0 1 NO (BIAS)NO YES YES 4 TONE 1 X 110NO (BIAS)NO YES YES 5 NOTONE 1 XX X 0NO (BIAS)NO YES YES 6

OTES

1 Normal tone transmit condition. 2NOTONE programmed in Tx mode; tone transmit output set to VDD/2. Tx audio path enabled. 3 Normal decode standby. 4 Normal decode standby with PTL used to enable audio. 5 Normal ‘decode of correct CTCSS tone’ condition; PTL has no effect. 6NOTONE programmed in Rx mode; tone transmit output (BIAS). Rx audio path enabled.

Table 1 Combinations of Input/Output Conditions

x = don't care

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Application Information ......

Description

Voice on shared radio channels is multiplexed with a subaudible CTCSS (Continuous Tone Controlled Subaudible Squelch) tone as a means of directing messages among user groups sharing the same RF frequencies. CTCSS modulates the transmitter with a discrete tone, from 39 standard CTCSS tones in the range (67.0Hz to 250.0Hz) accord- ing to TIA/EIA-603. There are an additional eight CTCSS tones not specified in TIA/EIA-603 that the FX465 will encode and decode. They are: 159.8Hz, 183.5Hz, 189.9Hz, 196.6Hz, 199.5Hz, 206.5Hz, 229.1Hz, and 254.1Hz, for a total of 47 CTCSS tones plus N

The FX465 also incorporates Tx/Rx on chip speech filters. In early CTCSS designs, Tx speech was not filtered from the CTCSS tone, rather the filtering was dependent upon the host transmitters pre-emphasis network. At only 6dB/ octave, the attenuation of speech components at higher CTCSS tones was only a few dB which resulted in talk-off (low frequency voice components unsquelching the receiver audio).

OTONE

TIA/EIA-603

Nominal FX465

Freq. Freq.

∆∆

∆fo % D

∆∆

CTCSS Programming Table (All frequencies in Hertz (Hz)

Hex

67.0 66.98 -0.029 1 1 1 1 1 1 3F

69.3 69.32 0.024 1 1 1 0 0 1 39

71.9 71.901 0.001 0 1 1 1 1 1 1F

74.4 74.431 0.042 1 1 1 1 1 0 3E

77.0 76.965 -0.046 0 0 1 1 1 1 0F

79.7 79.677 -0.029 1 1 1 1 0 1 3D

82.5 82.483 -0.021 0 1 1 1 1 0 1E

85.4 85.383 -0.020 1 1 1 1 0 0 3C

88.5 88.494 -0.007 0 0 1 1 1 0 0E

91.5 91.456 -0.048 1 1 1 0 1 1 3B

94.8 94.76 -0.042 0 1 1 1 0 1 1D

97.4 97.435 -0.036 1 1 1 0 1 0 3A

100.0 99.96 -0.040 0 0 1 1 0 1 0D

103.5 103.429 -0.069 0 1 1 1 0 0 1C

107.2 107.147 -0.05 0 0 1 1 0 0 0C

110.9 110.954 0.049 0 1 1 0 1 1 1B

114.8 114.84 0.035 0 0 1 0 1 1 0B

118.8 118.793 -0.006 0 1 1 0 1 0 1A

123.0 123.028 0.023 0 0 1 0 1 0 0A

127.3 127.328 0.022 0 1 1 0 0 1 19

131.8 131.674 -0.095 0 0 1 0 0 1 09

136.5 136.612 0.082 0 1 1 0 0 0 18

141.3 141.323 0.016 0 0 1 0 0 0 08

146.2 146.044 -0.107 0 1 0 1 1 1 17

151.4 151.441 0.027 0 0 0 1 1 1 07

156.7 156.875 0.112 0 1 0 1 1 0 16

159.8 159.936 0.085 1 1 0 0 0 1 31

162.2 162.311 0.069 0 0 0 1 1 0 06

167.9 167.708 -0.114 0 1 0 1 0 1 15

173.8 173.936 0.078 0 0 0 1 0 1 05

179.9 179.654 -0.137 0 1 0 1 0 0 14

* 183.5 183.680 0.098 1 1 0 0 1 0 32

186.2 186.289 0.048 0 0 0 1 0 0 04

* 189.9 190.069 0.089 1 1 0 0 1 1 33

192.8 192.864 0.033 0 1 0 0 1 1 13 * 196.6 196.329 -0.138 1 1 0 1 0 0 34 * 199.5 199.312 -0.094 1 1 0 1 0 1 35

203.5 203.645 0.071 0 0 0 0 1 1 03 * 206.5 206.207 -0.142 1 1 0 1 1 0 36

210.7 210.848 0.070 0 1 0 0 1 0 12

218.1 217.853 -0.113 0 0 0 0 1 0 02

225.7 225.339 -0.160 0 1 0 0 0 1 11 * 229.1 229.279 0.078 1 1 0 1 1 1 37

233.6 233.359 -0.103 0 0 0 0 0 1 01

241.8 241.970 0.070 0 1 0 0 0 0 10

250.3 250.282 -0.007 0 0 0 0 0 0 00 * 254.1 254.162 0.024 1 1 1 0 0 0 38

NOTONE 11000030

Serial Input Mode 1 0 Data Clock x x 2X

* Not specified in the TIA/EIA-603 tone set.

Table 2 Tone Programming Information

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Application Information ......

Fig.3 Frequency Response: Rx Audio Path

Fig.4 Serial and Parallel Timing Diagrams

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Specification

Absolute Maximum Ratings

Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits is not implied.

Supply voltage -0.3 to 7.0V Input voltage at any pin (ref V Sink/source current (supply pins) +/- 30mA

(other pins) +/- 20mA Total device dissipation @ T Derating 9mW/°C

Operating temperature range: FX465 D5 -40°C to +85°C Storage temperature range: FX465 D5 -55°C to +125°C

Operating Limits

All device characteristics are measured under the following conditions unless otherwise specified: V

= 3.3V to 5.0V. VSS = 0V. T

VDD, see Note 16.) Composite Signal = 1.0kHz Test Tone at 300mVrms, Noise at 75mVrms (gaussian white noise, band-limited to

6.0kHz), Programmed CTCSS Tone at 30mVrms, fo = 100Hz.

Characteristics See Note Min. Typ. Max. Unit Static Characteristics

Supply Voltage (VDD) 2.7 3.3/5.0 5.5 V Supply Current

VDD = 5.0V - 3.7 4.2 mA VDD = 3.3V - 1.3 1.6 mA

Analogue Input Impedance - 0.55 - MΩ Analogue Output Impedance - 0.45 - kΩ Digital Input Impedance 1 - 35.0 - kΩ

Input Logic ‘1’ 1 70.0 - - %V Input Logic ‘0’ 1 - - 30.0 %V Output Logic ‘1’, source = 0.1mA 2 80.0 - - %V Output Logic ‘0’, sink = 0.1 mA 2 - - 20.0 %V

Dynamic Characteristics

Decoder

Pure Tone Decode Threshold - 7.0 15.0 mVrms Composite Tone Decode Threshold 3 - - 30.0 mVrms Decode Input Signal Level 15 -20.0 - 3.5 dB Pure Tone Decode Response Time 12, 13 95.0 115 140 ms Pure Tone Decode De-Response Time 12, 14 95.0 130 170 ms Decode Response Time 3, 6, 9 - - 250 ms De-Response Time 3, 9 - 180 250 ms Decode Selectivity: Decode Bandwidth 3, 10

Upper Decode Band Edge 1.005fo 1.015fo 0.995fo+1 Hz Lower Decode Band Edge 1.005fo-1 0.985fo 0.995fo Hz

Encoder

Tone Output Level 11 -1.0 0 1.0 dB Tx Tone Frequency Accuracy (fO error) -0.3 - +0.3 %f Risetime to 90% (nominal output)

fO > 100Hz 4, 9 - 15.0 75 ms fO < 100Hz 4, 9 - 45.0 120 ms

Total Harmonic Distortion - 1.5 2.0 %

Audio Filter

Total Harmonic Distortion 5, 7 - 1.5 2.0 % Output Noise Level 7 - 0.5 - mVrms (Input ac short cct, audio switch enabled) SINAD 7, 8 40.0 50.0 - dB Spurious Emissions - - -48 dB Cut-Off Frequency - 300 - Hz Bandpass Ripple (300Hz – 3000Hz) 5, 7 - 1.0 1.8 dB Stopband Attenuation <250Hz 5, 7 33.0 36.0 - dB Passband Gain at 1.0kHz -0.5 0 0.5 dB

= 0V) -0.3 to (V

25°C 550mW Max.

AMB

= 25°C. Xtal/Clock = 4.0MHz 100ppm. 0dB ref: = 750mVrms (proportional to

AMB

+ 0.3V)

DD DD DD DD

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Specification ......

Characteristics See Note Min. Typ. Max. Unit

Audio Switch

Isolation 5 - 60.0 - dB

Serial/Parallel Inputs

Parallel Set-Up Time (tSP) 400 - - ns Load/Latch Pulse Width (tL) 400 - - ns Serial Clock Pulse Width (tC) 400 - - ns Serial Set-Up Time (tSS) 400 - - ns Serial Data Hold Time (tH) 400 - - ns Serial Enable Time (t1) 400 - - ns Serial Load/Latch Set-up Time (t2) 400 - - ns Serial Clock Frequency - 1.0 - MHz

Notes

1. Refers to Rx/Tx, PTL, Decode Comparator Input, D0, D1, D2, D3, D4, D5 inputs.

2. All logic outputs.

3. Composite Signal Test condition.

4. Any programming tone and RL = 10kΩ. CL = 15pF.

5. With an input level of 0dB at 1.0kHz.

6. fO > 100Hz, (for 100Hz >fO >67Hz: t = (100/fO Hz) x 250ms).

7. Measured in a 30kHz bandwidth.

8. With an input level of -3.5dB at 1.0kHz

9. Per TIA/EIA-603.

10. Per TIA/EIA-603, device will not decode adjacent TIA/EIA-603 tones.

11. Tone output level is proportional to VDD.

12. fO = 156.7Hz at -20dB.

13. Typically 12.5 tone cycles + 40ms

14. Typically 7 tone cycles + 90ms.

15. Max composite signal is 3.5dB with: Noise (band limited 6kHz Gaussian) -12dB to 1kHz test tone F CTCSS tone -20dB ref to 1kHz test tone.

16. For maximum dynamic range, set audio level to 0dB, VDD x 150mVrms, using minimumVDD under which system is intended to work. e.g. for a 2.7 to 3.3 volt system use 0dB equal to 405mVrms.

Package Outlines

The FX465 is available in the package styles outlined below. Pin 1 identification marking is shown on the relevant diagram and pins on all package styles number anti-clockwise when viewed from the top.

FX465 D5 24-pin plastic S.S.O.P.

PIN 1

Handling Precautions

The FX465 is a CMOS LSI circuit which includes input protection. However precautions should be taken to prevent static discharges which may cause damage.

DIM.

0.318 (8.07)

0.205 (5.20)

0.068 (1.73)

0.301 (7.65)

0.010 (0.25)

0.022 (0.55)

L P

0.005 (0.13)

X Y

NOTE : All dimensions in inches (mm.)

0° 7° 4°

Angles in degrees

TYP.

0.286 (7.15)

0.026 (0.65)

MAX.MIN.

0.328 (8.33)

0.212 (5.38)

0.078 (1.99)

0.311 (7.90)

0.008 (0.21)0.002 (0.05)

0.015 (0.38)

0.037 (0.95)

0.009 (0.22) 8°

9°

10°

Ordering Information

FX465 D5 24-pin plastic S.S.O.P. (D5)

CML does not assume any responsibility for the use of any circuitry described. No circuit patent licences are implied and CML reserves the right at any time without notice to change the said circuitry.

Page 9

CML Microcircuits

COMMUNICATI ON SEMICONDUCTORS

CML Product Data

In the process of creating a more global image, the three standard product semiconductor companies of CML Microsystems Plc (Consumer Microcircuits Limited (UK), MX-COM, Inc (USA) and CML Microcircuits (Singapore) Pte Ltd) have undergone name changes and, whilst maintaining their separate new names (CML Microcircuits (UK) Ltd, CML Microcircuits (USA) Inc and CML Microcircuits (Singapore) Pte Ltd), now operate under the single title CML Micro-

circuits.

These companies are all 100% owned operating companies of the CML Microsystems Plc Group and these changes are purely changes of name and do not change any underlying legal entities and hence will have no effect on any agreements or contacts currently in force.

CML Microcircuits Product Prefix Codes

Until the latter part of 1996, the differentiator between products manufactured and sold from MXCOM, Inc. and Consumer Microcircuits Limited were denoted by the prefixes MX and FX respectively. These products use the same silicon etc. and today still carry the same prefixes. In the latter part of 1996, both companies adopted the common prefix: CMX.

This notification is relevant product information to which it is attached.

Company contact information is as below:

CML Microcircuits (UK) Ltd

COMMUNICATION SEMICONDUCTORS

Oval Park, Langford, Maldon, Essex, CM9 6WG, England T el: +44 (0)1621 875500 Fax: +44 (0)1621 875600 [email protected] www.cmlmicro.com

COMMUNICATION SEMICONDUCTORS

4800 Bethania Station Road, Winston-Salem, NC 27105, USA Tel: +1 336 744 5050,

Fax: +1 336 744 5054 [email protected] www.cmlmicro.com

CML Microcircuits (USA) Inc.

0800 638 5577

COMMUNICATION SEMICONDUCTORS

No 2 Kallang Pudding Road, 09-05/ 06 Mactech Industrial Building, Singapore 349307 T el: +65 7450426 Fax: +65 7452917 [email protected] www.cmlmicro.com

CML Microcircuits (Singapore)PteLtd

D/CML (D)/1 February 2002