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FSTU3384
10-Bit Bus Switch with
−2V Undershoot Hardened Circuit (UHC) Protection
FSTU3384 10-Bit Bus Switch with
May 1999
Revised December 1999
General Description
The Fairchild Switc h FSTU3384 provides 10 bits of hig hspeed CMOS TTL-compatible bus switches. The low on
resistance of the switch allows inp uts to be connected to
outputs without add ing propag ation del ay genera ting additional ground bounce noi se. Both the A Ports and the B
Ports are “undersh oot hardened ” with UHC protection to
support an extended input range to 2.0V below ground.
Fairchild’s integrated Undershoot Hardened Circuit, UHC
senses undershoot at the I/Os, and responds by preventing
voltage differentials from developing and turning on the
switch. The device is orga nized as two 5 -bit switches wi th
separate bus enable (OE
switch is ON and Port A is connected to Port B. Wh en OE
is HIGH, the switch is OPEN and a high-impedance state
exists between the two ports.
) signals. When OE is LOW, the
Features
■ 4Ω switch connection between two ports
■ Undershoot Hardened to -2.0V.
■ Minimal propagation delay through the switch
■ Low l
■ Zero ground bounce in flow-through mode
■ Control inputs compatible with TTL level
■ See Applications Note AN-5008 for details.
.
CC
Ordering Code:
Order Number Package Number Package Description
FSTU3384WM M24B 24-Lead Sm all Outline Integrated Circuit (SOIC), JEDEC MO-153 4. 4mm Wide
FSTU3384QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
FSTU3384MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also availab l e in Tape and Reel. Specify by appending the s uffix let te r “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Pin Names Description
A, OEB Bus Switch Enable
OE
A
0–A9
B
0–B9
UHC is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS500195 www.fairchildsemi.com
Bus A
Bus B
Truth Table
0–A4
0–A4
B
0–B4
OEAOEB
LLA
LHA
H L HIGH-Z State A
H H HIGH-Z State HIGH-Z State Disconnect
B5–B
A5–A
9
HIGH-Z State Connect
5–A9
Function
9
Connect
Connect
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Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) −0.5V to +7.0V
DC Switch Voltage (V
FSTU3384
DC Input Voltage (V
DC Input Diode Current (I
DC Output (I
DC V
OUT
/GND Current (ICC/I
CC
Storage Temperature Range (T
) −2.0V to +7.0V
S
) (Note 2) −0.5V to +7.0V
IN
) VIN<0V −50 mA
IK
) Sink Current 128 mA
) +/− 100mA
GND
) −65°C to +150°C
STG
Conditions
Power Supply Operating (V
Input Voltage (V
Output Voltage (V
Input Rise and Fall Time (t
Switch Control Input 0nS/V to 5nS/V
Switch I/O 0nS/V to DC
Free Air Operating Temperature (T
Note 1: The “Absolute Maximum Ratings” are those values bey ond which
the safety of the d evice cannot be guaranteed. The device sh ould not be
operated at these limits. The paramet ric values defined in the “Electrical
Characteristics” table are not guaranteed at the absolute maximum ratings.
The “Recomme nded O peratin g Cond itions ” table will defin e the condition s
for actual device operation.
Note 2: The input and output ne gative vo ltage ra tings may be excee ded if
the input and output diode current ratings are observed.
Note 3: Unused control in puts mus t be held HI GH o r LOW. Th ey m ay not
float.
(Note 3)
) 4.0V to 5.5V
CC
)0V to 5.5V
IN
)0V to 5.5V
OUT
, tf)
r
) −40°C to +85°C
A
DC Electrical Characteristics
= −40°C to +85°C
T
Min
A
Typ
(Note 5)
Units Condition
Max
IN
Other inputs at VCC or GND
= − 18 mA
= 0V, IIN = 30 mA
S
= 2.4V, IIN = 15 mA
S
OUT
V
Symbol Parameter
V
IK
V
IH
V
IL
I
I
I
OZ
R
ON
I
CC
∆ I
CC
I
BIAS
I
OZU
V
IKU
Note 4: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on
the two (A or B) pins.
Note 5: All typical values are at V
Clamp Diode Voltage 4.5 −1.2 V I
HIGH Level Input Voltage 4.0-5.5 2.0 V
LOW Level Input Voltage 4.0-5.5 0.8 V
Input Leakage Current 5.5 ±1.0 µA0 ≤ VIN ≤ 5.5V
OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤ A, B ≤ VCC, VIN = V
Switch On Resistance 4.5 4 7 Ω VS = 0V, IIN = 64 mA
(Note 4) 4.5 4 7 Ω V
Quiescent Supply Current 5.5 3 µAVS = VCC or GND, I
Increase in ICC per Input 5.5 2.5 mA OE input at 3.4V
Bias Pin Leakage Current 5.5 ±1.0 µAOE = 0V, B = 0V, BiasV = 5.5V
Switch Undershoot Current 5.5 100 µAIIN= − 20 mA, OE = 5.5V, V
Voltage Undershoot 5.5 −2.0 V 0.0 mA ≥ IIN ≥ − 50 mA, OE = 5.5V
= 5.0V, TA = 25°C.
CC
CC
(V)
4.5 8 15 Ω V
4.0 11 20 Ω VS = 2.4V, IIN = 15 mA
IH
= 0
OUT
≥ V
IH
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AC Electrical Characteristics
= −40°C to +85°C
T
A
C
= 50 pF, RU = RD = 500Ω
Symbol Parameter
L
= 4.5 − 5.5V VCC = 4.0V
V
CC
Units Conditions Figure No.
Min Max Min Max
t
, t
PHL
t
PZH
t
PHZ
Note 6: This parameter is guaran teed by d esig n but n ot tes ted . The bu s sw itc h co ntrib utes n o pr opag atio n d elay oth er th an t he R C de lay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Prop Delay Bus to Bus (Note 6) 0.25 0.25 ns VI = OPEN Figure 1,
PLH
, t
PZL
, t
PLZ
Output Enable Time
OEA, OEB to An, B
Output Disable Time
OEA, OEB to An, B
n
n
1.0 5.7 6.2 ns
1.5 5.2 5.5 ns
VI = 7V for t
PZL
VI = OPEN for t
VI = 7V for t
PLZ
VI = OPEN for t
PZH
PHZ
Figure 2
Figure 1,
Figure 2
Figure 1,
Figure 2
Capacitance (Note 7)
Symbol Parameter Typ Max Units Conditions
C
IN
C
I/O
Note 7: Capacitance is characterized but not tested.
Control Input Capacitance 3 pF VCC = 5.0V
(OFF) Input/Output Capacitance 5 pF VCC, OE = 5.0V
AC Loading and Waveforms
FSTU3384
Note: Input driven by 50 Ω source terminated in 50 Ω, RU = RD = 500 Ω
includes load and stray capacitance, CL= 50 pF
Note: C
L
Note: Input PRR = 1.0 MHz, t
= 500 nS
W
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
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Physical Dimensions inches (millimeters) unless otherwise noted
FSTU3384
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
Package Number M24B
Package Number MQA24
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
FSTU3384 10-Bit Bus Switch with
24-Lead Thin Shrin k Small Ou tlin e Pack age (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch t echnology used for several years in it s
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provide d in the l abe ling, can be reasonably expected to result in a significant injury to the
user.
2. A critical compo nent in any com ponen t of a life s upp ort
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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