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FST6800
10-Bit Bus Switch with Precharged Outputs
FST6800 10-Bit Bus Switch with Precharged Outputs
June 1997
Revised November 2000
General Description
The Fairchild Switch FST6800 provides 10-bits of highspeed CMOS TTL-comp atible bus switching. The low on
resistance of the switch allows inp uts to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. The device precharges
the B Port to a sele ctable b ias v oltage (BiasV ) to minimi ze
live insertion noise.
The device is organized as a 10-bit switch with a bus
enable (OE
and Port A is connect ed to Port B. Whe n OE
switch is OPEN and the B Port is precharged to BiasV
through an equivalent 10-k
) signal. When OE is LOW, the switch is ON
is HIGH, the
Ω resistor.
Features
■ 4Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
■ Low l
■ Zero bounce in flow-through mode.
■ Output precharge to minimize live insertion noise.
■ Control inputs compatible with TTL level.
.
CC
Ordering Code:
Order Number Package Number Package Description
FST6800WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
FST6800QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST6800MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also availab le in Tape and Reel. Specify by appending the suffix letter “X” to the o rdering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Pin Name Description
OE
ABus A
BBus B
© 2000 Fairchild Semiconductor Corporation DS500022 www.fairchildsemi.com
Bus Switch Enable
Truth Table
OE
LA
HBiasV Precharge
B0–B
0–A9
9
Function
Connect
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Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) −0.5V to +7.0V
DC Switch Voltage (V
FST6800
Bias V Voltage Range
DC Input Voltage (V
DC Input Diode Current (l
DC Output (I
DC V
OUT
/GND Current (ICC/I
CC
Storage Temperature Range (T
) −0.5V to +7.0V
S
−0.5V to +6.0V
) (Note 2) −0.5V to +7.0V
IN
) V
<0V −50mA
IK
IN
) Sink Current 128mA
) +/− 100mA
GND
) −65°C to +150 °C
STG
Conditions
Power Supply Operating (V
Precharge Supply (BiasV) 1.5V to V
Input Voltage (VIN)0V to 5.5V
Output Voltage (V
Input Rise and Fall Time (t
Switch Control Input 0nS/V to 5nS/V
Switch I/O 0nS/V to DC
Free Air Operating Temperature (T
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the d evice cannot be guaranteed. The device sh ould not be
operated at these limit s. The parametric values defin ed in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommende d Opera ting Condit ions table s will de fine the co nditions
for actual device operation.
Note 2: The input and output ne gative vo ltage ra tings may be excee ded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
(Note 3)
) 4.0V to 5.5V
CC
)0V to 5.5V
OUT
, tf)
r
) −40 °C to +85 °C
A
DC Electrical Characteristics
V
Symbol Parameter
V
IK
V
IH
V
IL
I
I
I
O
I
OZ
R
ON
I
CC
∆ I
Note 4: Typi c al values are at VCC = 5.0V and TA= +25°C
Note 5: Measured by the volta ge drop between A an d B pins at the indicated c urrent through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
Clamp Diode Voltage 4.5 −1.2 V IIN = −18mA
HIGH Level Input Voltage 4.0–5.5 2.0 V
LOW Level Input Voltage 4.0–5.5 0.8 V
Input Leakage Current 5.5 ±1.0 µA0≤ VIN ≤5.5V
Output Current 4.5 0.25 mA BiasV = 2.4V, B = 0
OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤A ≤V
Switch On Resistance 4.5 4 7 Ω VIN = 0V, IIN = 64mA
(Note 5) 4.5 4 7 Ω V
Quiescent Supply Current 5.5 3 µAVIN = VCC or GND, I
Increase in I
CC
per Input 5.5 2.5 mA One input at 3.4V
CC
CC
(V)
4.5 8 15 Ω V
4.0 11 20 Ω VIN = 2.4V, IIN = 15mA
TA = −40 °C to +85 °C
Min Typ
(Note 4)
Max
Units Conditions
CC
= 0V, IIN = 30mA
IN
= 2.4V, IIN = 15mA
IN
Other inputs at VCC or GND
OUT
CC
= 0
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AC Electrical Characteristics
= −40 °C to +85 °C,
T
A
C
= 50pF, RU = RD = 500Ω
Symbol Parameter
t
PHL,tPLH
t
PZH
t
PZL
t
PHZ
t
PLZ
Note 6: This par ameter is guaranteed by design but is not test ed. The bus swit c h c ontributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Prop Delay Bus to Bus (Note 6) 0.25 0.25 ns VI = OPEN Figures
Output Enable Time 1.5 6.2 6.5 ns VI = OPEN, BiasV = GND
Output Disable Time 1.5 6.1 6.5 ns VI = OPEN, BiasV = GND
L
= 4.5 – 5.5V VCC = 4.0V
V
CC
Min Max Min Max
1.5 6.2 6.5 ns VI = 7V, BiasV = 3V
1.5 7.3 6.8 ns VI = 7V, BiasV = 3V
Units Conditions
Figure
Figures
Figures
Capacitance (Note 7)
Symbol Parameter Typ Max Units Conditions
C
IN
C
I/O
Note 7: TA = +25°C, f = 1 MHz, Ca pacitance is charac te riz ed but not tested.
Control Pin Input Capacitance 3 pF VCC = 5.0V
Input/Output Capacitance 5 pF VCC, OE = 5.0V
AC Loading and Waveforms
FST6800
No.
1, 2
1, 2
1, 2
Note: Input driven by 50 Ω source terminated in 50 Ω
includes load and stray capacitance
Note: C
L
Note: Input PRR = 1.0 MHz, t
= 500 ns
W
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
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Physical Dimensions inches (millimeters) unless otherwise noted
FST6800
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number M24B
Package Number MQA24
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
FST6800 10-Bit Bus Switch with Precharged Outputs
24-Lead Thin Shrin k Small Ou tlin e Pack age (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch t echnology used for several years in it s
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provide d in the l abe ling, can be reasonably expected to result in a significant injury to the
user.
2. A critical componen t in any compo nent o f a l ife supp ort
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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