Datasheet FST3384WMX, FST3384WM, FST3384QSCX, FST3384QSC, FST3384MTCX Datasheet (Fairchild Semiconductor)

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© 1999 Fairchild Semiconductor Corporation DS500046 www.fairchildsemi.com
September 1997 Revised December 1999
FST3384 10-Bit Low Power Bus Switch
Print form created on December 13, 1999 4:03
FST3384 10-Bit Low Power Bus Switch
General Description
) sig-
nals. When OE
is LOW, the switch is ON and Port A is con-
nected to Port B. When OE
is HIGH, the switch is OPEN
and a high-impedance state exists between the two ports.
Features
4 switch connection between two ports
Minimal propagation delay through the switch
Ultra low power with < 0.1 µA typical I
CC
Zero ground bounce in flow-through mode
Control inputs compatible with TTL level
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Logic Diagram
Pin Descriptions
Connection Diagram
Truth Table
Order Number Package Number Package Description
FST3384WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide FST3384QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide FST3384MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
OE
A, OEB Bus Switch Enable
A
0–A9
Bus A
B
0–B9
Bus B
OEAOEBB0–B
4
B5–B
9
Function
LLA
0–A4
A5–A
9
Connect
LHA
0–A4
HIGH-Z State Connect
H L HIGH-Z State A
5–A9
Connect
H H HIGH-Z State HIGH-Z State Disconnect
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FST3384
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 3)
Note 1: The Absolute Maximum Ratings are those values beyon d which the safety of the dev ice cannot be guaranteed. T he device sh ould not be operated at these limits. The paramet ric values defined in the “Electrical Characteristics table are not guaranteed at the absolute maximum ratings. The Recomme nded O peratin g Cond itions table will defin e the condition s for actual device operation.
Note 2: The input and output ne gative vo ltage ra tings may be excee ded if the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Note 4: All typical values are at VCC = 5.0V, TA = 25°C. Note 5: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on
the two (A or B) pins.
Supply Voltage (VCC) 0.5V to +7.0V DC Switch Voltage (V
S
) 0.5V to +7.0V
DC Input Voltage (V
IN
) (Note 2) 0.5V to +7.0V
DC Input Diode Current (I
IK
) VIN<0V −50 mA
DC Output (I
OUT
) Sink Current 128 mA
DC V
CC
/GND Current (ICC/I
GND
) +/ 100mA
Storage Temperature Range (T
STG
) 65°C to +150°C
Power Supply Operating (V
CC
) 4.0V to 5.5V
Input Voltage (V
IN
)0V to 5.5V
Output Voltage (V
OUT
)0V to 5.5V
Input Rise and Fall Time (t
r
, tf) Switch Control Input 0nS/V to 5nS/V Switch I/O 0nS/V to DC
Free Air Operating Temperature (T
A
) 40°C to +85°C
Symbol Parameter
V
CC
(V)
T
A
= 40°C to +85°C
Units Condition
Min
Typ
(Note 4)
Max
V
IK
Clamp Diode Voltage 4.5 −1.2 V IIN= − 18mA
V
IH
HIGH Level Input Voltage 4.0-5.5 2.0 V
V
IL
LOW Level Input Voltage 4.0-5.5 0.8 V
I
I
Input Leakage Current 5.5 ±1.0 µA0 ≤ VIN 5.5V
I
OZ
OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤ A, B ≤ V
CC
R
ON
Switch On Resistance 4.5 4 7 VIN = 0V, IIN = 64mA (Note 5) 4.5 4 7 V
IN
= 0V, IIN = 30mA
4.5 8 15 V
IN
= 2.4V, IIN = 15mA
4.0 11 20 VIN = 2.4V, IIN = 15mA
I
CC
Quiescent Supply Current 5.5 3 µAVIN = VCC or GND, I
OUT
= 0
I
CC
Increase in ICC per Input 5.5 2.5 mA One input at 3.4V
Other inputs at VCC or GND
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FST3384
AC Electrical Characteristics
Note 6: This parameter is guaran teed by d esig n but n ot tes ted . The bu s sw itch c ont ribut es n o pro pag atio n dela y ot her than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance (Note 7)
Note 7: Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 source terminated in 50 Note: C
L
includes load and stray capacitance
Note: Input PRR = 1.0 MHz, t
W
= 500 nS
FIGURE 1. AC Test Circuit
FST3384 V
IN
vs RON (Typ)
FIGURE 2. AC Waveforms
Symbol Parameter
T
A
= 40°C to +85°C
Units Conditions Figure No.
C
L
= 50 pF, RU = RD = 500
V
CC
= 4.5 5.5V VCC = 4.0V
Min Max Min Max
t
PHL
, t
PLH
Prop Delay Bus to Bus (Note 6) 0.25 0.25 ns VI = OPEN Figure 1
Figure 2
t
PZH
, t
PZL
Output Enable Time 1.0 5.7 6.2 ns VI = 7V for t
PZL
Figure 1 Figure 2
OEA, OEB to An, Bn VI = OPEN for t
PZH
t
PHZ
, t
PLZ
Output Disable Time 1.5 5.2 5.5 ns II = 7V for t
PLZ
Figure 1 Figure 2
OEA, OEB to An, Bn VI = OPEN for t
PHZ
Symbol Parameter Typ Max Units Conditions
C
IN
Control Input Capacitance 3 6 pF VCC = 5.0V
C
I/O
(OFF) Input/Output Capacitance 5 13 pF VCC, OE = 5.0V
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FST3384
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA24
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FST3384 10-Bit Low Power Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Thin Shrink Sm all Ou tline Pa ck age (TS SO P), JE DE C MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchilds proven switch t echnology used for several years in it s 74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ic es or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provide d in the labe l ing, can be re a­sonably expected to result in a significant injury to the user.
2. A critical compo nent in any com ponen t of a life s upp ort device or system whose failure to perform can be rea­sonably expected to cause the failure of the l ife support device or system, or to affect its safety or effectiveness.
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