Datasheet FST3384 Datasheet (Fairchild)

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FST3384 10-Bit Low Power Bus Switch
FST3384 10-Bit Low Power Bus Switch
September 1997 Revised December 1999
General Description
is LOW, the switch is ON and Port A is con-
is HIGH, the switch is OPEN
) sig-
Features
■ 4Ω switch connection between two ports
■ Minimal propagation delay through the switch
■ Ultra low power with < 0.1 µA typical I
■ Zero ground bounce in flow-through mode
■ Control inputs compatible with TTL level
CC
Ordering Code:
Order Number Package Number Package Description
FST3384WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide FST3384QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide FST3384MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also availab le in Tape and Reel. Specify by appending the suffix letter “X” to the o rdering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Pin Names Description
OE
A, OEB Bus Switch Enable
A
0–A9
B
0–B9
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Bus A Bus B
Truth Table
OEAOEBB0–B
LLA LHA H L HIGH-Z State A H H HIGH-Z State HIGH-Z State Disconnect
4
0–A4
0–A4
B5–B
A5–A
9
HIGH-Z State Connect
5–A9
Function
9
Connect
Connect
Print form created on December 13, 1999 4:03
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Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) −0.5V to +7.0V DC Switch Voltage (V
FST3384
DC Input Voltage (V DC Input Diode Current (I DC Output (I DC V
OUT
/GND Current (ICC/I
CC
Storage Temperature Range (T
) −0.5V to +7.0V
S
) (Note 2) −0.5V to +7.0V
IN
) VIN<0V −50 mA
IK
) Sink Current 128 mA
) +/− 100mA
GND
) −65°C to +150°C
STG
Conditions
Power Supply Operating (V Input Voltage (V Output Voltage (V Input Rise and Fall Time (t
Switch Control Input 0nS/V to 5nS/V Switch I/O 0nS/V to DC
Free Air Operating Temperature (T
Note 1: The “Absolute Maximum Ratings” are those values bey ond which the safety of the d evice cannot be guaranteed. The device sh ould not be operated at these limits. The paramet ric values defined in the “Electrical Characteristics” table are not guaranteed at the absolute maximum ratings. The “Recomme nded O peratin g Cond itions ” table will defin e the condition s for actual device operation.
Note 2: The input and output ne gative vo ltage ra tings may be excee ded if the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not float.
(Note 3)
) 4.0V to 5.5V
CC
)0V to 5.5V
IN
)0V to 5.5V
OUT
, tf)
r
) −40°C to +85°C
A
DC Electrical Characteristics
= −40°C to +85°C
T
V
Symbol Parameter
V
IK
V
IH
V
IL
I
I
I
OZ
R
ON
I
CC
∆ I
CC
Note 4: All typical values are at VCC = 5.0V, TA = 25°C. Note 5: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on
the two (A or B) pins.
Clamp Diode Voltage 4.5 −1.2 V IIN= − 18mA HIGH Level Input Voltage 4.0-5.5 2.0 V LOW Level Input Voltage 4.0-5.5 0.8 V Input Leakage Current 5.5 ±1.0 µA0 ≤ VIN ≤ 5.5V OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤ A, B ≤ V Switch On Resistance 4.5 4 7 Ω VIN = 0V, IIN = 64mA (Note 5) 4.5 4 7 Ω V
Quiescent Supply Current 5.5 3 µAVIN = VCC or GND, I Increase in ICC per Input 5.5 2.5 mA One input at 3.4V
CC
(V)
4.5 8 15 Ω V
4.0 11 20 Ω VIN = 2.4V, IIN = 15mA
Min
A
Typ
(Note 4)
Units Condition
Max
CC
= 0V, IIN = 30mA
IN
= 2.4V, IIN = 15mA
IN
Other inputs at VCC or GND
OUT
= 0
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AC Electrical Characteristics
= −40°C to +85°C
T
A
C
= 50 pF, RU = RD = 500Ω
Symbol Parameter
L
= 4.5 − 5.5V VCC = 4.0V
V
CC
Units Conditions Figure No.
Min Max Min Max
t
, t
PHL
t
PZH
t
PHZ
Note 6: This parameter is guaran teed by d esig n but n ot tes ted . The bu s sw itc h co ntrib utes n o pr opag atio n d elay oth er th an t he R C de lay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Prop Delay Bus to Bus (Note 6) 0.25 0.25 ns VI = OPEN Figure 1
PLH
, t
Output Enable Time 1.0 5.7 6.2 ns VI = 7V for t
PZL
OEA, OEB to An, Bn VI = OPEN for t
, t
Output Disable Time 1.5 5.2 5.5 n s II = 7V for t
PLZ
OEA, OEB to An, Bn VI = OPEN for t
PZL
PZH
PLZ
PHZ
Figure 2 Figure 1
Figure 2 Figure 1
Figure 2
Capacitance (Note 7)
Symbol Parameter Typ Max Units Conditions
C
IN
C
I/O
Note 7: Capacitance is characterized but not tested.
Control Input Capacitance 3 6 pF VCC = 5.0V
(OFF) Input/Output Capacitance 5 13 pF VCC, OE = 5.0V
FST3384
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
includes load and stray capacitance
Note: C
L
Note: Input PRR = 1.0 MHz, t
= 500 nS
W
FIGURE 1. AC Test Circuit
FST3384 V
vs RON (Typ)
IN
FIGURE 2. AC Waveforms
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Physical Dimensions inches (millimeters) unless otherwise noted
FST3384
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number M24B
Package Number MQA24
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
FST3384 10-Bit Low Power Bus Switch
24-Lead Thin Shrin k Small Ou tlin e Pack age (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch t echnology used for several years in it s 74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ic es or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provide d in the l abe ling, can be rea­sonably expected to result in a significant injury to the user.
2. A critical compo nent in any com ponen t of a life s upp ort device or system whose failure to perform can be rea­sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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