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FST3306
2-Bit Low Power Bus Switch
FST3306 2-Bit Low Power Bus Switch
February 2001
Revised February 2001
General Description
The FST3306 is a 2-bit ultra high-speed CMOS FET bus
switch with TTL-compatible active LOW control inputs. The
low on resistance of the switch allows inputs to be connected to outputs with minimal propagation delay and without generating additional ground bounce noise. The device
is organized as a 2-bit switch with independent bus enable
(BE
) controls. When BE is LOW, the switch is ON and
Port A is connected to Port B. When BE
switch is OPEN and a high-impedance state exists
between the two ports. C ontrol inputs t olerate voltages up
to 5.5V independent of V
.
CC
is HIGH, the
Features
■ Typical 3Ω switch resistance at 5.0V V
■ Minimal propagation delay through the switch
■ Power down high impedance input/output
■ Zero bounce in flow through mode .
■ TTL compatible active LOW control inputs
■ Control inputs are overvoltage tolerant
CC
Ordering Code:
Order Number Package Number Package Description
FST3306MTC MTC08 8-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also availab le in Tape and Reel. Specify by appending the suffix letter “X” to the o rdering code.
Logic Symbol Connection Diagram
(Top View)
Pin Descriptions Function Table
Pin Name Description
ABus A
BBus B
BE
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Bus Enable Input
Bus Enable Input BE Function
L B Connected to A
H Disconnected
H = HIGH Logic Level
L = LOW Logic Level
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Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) −0.5V to +7.0V
DC Switch Voltage (VS)
FST3306
DC Output Voltage (V
) (Note 2) −0.5V to +7.0V
IN
−0.5V to +7.0V
DC Input Diode Current
) VIN < 0V −50 mA
(I
IK
DC Output (I
DC V
CC
Storage Temperature Range (T
Junction Lead Temperature under Bias (T
Lead Temperature (T
) Current 128 mA
OUT
or Ground Current (ICC/GND) ±100 mA
) −65°C to +150°C
STG
)
L
) +150°C
J
(Soldering, 10 seconds)
Power Dissipation (P
) @ +85°C 250 mW
D
+260°C
Conditions
Supply Operating (V
Control Input Voltage (V
Switch Input Voltage (V
Output Voltage (V
Operating Temperature (T
Input Rise and Fall Time (t
Control Input 0 ns/V to 5 ns/V
Switch I/O 0 ns/V to DC
Thermal Resistance (
Note 1: The “Absolute Maximum Ratings” are those values bey ond which
the safety of the d evice cannot be guaranteed. The device sh ould not be
operated at these limit s. The parametric values defin ed in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recomme nded O peratin g Cond itions ” table will defin e the condition s
for actual device operation.
Note 2: The input and output ne gative vo ltage ra tings may be excee ded if
the input and output diode current ratings are observed.
Note 3: Unused logic inputs must be held HIGH or LOW. They may not
float.
(Note 3)
) 4.0V to 5.5V
CC
) 0V to 5.5V
IN
) 0V to 5.5V
IN
) 0V to 5.5V
OUT
) −40°C to +85°C
A
, tf)
r
θ
)250°C/W
JA
DC Electrical Characteristics
V
Symbol Parameter
V
V
V
V
I
I
R
I
∆I
Clamp Diode Voltage 4.5 −1.2 V IIN = −18 mA
IK
HIGH Level Input Voltage 4.0–5.5 2.0 V
IH
LOW Level Input Voltage 4.0–5.5 0.8 V
IL
HIGH Level Output Voltage 4.5–5.5 see Figure 3 V VIN = V
OH
Input Leakage Current 5.5 ±1.0 µA0 ≤ VIN ≤ 5.5V
IN
Switch OFF Leakage Current 5.5 ±1.0 µA0 ≤ A, B, ≤ V
OFF
Switch On Resistance 4.5 3 7
ON
(Note 4) 4.5 3 7 VIN = 0V, IIN = 30 mA
Quiescent Supply Current 5.5 3 µAVIN = VCC or GND,
CC
Increase in ICC per Input 5.5 1 2.5 mA VIN = 3.4V, IO = 0,
CC
(Note 5) Control Input Only
Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins.
Note 5: Per TTL driven input (V
= 3.4V, control input only). A and B pins do not contribute to I
IN
CC
(V) Min Typ Max
4.5 6 15 V
4.0 10 20 V
TA = −40°C to +85°C
CC.
Units Conditions
CC
VIN = 0V, IIN = 64 mA
Ω
I
CC
= 2.4V, IIN = 15 mA
IN
= 2.4V, IIN = 15 mA
IN
= 0
OUT
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AC Electrical Characteristics
TA = −40°C to +85°C
V
Symbol Parameter
t
, Prop Delay Bus to Bus 4.0–5.5 0.25 ns VI = OPEN Figures
PHL
(Note 6)
t
PLH
t
, Output Enable Time 4.5–5.5 0.8 2.5 4.2
PZL
t
PZH
t
, Output Disable Time 4.5–5.5 0.8 3.1 4.8
PLZ
t
PHZ
Note 6: This parameter is guarant eed. The bu s switch contrib utes no pro pagatio n delay ot her tha n the RC de lay of the ty pical On re sistance of the switch
and the 50 pF load capac it ance, when driven by an ideal voltage sourc e (z ero output impedanc e). The specified limit i s ca lc ulated on this basis.
CL = 50 pF, RU = RD = 500Ω
CC
Units Conditions
(V) Min Typ Max
VI = 7V for t
4.0 0.8 3.0 4.6 VI = 0V for t
4.0 0.8 2.9 4.4 VI = 0V for t
ns
ns
VI = 7V for t
PZL
PZH
PLZ
PHZ
Number
Figures
Figures
Capacitance
Symbol Parameter Typ Max Units Conditions
C
IN
C
(OFF) Port OFF Capacitance 6 pF VCC = 5.0V = BE
I/O
C
(ON) Switch ON Capacitance 12 pF VCC = 5.0V, BE = 0V
I/O
Control Pin Input Capacitance 2.5 pF VCC = 0V
AC Loading and Waveforms
Input driven by 50Ω source terminated in 50Ω.
includes load and stray capacitance.
C
L
Input PRR = 1.0 MHz t
= 500 ns.
w
FST3306
Figure
1, 2
1, 2
1, 2
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
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DC Characteristics
FST3306
FIGURE 3. Typical High Level Output Voltage vs. Supply Voltage
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Physical Dimensions inches (millimeters) unless otherwise noted
FST3306 2-Bit Low Power Bus Switch
8-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provide d in the l abe ling, can be reasonably expected to result in a significant injury to the
user.
Package Number MTC08
2. A critical compo nent in any com ponen t of a life s upp ort
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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