Datasheet FST3245 Datasheet (Fairchild)

FST3245 — 8-Bit Bus Switch

March 2008

Features

 4Ω Switch Connection between Two Ports  Minimal Propagation Delay through the Switch  Low I

CC

 Zero Bounce in Flow-through Mode  Control Inputs Compatible with TTL Level

Description

The FST3245 switch provides eight-bits of high-speed CMOS TTL-compatible bus switching in a standard ’245 pin-out. The low on resistance allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.

The device is organized as an eight-bit switch. When /OE is LOW, the switch is ON and port A is connected to port B. When /OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports.

Ordering Information

Operating

Part Number

Temperature

Package

Range

FST3245WMX

FST3245QSC

FST3245QSCX

FST3245MTC

FST3245MTCX

All packages are lead free per JEDEC: J-STD-020B standard.

The Fairchild switch fami l y deri ves from and embodies Fairchild ’ s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product.

-40 to +85°C

20-Lead, Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300-inch Wide

20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150-inch Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Packing

Method

Tape and Reel

Tube

Logic Diagram

2

A

0

9

A

7

19

/OE

Figure 1. Logic Diagram

18

11

B

0

B

7

Pin Configuration

FST3245 — 8-Bit Bus Switch

NC

A

GND

1

2

0

3

1

4

2

5

3

6

4

7

5

8

6

9

7

10 11

Figure 2. Pin Configuration

20

19

18

17

16

15

14

13

12

V

CC

/OE

B

0

B

1

B

2

B

3

B

4

B

5

B

6

B

7

Pin Descriptions

Pin # Pin Names Description

1 NC No Connnect

19 /OE Bus Switch Enable

2,3,4,5,6,7,8,9 A0,A1,A2,A3,A4,A5,A6,A7 Bus A

10 GND Ground

11,12,13,14,15,16,17,18 B7,B6,B5,B4,B3,B2,B1,B0 Bus B

20 VCC Supply Voltage

Truth Table

Input /OE

LOW Connect

HIGH Disconnect

Function

FST3245 — 8-Bit Bus Switch

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

Symbol Parameter Min. Max. Unit

VCC Supply Voltage -0.5 7.0 V

VS DC Switch Voltage -0.5 7.0 V

VIN DC Input Voltage

IIK DC Input Diode Current, V

I

DC Output Sink Current 128 mA

OUT

I

/ I

CC

DC V

GND

T

Storage Temperature Range -65 +150 °C

STG

/ GND Current ±100 mA

CC

Note:

1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed.

(1)

-0.5 7.0 V < 0V -50 mA

IN

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol Parameter Min. Max. Unit

VCC Power Supply Operating 4.0 5.5 V

VIN Input Voltage 0 5.5 V

V

Output Voltage 0 5.5 V

OUT

tr, tf Input Rise and Fall Time

Switch Control Input Switch I/O 0 DC

TA Operating Temperature, Free Air -40 +85 °C

Note:

2. Unused control inputs must be held HIGH or LOW. They may not float.

(2)

0 5

ns/V

DC Electrical Characteristics

Typical values are at V

= 5.0V and TA = 25°C.

CC

FST3245 — 8-Bit Bus Switch

Symbol Parameter Conditions VCC (V)

TA=-40 to +85°C

Min. Typ. Max.

VIK Clamp Diode Voltage I VIH High-Level Input Voltage 4.0 to 5.5 2.0 V VIL Low-Level Input Voltage 4.0 to 5.5 0.8 V

IIN Input Leakage Current

IOZ

RON Switch On Resistance

Off-state Leakage Current

(3)

ICC Quiescent Supply Current

ΔICC

Increase in ICC per Input

Note:

3. Measured by the voltage drop between the A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the A or B pins.

= -18mA 4.5 -1.2 V

IN

0 ≤ VIN ≤ 5.5V 0 ≤ A, B ≤ VCC

5.5 ±1.0 µA

VIN = 0V, IIN = 64mA 4.5 4 7 VIN = 0V, IIN = 30mA 4.5 4 7 VIN = 2.4V, IIN = 15mA 4.5 8 15 VIN = 2.4V, IIN = 15mA 4.0 11 20 VIN = VCC or GND,

I

= 0

OUT

One Input at 3.4V, Other Inputs at V

or GND

CC

5.5 3 µA

5.5 2.5 mA

Units

Ω

AC Electrical Characteristics

TA = -40 to +85°C, CL = 50pF, and RU = RD = 500Ω.

VCC = 4.5 – 5.5V VCC = 4.0V

Symbol Parameter Conditions

Units Figure

Min. Max. Min. Max.

t

, t

PHL

t

PZH ,tPZL

t

, t

PHZ

Propagation Delay

PLH

Bus-to-Bus

(4)

Output Enable Time

Output Disable Time

PLZ

= Open 0.25 0.25 ns

V

IN

= 7V for t

V

IN

V

= Open for

IN

t

PZH

= 7V for t

V

IN

V

= Open for

IN

t

PHZ

PZL

PLZ

1.5 5.9 6.4 ns

1.5 6.0 5.7 ns

Note:

4. This parameter is guaranteed by design, but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical on resistance of the switch and the 50pF load capacitance when driven by an ideal voltage source (zero output impedance).

Figure 3 Figure 4

Capacitance

TA = +25°C, f = 1MHz. Capacitance is characterized, but not tested.

Symbol Parameter Conditions Typ. Units

CIN Control Pin Input Capacitance VCC = 5.0V 3 pF C

Input/Output Capacitance VCC, /OE = 5.0V 5 pF

I/O

AC Loadings and Waveforms

Notes: Input driven by 50Ω source terminated in 50Ω.

C

includes load and stray capacitance.

L

Input PRR = 1.0MHz, t

= 500ns.

w

Figure 3. AC Test Circuit

FST3245 — 8-Bit Bus Switch

Figure 4. AC Waveforms

Physical Dimensions

20 11

B

7.60

10.65

7.40

10.00

13.00

12.60

11.43

FST3245 — 8-Bit Bus Switch

A

9.50

2.25

PIN ONE

INDICATOR

(R0.10)

8° 0°

1 10

0.51

0.35

M

0.25

BCA

2.65 MAX

0.75

X 45°

0.25

GAGE PLANE

0.25

1.27

LAND PATTERN RECOMMENDATION

SEE DETAIL A

C

0.30

0.10 C

0.10

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO JEDEC

MS-013, VARIATION AC, ISSUE E

B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD

0.65

0.33

0.20

SEATING PLANE

FLASH OR BURRS.

1.27

0.40 (1.40)

SEATING PLANE

DETAIL A

SCALE: 2:1

D) CONFORMS TO ASME Y14.5M-1994 E) LANDPATTERN STANDARD: SOIC127P1030X265-20L F) DRAWING FILENAME: MKT-M20BREV3

Figure 5. 20-Lead, Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300-inch Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Pl ease note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to v er ify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsem i.com/p ackagi ng/

Physical Dimensions

TOP VIEW

FST3245 — 8-Bit Bus Switch

LAND PATTERN

RECOMMENDATION

SIDE VIEW

END VIEW

DETAIL A

Figure 6. 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150-inch Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Pl ease note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to v er ify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsem i.com/p ackagi ng/

Physical Dimensions

FST3245 — 8-Bit Bus Switch

Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Pl ease note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to v er ify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsem i.com/p ackagi ng/

FST3245 — 8-Bit Bus Switch