Datasheet FSQ0465RU Datasheet (Fairchild)

FSQ0465RU
Green-Mode Fairchild Power Switch (FPS™) for

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

May 2009

Quasi-Resonant Operation -

Features

! Optimized for Quasi-Resonant Converters (QRC)
! Low EMI through Variable Frequency Control and AVS

(Alternating Valley Switching)

! High-Efficiency through Minimum Voltage Switching
! Narrow Frequency Variation Range over Wide Load

and Input Voltage Variation

! Advanced Burst-Mode Operation for Low Standby

Power Consumption

! Simple Scheme for Sync-Voltage Detection
! Pulse-by-Pulse Current Limit
! Various Protection Functions: Overload Protection

(OLP), Over-Voltage Protection (OVP), Abnormal
Over-Current Protection (AOCP), Internal Thermal
Shutdown (TSD) with Hysteresis, Output Short
Protection (OSP)

! Under-Voltage Lockout (UVLO) with Hysteresis
! Internal Startup Circuit
! Internal High-Voltage Sense FET (650V)
! Built-in Soft-Start (17.5ms)

Applications

! Power Supply for LCD TV and Monitor, VCR, SVR,

STB, and DVD & DVD Recorder

! Adapter

Low EMI and High Efficiency

Description

A Quasi-Resonant Converter (QRC) generally shows
lower EMI and higher power conversion efficiency than a
conventional hard-switched converter with a fixed
switching frequency. The FSQ-series is an integrated
Pulse-Width Modulation (PWM) controller and
SenseFET specifically designed for quasi-resonant
operation and Alternating Valley Switching (AVS). The
PWM controller includes an integrated fixed-frequency
oscillator, Under-Voltage Lockout (UVLO), Leading­Edge Blanking (LEB), optimized gate driver, internal soft­start, temperature-compensated precise current sources
for a loop compensation, and self-protection circuitry.
Compared with a discrete MOSFET and PWM controller
solution, the FSQ-series can reduce total cost,
component count, size, and weight; while simultaneously
increasing efficiency, productivity, and system reliability.
This device provides a basic platform for cost-effective
designs of quasi-resonant switching flyback converters.

Related Resources

Visit: http://www.fairchildsemi.com/apnotes/ for:

! AN-4134: Design Guidelines for Offline Forward

Converters Using Fairchild Power Switch (FPS

! AN-4137: Design Guidelines for Offline Flyback

Converters Using Fairchild Power Switch (FPS

! AN-4140: Transformer Design Consideration for

Offline Flyback Converters Using Fairchild Power
Switch (FPS

! AN-4141: Troubleshooting and Design Tips for

Fairchild Power Switch (FPS

! AN-4145: Electromagnetic Compatibility for Power

Converters

! AN-4147: Design Guidelines for RCD Snubber of

Flyback Converters

! AN-4148: Audible Noise Reduction Techniques for

Fairchild Power Switch (FPS

! AN-4150: Design Guidelines for Flyback Converters

Using FSQ-Series Fairchild Power Switch (FPS

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0

™

)

™

) Flyback Applications

™)

Applications

™

)

™

)

™

)

Ordering Information

Maximum Output Power

(3)

(2)

Open

Frame

(4)

Adapter

Product

Number

PKG.

Operating

(5)

Tem p.

Current

Limit

R

DS(ON)

Max.

230VAC±15%

Adapter

TO-

FSQ0465RUWDTU

For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html

220F-6L

-25 to +85°C 1.8A 4.0Ω 50W 60W 28W 40W

Notes:

1. The junction temperature can limit the maximum output power.

2. 230VAC or 100/115VAC with doubler.

3. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature.

4. Maximum practical continuous power in an open-frame design at 50°C ambient.

5. Eco Status, RoHS.

(1)

85-265V

(3)

AC

Open

Frame

Replaces

(4)

FSCM0465R
FSDM0465RE

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

Devices

.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 2

Application Diagram

AC

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

V

O

IN

V

STR

Drain

PWM

Sync

V

FB

V

CC

GND

FSQ0465 Rev. 00

Internal Block Diagram

0.35/0.55
V

Burst

OSP

LPF

FB

V

CCVref

I

delayIFB

4

tON < t

after SS

V

OSP

V

SD

V

CC

V

OVP

Figure 1. Typical Flyback Application

Sync

5

AVS

Soft­Start

PWM

TSD

VCC good

3R

R

LPF

OSC

LEB

250ns

SQQ

R

V

str

V

CC

Drain

3 16

V

V

ref

V

good

CC

S

Q

QR

AOCP

Gate

driver

CC

8V/12V

2

V

OCP

(1.1V)

GND

FSQ0465 Rev.00

Figure 2. Internal Block Diagram

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 3

Pin Configuration

6. V

STR

5. Sync

4. FB

3. V

CC

2. GND

1. Drain

FSQ0465 Rev.00

Figure 3. Pin Configuration (Top View)

Pin Definitions

Pin # Name Description

1DrainSenseFET Drain. High-voltage power SenseFET drain connection.

2GNDGround. This pin is the control ground and the SenseFET source.

3V

4FB

5 Sync

6V

CC

str

Power Supply. This pin is the positive supply input, providing internal operating current for
both start-up and steady-state operation.

Feedback. This pin is internally connected to the inverting input of the PWM comparator. The
collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should
be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload pro­tection triggers, which shuts down the FPS.

Sync

. This pin is internally connected to the sync-detect comparator for quasi-resonant switch-

ing. In normal quasi-resonant operation, the threshold of the sync comparator is 1.2V/1.0V.

Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At
startup, the internal high-voltage current source supplies internal bias and charges the exter­nal capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is
disabled. It is not recommended to connect V

and Drain together.

str

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 4

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera­ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi­tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. T

Symbol Parameter Min. Max. Unit

V

str

V

DS

V

CC

V

FB

V

Sync

I

DM

I

DSW

E

AS

P

D

T

J

T

A

T

STG

ESD Electrostatic Discharge

V

Pin Voltage 500 V

str

Drain Pin Voltage 650 V

Supply Voltage 21 V

Feedback Voltage Range -0.3 13.0 V

Sync Pin Voltage -0.3 13.0 V

Drain Current Pulsed 8.4 A

Continuous Drain Switching
Current

(6)

Single Pulsed Avalanche Energy

Total Power Dissipation (TC=25°C) 45 W

Operating Junction Temperature Internally limited °C

Operating Ambient Temperature -25 +85 °C

Storage Temperature -55 +150 °C

= 25°C, unless otherwise specified.

A

TC = 25°C 3.8 A

(7)

Human Body Model,
JESD22-A114

Charged Device Model,
JESD22-C101

100 mJ

2.0 kV

2.0 kV

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

Notes:

6. Repetitive peak switching current when inductor load is assumed : limited by maximum duty and maximum junction
temperature.

I

DS

D

MAX

f

SW

7. L=45mH, I

=2.1A, starting TJ=25°C.

AS

Thermal Impedance

TA = 25°C unless otherwise specified.

Symbol Parameter Package Value Unit

θ

JA

θ

JC

Junction-to-Ambient Thermal Resistance

Junction-to-Case Thermal Resistance

(8)

(9)

Notes:

8. Free standing with no heat-sink under natural convection.

9. Infinite cooling condition - refer to the SEMI G30-88.

TO-220F-6L

50

2.8

°

C/W

°

C/W

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 5

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

Electrical Characteristics

TA = 25°C unless otherwise specified.

Symbol Parameter Condition Min. Typ. Max. Unit

SenseFET Section

BV

DSS

I

DSS1

I

DSS2

R

DS(ON)

C

OSS

t

d(on)

t

r

t

d(off)

t

f

Control Section

t

ON.MAX

t

B

t

W

f

S

Δf

t

AVS

V

AVS

t

SW

I

FB

D

MIN

V

START

V

STOP

t

S/S

V

OVP

Burst-ModeSection

V

BURH

V

BURL

Hysteresis 200 mV

Drain Source Breakdown Voltage VCC=0V, ID=250µA 650 V

Zero-Gate-Voltage Drain Current 1 VDS=650V, VGS=0V, TC=25oC250µA

Zero-Gate-Voltage Drain Current 2 VDS=520V, VGS=0V, TC=125oC250µA

Drain-Source On-State Resistance TJ=25°C, ID=0.5A 3.5 4.0 Ω

Output Capacitance VGS=0V, VDS=25V, f=1MHz 45 pF

Turn-On Delay Time VDD=325V, ID=3.5A 12 ns

Rise Time VDD=325V, ID=3.5A 22 ns

Turn-Off Delay Time VDD=325V, ID=3.5A 20 ns

Fall Time VDD=325V, ID=3.5A 19 ns

Maximum On Time TJ=25°C 8.8 10.0 11.2 µs

Blanking Time TJ=25°C, V

Detection Time Window TJ=25°C, V

=5V 13.5 15.0 16.5 µs

sync

=0V 6.0 µs

sync

Initial Switching Frequency 59.6 66.7 75.8 kHz

Switching Frequency Variation

S

AVS Triggering
Threshold

(11)

Switching Time Variance by AVS

(11)

On Time

Feedback
Voltage

(11)

-25°C < TJ < 85°C ±5 ±10 %

at VIN=240VDC, Lm=360μH
(AVS Triggered when V
Spec. and t

AVS

< Spec.)

AVS

Sync=500kHz Sine Input
VFB=1.2V, tON=4.0µs

>

13.5 20.5 µs

4.0 µs

1.2 V

Feedback Source Current VFB=0V 700 900 1100 µA

Minimum Duty Cycle VFB=0V 0 %

UVLO Threshold Voltage

After Turn-On 7.5 8.0 8.5 V

11 12 13 V

Internal Soft-Start Time With Free-Running Frequency 17.5 ms

Over-Voltage Protection 18 19 20 V

0.45 0.55 0.65 V

Burst-Mode Voltages TJ=25°C, tPD=200ns

(10)

0.25 0.35 0.45 V

Continued on the following page...

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 6

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

Electrical Characteristics (Continued)

T

= 25°C unless otherwise specified.

A

Symbol Parameter Condition Min. Typ. Max. Unit

Protection Section

I

LIMIT

V

SD

I

DELAY

t

LEB

t

OSP

V

OSP

t

OSP_FB

T

SD

Hys Hysteresis +60

Sync Section

V

SH1

V

SL1

t

sync

V

SH2

V

SL2

V

CLAMP

Total Device Section

I

OP

I

START

I

CH

V

STR

Notes:

10. Propagation delay in the control IC.

11. Guaranteed by design; not tested in production.

12. Includes gate turn-on time.

Peak Current Limit TJ=25°C, di/dt=480mA/µs 1.6 1.8 2.0 A

Shutdown Feedback Voltage VCC=15V 5.5 6.0 6.5 V

Shutdown Delay Current VFB=5V 4 5 6 µA

Leading-Edge Blanking Time

Threshold Time

Output Short
Protection

Threshold Feedback

(11)

Voltage

Feedback Blanking Time 2.0 2.5 3.0 µs

Thermal
Shutdown

Shutdown Temperature +125 +140 +155

(11)

Sync Threshold Voltage 1 VCC = 15V, VFB=2V

Sync Delay Time

(11)(12)

Sync Threshold Voltage 2 VCC = 15V, VFB=2V

Low Clamp Voltage

(11)

TJ= 25°C
OSP Triggered When t
V

> V

FB

than t

I

SYNC_MAX

I

SYNC_MIN

and Lasts Longer

OSP

OSP_FB

=800µA,

=50µA

ON

< t

OSP

250 ns

1.2 1.4 µs

,

1.8 2.0 V

1.0 1.2 1.4

0.8 1.0 1.2

230 ns

4.3 4.7 5.1

4.0 4.4 4.8

0.0 0.4 0.8 V

°C

V

V

Operating Supply Current VCC=13V 1 3 5 mA

=10V

V

Start Current

Startup Charging Current VCC=0V, V

Minimum V

Supply Voltage 26 V

STR

CC

(Before V

Reaches V

CC

=Minimum 50V 0.65 0.85 1.00 mA

STR

START

350 450 550 µA

)

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 7

Comparison Between FSDM0x65RNB and FSQ-Series

Function FSDM0x65RE FSQ-Series FSQ-Series Advantages

Operation Method

EMI Reduction

Constant

Frequency PWM

Frequency

Modulation

Hybrid Control

Burst-Mode

Operation

Burst-Mode

Operation

Strong Protections OLP, OVP

TSD

145°C without

Hysteresis

Quasi-Resonant

Operation

Reduced

EMI Noise

CCM or AVS

Based on Load

and Input Condition

Advanced

Burst-Mode

Operation

OLP, OVP,

AOCP, OSP

140°C with 60°C

Hysteresis

! Improved efficiency by valley switching
! Reduced EMI noise
! Reduced components to detect valley point

! Valley switching
! Inherent frequency modulation
! Alternate valley switching

! Improves efficiency by introducing hybrid control

! Improved standby power by advanced burst-mode

! Improved reliability through precise AOCP
! Improved reliability through precise OSP

! Stable and reliable TSD operation
! Converter temperature range

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 8

Typical Performance Characteristics

These characteristic graphs are normalized at TA= 25°C.

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 4. Operating Supply Current (I

OP

1.2

1.0

0.8

Normalized

0.6

0.4

) vs. T

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

A

Figure 5. UVLO Start Threshold Voltage

(V

START

) vs. TA

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 6. UVLO Stop Threshold Voltage

) vs. T

(V

STOP

A

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 8. Initial Switching Frequency (fS) vs. T

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 7. Startup Charging Current (ICH) vs. T

A

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

A

Figure 9. Maximum On Time (t

ON.MAX

) vs. T

A

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 9

Typical Performance Characteristics (Continued)

These characteristic graphs are normalized at T

= 25°C.

A

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 10. Blanking Time (t

) vs. T

B

1.2

1.0

0.8

Normalized

0.6

0.4

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

A

Figure 11. Feedback Source Current (IFB) vs. TA

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 12. Shutdown Delay Current (I

DELAY

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 14. Burst-Mode Low Threshold Voltage

(V

) vs. T

burl

A

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

) vs. TA Figure 13. Burst-Mode High Threshold Voltage

(V

) vs. T

burh

A

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 15. Peak Current Limit (I

LIM

) vs. T

A

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 10

Typical Performance Characteristics (Continued)

These characteristic graphs are normalized at T

= 25°C.

A

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 16. Sync High Threshold Voltage 1

(V

) vs. T

SH1

A

1.2

1.0

0.8

Normalized

0.6

0.4

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 17. Sync Low Threshold Voltage 1

(V

) vs. TA

SL1

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 18. Shutdown Feedback Voltage (V

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 20. Sync High Threshold Voltage 2

(V

) vs. T

SH2

A

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

) vs. TA Figure 19. Over-Voltage Protection (VOV) vs. T

SD

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 21. Sync Low Threshold Voltage 2

(V

) vs. T

SL2

A

A

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 11

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

Functional Description

1. Startup: At startup, an internal high-voltage current

source supplies the internal bias and charges the
external capacitor (C

illustrated in Figure 22. When V
FPS™ begins switching and the internal high-voltage

current source is disabled. The FPS continues its normal
switching operation and the power is supplied from the
auxiliary transformer winding unless V

stop voltage of 8V.

8V/12V

FSQ0465 Rev.00

Figure 22. Startup Circuit

2. Feedback Control: FPS employs current-mode

control, as shown in Figure 23. An opto-coupler (such as
the FOD817A) and shunt regulator (such as the KA431)
are typically used to implement the feedback network.
Comparing the feedback voltage with the voltage across
the R

resistor makes it possible to control the

sense

switching duty cycle. When the reference pin voltage of
the shunt regulator exceeds the internal reference
voltage of 2.5V, the opto-coupler LED current increases,
pulling down the feedback voltage and reducing the duty
cycle. This typically happens when the input voltage is
increased or the output load is decreased.

H11A817A

KA431

V

FB

V

O

) connected to the VCC pin, as

a

reaches 12V, the

CC

CC

C

VCC

V

CC

3

I

start

V

cc good

VCCV

REF

I

delay

I

FB

4

D1 D2

C

B

OSC

3R

+

V

*

FB

R

-

goes below the

V

DC

V

STR

6

V

REF

Internal

Bias

SenseFET

Gate

driver

2.1 Pulse-by-Pulse Current Limit: Because current­mode control is employed, the peak current through the
SenseFET is limited by the inverting input of PWM
comparator (V

*), as shown in Figure 23. Assuming

FB

that the 0.9mA current source flows only through the
internal resistor (3R + R = 2.8k), the cathode voltage of
diode D2 is about 2.5V. Since D1 is blocked when the
feedback voltage (V

) exceeds 2.5V, the maximum

FB

voltage of the cathode of D2 is clamped at this voltage,
clamping V

*. Therefore, the peak value of the current

FB

through the SenseFET is limited.

2.2 Leading-Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike
usually occurs through the SenseFET, caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. Excessive voltage across the R

sense

resistor would lead to incorrect feedback operation in the
current-mode PWM control. To counter this effect, the
FPS employs a leading-edge blanking (LEB) circuit. This
circuit inhibits the PWM comparator for a short time

) after the SenseFET is turned on Pulse-Width-

(t

LEB

Modulation (PWM) Circuit

3. Synchronization: The FSQ-series employs a quasi­resonant switching technique to minimize the switching
noise and loss. The basic waveforms of the quasi­resonant converter are shown in Figure 25. To minimize
the MOSFET's switching loss, the MOSFET should be
turned on when the drain voltage reaches its minimum
value, which is indirectly detected by monitoring the V

CC

winding voltage, as shown in Figure 24.

V

ds

V

RO

V

V

sync

MOSFET Gate

V

DC

1.2V

T

F

RO

V

(8V)

ovp

1.0V

230ns Delay

OLP

R

sense

FSQ0465 Rev.00

V

SD

Figure 23. Pulse-Width-Modulation (PWM) Circuit

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 12

ON

Figure 24. Quasi-Resonant Switching Waveforms

ON

FSQ0465 Rev.00

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

The switching frequency is the combination of blank time
(tB) and detection time window (tW). In case of a heavy

load, the sync voltage remains flat after t
valley detection during t

. This leads to a low switching

W

and waits for

B

frequency not suitable for heavy loads. To correct this
drawback, additional timing is used. The timing
conditions are described in Figures 25, 26, and 27. When
the V

remains flat higher than 4.4V at the end of t

sync

which is instant tX, the next switching cycle starts after
internal delay time from tX. In the second case, the next
switching occurs on the valley when the V

4.4V within t

. Once V

B

detects the first valley in tB, the

sync

goes below

sync

other switching cycle follows classical QRC operation.

t

DS

> 4.4V at t

sync

X

t

X

I

DS

4.4V

1.2V

1.0V

FSQ0465 Rev.00

X

I

DS

tB=15µs

I

DS

V

sync

internal delay

Figure 25. V

tB=15µs

I

DS

V

t

tB=15µs

I

DS

B

V

DS

V

sync

internal delay

Figure 27. After V

X

ingnore

Finds First Valley

sync

I

DS

4.4V

FSQ0465 Rev.00

4. Protection Circuits: The FSQ-series has several self­protective functions, such as Overload Protection (OLP),
Abnormal Over-Current Protection (AOCP), Over­Voltage Protection (OVP), and Thermal Shutdown
(TSD). All the protections are implemented as auto­restart mode. Once the fault condition is detected,
switching is terminated and the SenseFET remains off.
This causes V

to fall. When VCC falls down to the

CC

Under-Voltage Lockout (UVLO) stop voltage of 8V, the
protection is reset and the startup circuit charges the

capacitor. When the VCC reaches the start voltage

V

CC

of 12V, normal operation resumes. If the fault condition is
not removed, the SenseFET remains off and V

to stop voltage again. In this manner, the auto-restart can
alternately enable and disable the switching of the power
SenseFET until the fault condition is eliminated.
Because these protection circuits are fully integrated into
the IC without external components, reliability is
improved without increasing cost.

Fault

Power

V

DS

on

occurs

Fault

removed

1.2V

1.0V

CC

drops

V

DS

V

CC

12V

8V

FSQ0465 Rev.00

Normal

operation

Fault

situation

Normal

operation

t

V

sync

internal delay

Figure 26. V

sync

< 4.4V at t

4.4V

1.2V

1.0V

FSQ0465 Rev.00

X

Figure 28. Auto Restart Protection Waveforms

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 13

4.1 Overload Protection (OLP): Overload is defined as

the load current exceeding its normal level due to an
unexpected abnormal event. In this situation, the
protection circuit should trigger to protect the SMPS.
However, even when the SMPS is in the normal
operation, the overload protection circuit can be
triggered during the load transition. To avoid this
undesired operation, the overload protection circuit is
designed to trigger only after a specified time to
determine whether it is a transient situation or a true
overload situation. Because of the pulse-by-pulse
current limit capability, the maximum peak current
through the SenseFET is limited, and therefore the
maximum input power is restricted with a given input
voltage. If the output consumes more than this maximum
power, the output voltage (V

) decreases below the set

O

voltage. This reduces the current through the opto­coupler LED, which also reduces the opto-coupler
transistor current, thus increasing the feedback voltage

). If VFB exceeds 2.5V, D1 is blocked and the 5µA

(V

FB

current source starts to charge C

slowly up to VCC. In

B

this condition, VFB continues increasing until it reaches
6V, when the switching operation is terminated, as

shown in Figure 29. The delay time for shutdown is the
time required to charge C

from 2.5V to 6V with 5µA. A

FB

20 ~ 50ms delay time is typical for most applications.

V

6.0V

FB

Overload protection

FSQ0465 R ev.00

3R

R

FSQ0465 Rev.00

AOCP

PWM

OSC

LEB

200ns

SQQ

R

Gate

driver

R

+

-

sense

V

OCP

2

GND

Figure 30. Abnormal Over-Current Protection

4.3 Output-Short Protection (OSP)

: If the output is
shorted, steep current with extremely high di/dt can flow
through the SenseFET during the LEB time. Such a
steep current brings high voltage stress on the drain of
SenseFET when turned off. To protect the device from
such an abnormal condition, OSP is included in the FSQ­series. It is comprised of detecting V

turn-on time. When the V

is higher than 2V and the

FB

and SenseFET

FB

SenseFET turn-on time is lower than 1.2µs, the FPS
recognizes this condition as an abnormal error and shuts
down PWM switching until V

reaches V

CC

again. An

start

abnormal condition output short is shown in Figure 31.

MOSFET

Drain

Current

V

FB

Rectifier

Diode

Current

Turn-off de lay

I

LIM

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

2.5V

t12= Cfb*(6.0-2.5)/I

T

1

delay

t

T

2

Figure 29. Overload Protection

4.2 Abnormal Over-Current Protection (AOCP): When

the secondary rectifier diodes or the transformer pins are
shorted, a steep current with extremely high di/dt can
flow through the SenseFET during the LEB time. Even
though the FSQ-series has overload protection, it is not
enough to protect the FSQ-series in that abnormal case,
since severe current stress is imposed on the SenseFET
until OLP triggers. The FSQ-series has an internal
AOCP circuit shown in Figure 30. When the gate turn-on
signal is applied to the power SenseFET, the AOCP
block is enabled and monitors the current through the
sensing resistor. The voltage across the resistor is
compared with a preset AOCP level. If the sensing
resistor voltage is greater than the AOCP level, the set
signal is applied to the latch, resulting in the shutdown of
the SMPS.

0

V

o

D

Minimum turn-on time

1.2µs

output short occurs

0

I

o

0

FSQ0465 Rev. 00

Figure 31. Output Short Waveforms

4.4 Over-Voltage Protection (OVP): If the secondary

side feedback circuit malfunctions or a solder defect
causes an opening in the feedback path, the current
through the opto-coupler transistor becomes almost
zero. Then, V

climbs up in a similar manner to the

fb

overload situation, forcing the preset maximum current
to be supplied to the SMPS until overload protection is
activated. Because more energy than required is
provided to the output, the output voltage may exceed
the rated voltage before overload protection is activated,
resulting in the breakdown of the devices in the
secondary side. To prevent this situation, an over-voltage
protection (OVP) circuit is employed. In general, V

CC

is

proportional to the output voltage and the FSQ-series
uses V

voltage. If V

instead of directly monitoring the output

CC

exceeds 19V, an OVP circuit is activated,

CC

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 14

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

resulting in the termination of the switching operation. To
avoid undesired activation of OVP during normal
operation, VCC should be designed below 19V.

4.5 Thermal Shutdown with Hysteresis (TSD): The
SenseFET and the control IC are built in one package.
This enables the control IC to detect the abnormally high
temperature of the SenseFET. If the temperature
exceeds approximately 140°C, the thermal shutdown
triggers IC shutdown. The IC recovers its operation when
the junction temperature decreases 60°C from TSD
temperature and V

reaches startup voltage (V

CC

start

).

5. Soft-Start: The FPS has an internal soft-start circuit
that increases PWM comparator inverting input voltage
with the SenseFET current slowly after it starts up. The
typical soft-start time is 17.5ms. The pulse width to the
power switching device is progressively increased to
establish the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention of
smoothly establishing the required output voltage. This
mode helps prevent transformer saturation and reduces
stress on the secondary diode during startup.

6. Burst Operation: To minimize power dissipation in
standby mode, the FPS enters burst-mode operation. As
the load decreases, the feedback voltage decreases. As
shown in Figure 32, the device automatically enters
burst-mode when the feedback voltage drops below

(350mV). At this point, switching stops and the

V

BURL

output voltages start to drop at a rate dependent on
standby current load. This causes the feedback voltage
to rise. Once it passes V

(550mV), switching

BURH

resumes. The feedback voltage then falls and the
process repeats. Burst-mode operation alternately
enables and disables switching of the power SenseFET,
thereby reducing switching loss in standby mode.

V

O

set

Vo

V

FB

0.55V

0.35V

I

DS

V

DS

FSQ0465 Rev. 00

Switching

disabled

t1 t2 t3

Switching

disabled

time

t4

Figure 32. Waveforms of Burst Operation

7. Switching Frequency Limit: To minimize switching

loss and Electromagnetic Interference (EMI), the
MOSFET turns on when the drain voltage reaches its
minimum value in quasi-resonant operation. However,
this causes switching frequency to increases at light-load
conditions. As the load decreases or input voltage
increases, the peak drain current diminishes and the
switching frequency increases. This results in severe
switching losses at light-load condition, as well as
intermittent switching and audible noise. These problems
create limitations for the quasi-resonant converter
topology in a wide range of applications.

To overcome these problems, FSQ-series employs a
frequency-limit function, as shown in Figures 33 and
Figure 34. Once the SenseFET is turned on, the next
turn-on is prohibited during the blanking time (t

). After

B

the blanking time, the controller finds the valley within
the detection time window (t

) and turns on the

W

MOSFET, as shown in Figures 33 and Figure 34 (Cases
A, B, and C). If no valley is found during t

SenseFET is forced to turn on at the end of t

, the internal

W

(Case D).

W

Therefore, the devices have a minimum switching
frequency of 48kHz and a maximum switching frequency
of 67kHz.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 15

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

μ

I

DS

I

DS

I

t

=15μs

B

tB=15μs

DS

I

DS

max

t

=21μs

s

t

s

tB=15μs

t

s

t

s

8. AVS (Alternating Valley Switching): Due to the
quasi-resonant operation with limited frequency, the

I

DS

switching frequency varies depending on input voltage,
load transition, and so on. At high input voltage, the
switching on time is relatively small compared to low

V

DS

A

input voltage. The input voltage variance is small and the
switching frequency modulation width becomes small. To
improve the EMI performance, AVS is enabled when
input voltage is high and the switching on time is small.

I

DS

B

V

DS

Internally, quasi-resonant operation is divided into two
categories; one is first-valley switching and the other is
second-valley switching after blanking time. In AVS, two
successive occurrences of first-valley switching and the
other two successive occurrences of second-valley
switching is alternatively selected to maximize frequency
modulation. As depicted in Figure 34, the switching
frequency hops when the input voltage is high. The
internal timing diagram of AVS is described in Figure 35.

I

DS

V

DS

I

DS

C

f

67kHz

59kHz

53kHz

48kHz

s

Constant

frequency

CCM

Assume the resonant period is 2 s

AVS trigger point

Variable frequency within limited range

DCM

AVS region

1

sμ15

1

sμ17

1

s19

μ

1

sμ21

V

DS

t

=15μs

B

tW=6μs

max

=21μs

t

s

D

FSQ0465 Rev. 00

Figure 33. QRC Operation with Limited Frequency

V

gate

GateX2

One-shot

AVS

V

DS

FSQ0465 Rev. 00

Synchronize

fixed

triggering

GateX2: Counti ng V

1st or 2nd is depend on GateX2

t

B

Synchronize

V

continued 2 pulses

gate

fixed

de-triggering

t

B

every 2 pulses independent on other signals .

gate

V

2 nd valley switching 1st valley switching

fixed

triggering

continued another 2 pulses

gate

t

B

DBCA

V

FSQ0465 Rev.00

IN

Figure 34. Switching Frequency Range

V

continued 2 pulses

gate

1st valley switching

fixed fixed fixed

1st or 2nd is dependent on GateX 2

t

B

1st valley- 2nd valley frequency modulation.

Modulation frequency is approximatel y 17kHz.

t

B

t

B

Figure 35. Alternating Valley Switching (AVS)

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 16

PCB Layout Guide

Due to the combined scheme, FPS shows better noise
immunity than conventional PWM controller and
MOSFET discrete solutions. Furthermore, internal drain
current sense eliminates noise generation caused by a
sensing resistor. There are some recommendations for
PCB layout to enhance noise immunity and suppress the
noise inevitable in power-handling components.

There are typically two grounds in the conventional
SMPS: power ground and signal ground. The power
ground is the ground for primary input voltage and
power, while the signal ground is ground for PWM
controller. In FPS, those two grounds share the same
pin, GND. Normally the separate grounds do not share
the same trace and meet only at one point, the GND pin.
More, wider patterns for both grounds are good for large
currents by decreasing resistance.

Capacitors at the V
possible to the corresponding pins to avoid noise from

the switching device. Sometimes Mylar® or ceramic
capacitors with electrolytic for V

operation. The ground of these capacitors needs to
connect to the signal ground (not power ground).

The cathode of the snubber diode should be close to the
Drain pin to minimize stray inductance. The Y-capacitor
between primary and secondary should be directly
connected to the power ground of DC link to maximize
surge immunity.

Because the voltage range of feedback and sync line is
small, it is affected by the noise of the drain pin. Those
traces should not draw across or close to the drain line.

When the heat sink is connected to the ground, it should
be connected to the power ground. If possible, avoid
using jumper wires for power ground and drain.

and FB pins should be as close as

CC

is better for smooth

CC

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

Figure 36. Recommended PCB Layout

Mylar® is a registered trademark of DuPont Teijin Films.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 17

Typical Application Circuit

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

Application FPS™ Device

LCD Monitor

Power Supply

FSQ0465RU 85-265V

Input Voltage

Range

AC

Rated Output Power

36W

Output Voltage

(Maximum Current)

5.0V (2.0A)
14V (1.8A)

Features

! Average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input
! Low standby mode power consumption (<1W at 230V

input and 0.5W load)

AC

! Reduce EMI noise through valley switching operation
! Enhanced system reliability through various protection functions
! Internal soft-start (17.5ms)

Key Design Notes

! The delay time for overload protection is designed to be about 23ms with C105 of 33nF. If faster/slower triggering of

OLP is required, C105 can be changed to a smaller/larger value (e.g. 100nF for 70ms).

! The input voltage of V

to avoid OVP triggering during normal operation.

! The SMD-type 100nF capacitor must be placed as close as possible to V

sating noises and to improve surge immunity.

must be between 4.7V and 8V just after MOSFET turn-off to guarantee hybrid control and

Sync

pin to avoid malfunction by abrupt pul-

CC

1. Schematic

R202

1.2kΩ

L201

5μH

L202

5μH

R203
18kΩ

C202

1000μF

25V

C204

1000μF

10V

C205
47nF

14V, 1.8A

5V, 2A

R204

8kΩ

R205

8kΩ

FSQ0465 Rev.00

BD101

2KBP06M

RT1

5D-11

D201

T1

MBRF10H100

EER3016

C301

4.7nF
1kV

IC301

FOD817A

10

C201

1000μF

25V

8

D202

MBRF1060

7

C203

2200μF

10V

6

R201
1kΩ

KA431

IC201

1

FSQ0465RU

V

str

Sync

Vfb

GND

Drain

2

Vcc

C104

3.3nF
630V

1

R105
100Ω

0.5W

3

ZD101

1N4745A

C106
100nF

SMD

D101

1N 4007

C107
47μF

50V

D102

UF 4004

R107
39kΩ

R108
33kΩ

2

3

4

5

C105
33nF
100V

R103
51kΩ

1W

6

5

4

R102
75kΩ

C103

100μF

2

1

C102

150nF

275VAC

LF101
20mH

R101
2MΩ

1W

400V

3

4

Optional components

C101
150nF
275V

AC

F1

FUSE

250V

2A

Figure 37. Demo Circuit of FSQ0465RU

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 18

2. Transformer

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

Barrier tape

Np/2

Np/2

EER3019

1

2

3

4

N

a

5

10

N

14V

9

8

7

N

5V

6

Np/2

2

45

N

a

N

7

5V

8

N

14V

10

N

8

5V

3

Np/2

BOT

Figure 38. Transformer Schematic Diagram of FSQ0465RU

3. Winding Specification

Position No Pin (s→f) Wire Turns Winding Method

Bottom

Top

Np/2 3 → 20.35φ × 1 22 Solenoid Winding - - 1

Insulation: Polyester Tape t = 0.025mm, 2 Layers

N

5V

8 → 9 0.4φ × 3(TIW) 3 Solenoid Winding - -

Insulation: Polyester Tape t = 0.025mm, 2 Layers

N

14V

10 → 80.4φ × 3(TIW) 5 Solenoid Winding - -

Insulation: Polyester Tape t = 0.025mm, 2 Layers

N

5V

7 → 6 0.4φ × 3(TIW) 3 Solenoid Winding - -

Insulation: Polyester Tape t = 0.025mm, 2 Layers

N

4 → 5 0.2φ × 1 6 Solenoid Winding 5.0mm 2.0mm 1

a

Insulation: Polyester Tape t = 0.025mm, 2 Layers

/2 2 → 10.35φ × 1 21 Solenoid Winding - 2.0mm 1

N

p

Insulation: Polyester Tape t = 0.025mm, 2 Layers

1

6

9

2

TOP

Barrier Tape

TOP BOT Ts

4. Electrical Characteristics

Pin Specification Remarks

Inductance 1 - 3 700µH ± 6% 67kHz, 1V

Leakage 1 - 3 15µH Maximum Short all other pins

5. Core & Bobbin

! Core: EER3019 (Ae=137mm
! Bobbin: EER3019

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 19

2

)

6. Demo Board Part List

Part Value Note Part Value Note

Resistor C301 4.7nF/1kV Ceramic Capacitor

R101 1MΩ 1W Inductor

R102 75kΩ 1/2W L201 5µH 5A Rating

R103 51kΩ 1W L202 5µH 5A Rating

R105 100Ω optional, 1/4W Diode

R107 39kΩ 1/4W D101 IN4007

R108 33kΩ 1/4W D102 UF4004 1A, 400V Ultrafast Rectifier

R201 1kΩ 1/4W ZD101 1N4745A

R202 1.2kΩ 1/4W D201 MBRF10H100 10A,100V Schottky Rectifier

R203 18kΩ 1/4W D202 MBRF1060 10A,60V Schottky Rectifier

R204 8kΩ 1/4W IC

R205 8kΩ 1/4W IC101 FSQ0465RU FPS™

Capacitor IC201 KA431 (TL431) Voltage Reference

C101 150nF/275V

C102 150nF/275V

AC

AC

Box Capacitor IC202 FOD817A Opto-Coupler

Box Capacitor Fuse

C103 100µF/400V Electrolytic Capacitor Fuse 2A/250V

C104 3.3nF/630V Film Capacitor NTC

C105 33nF/50V Ceramic Capacitor RT101 5D-11

C106 100nF/50V SMD (1206) Bridge Diode

C107 47µF/50V Electrolytic Capacitor BD101 2KBP06M Bridge Diode

C201 1000µF/25V

C202 1000µF/25V

C203 2200µF/10V

C204 1000µF/10V

Low-ESR Electrolytic

Capacitor

Low-ESR Electrolytic

Capacitor

Low-ESR Electrolytic

Capacitor

Low-ESR Electrolytic

Capacitor

LF101 20mH

T1 EER3019 Ae=137mm

C205 47nF/50V Ceramic Capacitor

1A, 1000V General-Purpose

Rectifier

1W 16V Zener Diode

(optional)

Line Filter

Transformer

2

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 20

Package Dimensions

TO-220F-6L (Forming)

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

MKT-TO220A06revB

Figure 39. 6-Lead, TO-220 Package

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 21

/.

FSQ0465RU — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FSQ0465RU Rev. 1.0.0 22