Datasheet FSLV16211 Datasheet (Fairchild)

FSLV16211 — 24-Bit Bus Switch

FSLV16211 ⎯ 24-Bit Bus Switch

October 2010

Features



5Ω Switch Connection between Two Ports

 Minimal Propagation Delay through the Switch  Low l

CC

 Zero Bounce in Flow-Through Mode  Packaged in Thin-Shrink Small Outline Package

(TSSOP)

Ordering Information

Operating

Part Number

FSLV16211MTDX -40°C to 85°C

Temperature

Range

56-Lead, Thin Shrink Small Outline Package (TSSOP), JEDEC M0-153, 6.1mm Wide

Description

The FSLV16211 is a 24-bit, high-speed, low-voltage bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.

This design can be used as a 12- or 24-bit bus switch. When /OE1 is LOW, port 1A is connected to Port 1B. When /OE2 is LOW, port 2A is connected to Port 2B.

Package Packing Method

Tape and Reel

1A

1

1A

12

/OE

1

2A

1

2A

12

/OE

2

Figure 1. Logic Diagram

1B

2B

1

12

1

12

Connection Diagram

FSLV16211 ⎯ 24-Bit Bus Switch

Pin Description

Truth Table

OE1 OE2 1A,1B 2A, 2B

Low Low 1A=1B 2A=2B

Low High 1A=1B Z

High Low Z 2A=2B

High High Z Z

Figure 2. Pin Assignments for TSSOP

(Top Through View)

Pin Name Description

OE1, OE2 Bus Switch Enables

1A, 2A Bus A

1B, 2B Bus B

NC No Connect

Inputs Inputs/Outputs

FSLV16211⎯ 24-Bit Bus Switch

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

Symbol Parameter Min. Max. Unit

VCC Supply Voltage -0.5 4.6 V

VS DC Switch Voltage

VIN DC Input Voltage -0.5 4.6 V

IIK DC Input Diode Current -50 mA

I

DC Output Sink Current 128 mA

OUT

ICC/I

DC VCC/GND Current ±100 mA

GNG

T

Storage Temperature Range -65 150 °C

STG

Note:

1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed.

(1)

-0.5 4.6 V

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol Parameter Min. Max. Unit

VCC Power Supply Operating Voltage 2.3 3.6 V

VIN Input Voltage 0 3.6 V

V

Output Voltage 0 3.6 V

OUT

tr, tf Input Rise and Fall Time

TA Free Air Operating Temperature -40 85 °C

Note:

2. Unused control inputs must be held HIGH or LOW. They may not float.

Switch Control Input 0 4.0 ns/V

Switch I/O 0 DC ns/V

(2)

DC Electrical Characteristics

Not all conditions may appear on all switch types.

= -40°C to +85°C

T

Symbol Parameter Conditions

VCC

(V)

VIK Clamp Diode Voltage IIN = -18mA 3.0 -1.2 V

VIH

VIL

HIGH Level Control Input Voltage

LOW Level Control Input Voltage

IL Input Leakage Current

ICC Quiescent Supply Current

∆ICC Increase in ICC per Input

IOZ Off-State Leakage

Force VI = 3.6V, I

= 0.0A

OUT

Force VI = 3.6V 0.0 10

0 ≤ VIN ≤ 3.6V

= VCC or GND,

V

IN

I

= 0A

OUT

One Input at 3V Other Inputs at V

or GND

CC

0.0 ≤ A, B ≤ 3.6V

= 64mA, VI = 0.0V 3.0 5 7

I

IN

2.3-2.7 1.7

2.7-3.6 2.0

2.3-2.7 0.7

2.7-3.6 0.8

2.3 10

3.6 1

3.6 10 µA

3.6 300 µA

3.6 -1 1 µA

IIN = 30mA, VI = 0.0V 3.0 5 7

IIN = 15mA, VI = 2.4V 3.0 10 15

RON Switch On Resistance

IIN = 15mA, VI = 3.0V 2.3 20

IIN = 64mA, VI = 0.0V 2.3 5 8

IIN = 30mA, VI = 0.0V 2.3 5 8

IIN = 15mA, VI = 1.7V 2.3 10 15

IIN = 15mA, VI = 2.0V 2.3 20

A

Min. Typ. Max.

FSLV16211⎯ 24-Bit Bus Switch

Unit

V

µA

Ω

AC Electrical Characteristics

=-40°C to +85°C TA=40°C to +85°C

T

A

Symbol Parameter

t

PHL

PHZ

PZH

, t

PLH

, t

Propagation Delay

Enable Time 0.5 4.7 1.0 7.0 ns

PLZ

Disable Time 0.5 5.1 1.0 5.5 ns

PZL

Note:

3. This parameter is guaranteed by design, but is not production tested. The bus switch contributes no propagation delay other than the RC delay of the typical on resistance of the switch and the load capacitance when driven by an ideal voltage source (zero output impedance).

(3)

0.15 0.25 ns

CL=30pF, RL=500Ω CL=50pF, RL=500Ω

Unit

VCC = 2.5V ± 0.20V VCC=3.3V ± 0.30V

Min. Max. Min. Max.

Capacitance

TA = +25°C, f = 1MHz, unless otherwise noted. Capacitance is characterized, but not production tested.

Symbol Parameter Conditions Min. Typ. Max. Unit

CIN Control Pin Input Capacitance VCC – 3.3V 4.5 pF

C

Input/Output Capacitance VCC, /OE= 3.3V 18 pF

I/O

AC Loading Waveforms

FSLV16211⎯ 24-Bit Bus Switch

TEST SWITCH

tPD Open

t

PLZ/tPZL

t

PHZ/tPZH

GND

VIN

Figure 3. AC Test Circuit

Figure 4. AC Waveforms

VCC

Symbol 3.3V ± 0.3V 2.5V ± 0.2V

VMI 1.5V VCC/2

VMO 1.5V VCC/2

V

0.3V 0.15V

MVO

VIN 6.0V 2 x VCC

V

3.0V VCC

CCV

tr/tf 2ns 2.5ns

Physical Dimensions

FSLV16211⎯ 24-Bit Bus Switch

A

56

B

51 34

29

8.10

-C-

4.05

0.50

0.1

7.6

6.15

9.125

1.45

0.2

CBA

C

0.10 AB C

1

623

0.30

0.50

28

0.25

MTD56REV3

Figure 5. 56-Lead Thin-Shrink Small Outline Package (TSSOP), JEDEC MO153, 6.1mm Wide

Package drawings are provided as a service to customers c onsidering Fairchild components. Drawi ngs may change in any manner without notice. Pl ease note the revision and/or date on the drawing and contact a Fairchild Semic onductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsem i.com/p ackagi ng/

.

FSLV16211⎯ 24-Bit Bus Switch