Datasheet FSFM260N, FSFM261N, FSFM300N Datasheet (Fairchild)

FSFM260N / FSFM261N / FSFM300N Green-Mode Fairchild Power Switch (FPS™)

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

August 2009

Features

! Internal Avalanche-Rugged SenseFET ! Advanced Burst-Mode Operation Consumes Under

1W at 240VAC and 0.5W Load

! Precision Fixed Operating Frequency: 67kHz ! Internal Startup Circuit ! Over-Voltage Protection (OVP) ! Overload Protection (OLP) ! Internal Thermal Shutdown Function (TSD) ! Abnormal Over-Current Protection (AOCP) ! Auto-Restart Mode ! Under-Voltage Lockout (UVLO) with Hysteresis ! Low Operating Current: 2.5mA ! Built-in Soft-Start: 15ms

Applications

! Power Supply for LCD TV and Monitor, VCR, SVR,

STB, DVD, and DVD Recorder

! Adapter

Related Resources

Visit: http://www.fairchildsemi.com/apnotes/ for:

! AN-4134: Design Guidelines for Offline Forward

Converters Using Fairchild Power Switch (FPS

! AN-4137: Design Guidelines for Offline Flyback

Converters Using Fairchild Power Switch (FPS

! AN-4140: Transformer Design Consideration for

Offline Flyback Converters Using Fairchild Power Switch (FPS

! AN-4141: Troubleshooting and Design Tips for

Fairchild Power Switch (FPS

! AN-4145: Electromagnetic Compatibility for Power

™

)

™

) Flyback Applications

Converters

! AN-4147: Design Guidelines for RCD Snubber of

Flyback Converters

! AN-4148: Audible Noise Reduction Techniques for

Fairchild Power Switch (FPS

™)

Applications

™

)

™

)

Description

The FSFM260/261/300 is an integrated Pulse Width Modulator (PWM) and SenseFET specifically designed for high-performance offline Switch Mode Power Supplies (SMPS) with minimal external components.

This device is an integrated high-voltage powerswitching regulator that combines an avalanche-rugged SenseFET with a current-mode PWM control block. The PWM controller includes an integrated fixed-frequency oscillator, under-voltage lockout, leading-edge blanking (LEB), optimized gate driver, internal soft-start, temperature-compensated precise-current sources for a loop compensation, and self-protection circuitry. Compared with discrete MOSFET and PWM controller solutions, it can reduce total cost, component count, size, and weight while simultaneously increasing efficiency, productivity, and system reliability. This device is a basic platform for cost-effective designs of flyback converters.

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1

Ordering Information

Maximum Output Power

Product

Number

FSFM260N 8-DIP -25 to +85°C 1.5A 2.6Ω 23W 35W 17W 26W

FSFM261N 8-DIP -25 to +85°C 1.5A 2.7Ω 23W 35W 17W 26W

FSFM300N 8-DIP -25 to +85°C 1.6A 2.2Ω 26W 40W 20W 30W

PKG.

(5)

Operating

Temp.

Current

Limit

R

DS(ON)

Max.

230VAC±15%

Adapter

(3)

(2)

Open

Frame

(4)

Adapter

Notes:

1. The junction temperature can limit the maximum output power.

2. 230V

or 100/115VAC with doubler.

AC

3. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature.

4. Maximum practical continuous power in an open-frame design at 50°C ambient.

5. Eco status for all the FSFM260N, FSFM261N and FSFM300NS is RoHS.

For Fairchild’s definition of Eco Status, please visit:

http://www.fairchildsemi.com/company/green/rohs_green.html. Eco Status: RoHS.

(1)

85-265V

(3)

AC

Open

Frame

Replaces

Devices

(4)

FSDM0465RS FSQ0465RS

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 2

Application Diagram

AC

IN

V

STR

Drain

I

LIM

PWM

GND

FB

V

CC

Figure 1. Typical Flyback Application

V

FSFM260 Rev. 00

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

O

Internal Block Diagram

V

BURL/VBURH

V

CC

I

FB

I

3

LIM

4

delayIFB

V

SD

V

CC

V

OVP

2.5R

TSD

R

Normal

Burst

LPF

SoftStart

PWM

VCC good

OSC

LEB

250ns

SQQ

R

V

str

V

ref

good

V

CC

S

Q

QR

Gate

driver

CC

2 85

V

CC

8V/12V

Drain

76

1

V

OCP

GND

FSFM260 Rev.00

Figure 2. Internal Block Diagram

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 3

Pin Configuration

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

GND

V

FB

I

LIM

CC

FSFM260 Rev.1.0.0

8-DIP

Drain

V

STR

Figure 3. Pin Configuration (Top View)

Pin Definitions

Pin # Name Description

1GNDGround. This pin is the control ground and the SenseFET source.

2V

3FB

4I

5V

LIM

STR

6,7,8 Drain SenseFET Drain. High-voltage power SenseFET drain connection.

Power Supply. This pin is the positive supply input, providing internal operating current for

CC

both startup and steady-state operation.

Feedback. This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload protection triggers, which shuts down the FPS.

Peak Current Limit. Adjusts the peak current limit of the Sense FET. The feedback 0.9mA current source is diverted to the parallel combination of an internal 2.8kΩ resistor and any external resistor to GND on this pin to determine the peak current limit.

Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At startup, the internal high-voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is disabled. It is not recommended to connect V

and drain together.

STR

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 4

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. T

Symbol Parameter Min. Max. Unit

V

STR

V

DS

V

DS

V

CC

V

FB

I

DM

I

D

E

AS

P

T

STG

ESD

D

J

A

V

Pin Voltage 650 V

STR

1 Drain Pin Voltage of FSFM260N and FSFM300N 650 V

2 Drain Pin Voltage of FSFM261N 700 V

Supply Voltage 21 V

Feedback Voltage Range

(6)

Drain Current Pulsed 9.6 A

Continuous Drain Current of FSFM260 and FSFM261

Continuous Drain Current of FSFM300

(7)

Single Pulsed Avalanche Energy

Total Power Dissipation (TC=25°C) 1.5 W

Operating Junction Temperature Internally Limited °C

Operating Ambient Temperature -25 +85 °C

Storage Temperature -55 +150 °C

Electrostatic Discharge Capability Human Body Model, JESD22-A114

Electrostatic Discharge Capability, Charged Device Model, JESD22-C110

= 25°C, unless otherwise specified.

A

-0.3 8.0 V

TC = 25°C 2.2

= 100°C 1.4

T

C

TC = 25°C 2.8

= 100°C 1.7

T

C

FSFM260 and FSFM261 120

(8)

FSFM300 190

2.0

A

mJ

kV

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

Notes:

6. VFB is internally clamped and its maximum clamping current capability is 100μA.

7. Repetitive rating: pulse-width limited by maximum junction temperature.

8. L=14mH, starting T

=25°C.

J

Thermal Impedance

TA = 25°C unless otherwise specified.

Symbol Parameter Package Value Unit

(11)

(10)

(9)

8-DIP

80

20

35

θ

JA

θ

JC

Ψ

JT

Junction-to-Ambient Thermal Resistance

Junction-to-Case Thermal Resistance

Junction-to-Top Thermal Resistance

Notes:

9. Free standing with no heat-sink under natural convection.

10. Infinite cooling condition - refer to the SEMI G30-88.

11. Measured on the package top surface.

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 5

°

C/W

°

C/W

°

C/W

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

Electrical Characteristics

TA = 25°C unless otherwise specified.

Symbol Parameter Condition Min. Typ. Max. Unit

SenseFET Section

BV

DSS

BV

DSS

I

DSS1

I

DSS2

R

DS(ON)

C

OSS

t

d(on)

t

d(off)

t

C

OSS

t

d(on)

t

d(off)

t

Control Section

f

OSC

Δf

STABLE

Δf

OSC

I

FB

D

MAX

D

MIN

V

START

V

STOP

t

S/S

Burst Mode Section

V

BURH

V

BURL

Drain Source Breakdown Voltage of

1

FSFM260 and FSFM300

Drain Source Breakdown Voltage of

2

FSFM261

Zero Gate Voltage Drain Current1

Zero Gate Voltage Drain Current2

Static Drain Source on Resistance of FSFM260

Static Drain Source on Resistance of FSFM261

Static Drain Source on Resistance of FSFM300

(12)

VCC = 0V, ID = 250µA 650 V

VCC = 0V, ID = 250µA 700 V

= 650V, VGS = 0V,

V

DS

= 25°C

T

C

V

= 520V, VGS = 0V,

DS

TC = 125°C

2.20 2.60 Ω

VGS = 10V, ID = 2.5A

2.30 2.70 Ω

1.76 2.20 Ω

Output Capacitance of FSFM260/261 VGS = 0V, VDS = 25V, f = 1MHz 60 pF

Turn-On Delay Time of FSFM260/261

Rise Time of FSFM260/261 20

r

Turn-Off Delay Time of FSFM260/261 30

Fall Time of FSFM260/261 16

f

VDD = 325V, ID = 5A

12

Output Capacitance of FSFM300 VGS = 0V, VDS = 25V, f = 1MHz 75 pF

Turn-On Delay Time of FSFM300

Rise Time of FSFM300 26

r

Turn-Off Delay Time of FSFM300 32

Fall Time of FSFM300 25

f

VDD = 325V, ID = 5A

14

Switching Frequency VFB = 3V 61 67 73 kHz

Switching Frequency Stability 13V ≤ VCC ≤ 18V 0 1 3 %

Switching Frequency Variation

(13)

-25°C ≤ TA ≤ 85°C 0 ±5 ±10 %

Feedback Source Current VFB = GND 0.7 0.9 1.1 mA

Maximum Duty Cycle 71 77 83 %

Minimum Duty Cycle 0 %

UVLO Threshold Voltage VFB = GND

11 12 13 V

789V

Internal Soft-Start Time VFB = 3V 10 15 20 ms

Burst Mode Voltages VCC = 14V

0.50 V

0.35 V

250 µA

ns

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 6

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

Electrical Characteristics (Continued)

T

= 25°C unless otherwise specified.

A

Symbol Parameter Condition Min. Typ. Max. Unit

Protection Section

V

SD

I

DELAY

t

LEB

I

LIMIT

V

OVP

T

SD

Total Device Section

I

OP

I

START

I

CH

V

STR

Shutdown Feedback Voltage VFB ≥ 5.5V 5.5 6.0 6.5 V

Shutdown Delay Current VFB = 5V 3.5 5.0 6.5 µA

Leading Edge Blanking Time

Peak Current Limit

(13)

FSFM260/ FSFM261

TJ = 25°C, di/dt = 200mA/µs

200 ns

1.32 1.50 1.68 A

FSFM300 1.41 1.60 1.79

Over-Voltage Protection 18.0 19.0 20.5 V

Thermal Shutdown Temperature

Operating Supply Current

Start Current

Startup Charging Current

Minimum V

Supply Voltage

STR

(13)

= GND, VCC = 14V

V

FB

V

= 10V (before VCC

CC

reaches V

V

CC

at I

= 0V, V

IN

STR

START

=I

START

STR

)

=min. 50V

125 140 °C

135mA

150 200 250 µA

0.70 0.85 1.00 mA

24 V

Notes:

12. Pulse test: pulse width ≤ 300µs, duty ≤ 2%.

13. Guaranteed by design; not tested in production.

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 7

Typical Performance Characteristics

Graphs are normalized at TA= 25°C.

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 4. Operating Supply Current (I

OP

1.2

1.0

0.8

Normalized

0.6

0.4

) vs. T

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

A

Figure 5. UVLO Start Threshold Voltage

(V

START

) vs. TA

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 6. UVLO Stop Threshold Voltage

) vs. T

(V

STOP

A

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 8. Switching Frequency (f

OSC

) vs. T

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 7. Startup Charging Current (ICH) vs. T

A

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

A

Figure 9. Maximum Duty Cycle (D

MAX

) vs. T

A

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 8

Typical Performance Characteristics (Continued)

Graphs are normalized at T

= 25°C.

A

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 10. Over-Voltage Protection (V

OVP

1.2

1.0

0.8

Normalized

0.6

0.4

) vs. T

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

A

Figure 11. Feedback Source Current (IFB) vs. TA

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 12. Shutdown Delay Current (I

) vs. TA Figure 13. Burst-Mode HIGH Threshold Voltage

DELAY

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 14. Burst-Mode LOW Threshold Voltage

(V

BURL

) vs. TA

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

(V

) vs. T

BURH

A

1.2

1.0

0.8

Normalized

0.6

0.4

0.2

0.0

-25 0 25 50 75 100 125

Temperature [°C]

Figure 15. Peak Current Limit (I

LIMIT

) vs. T

A

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 9

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

C

⋅

Ω

p

Functional Description

1. Startup: In previous generations of Fairchild Power

Switches (FPS™), the V resistor to the DC input voltage line. In this generation,

the startup resistor is replaced by an internal highvoltage current source. At startup, an internal highvoltage current source supplies the internal bias and charges the external capacitor (C

pin, as illustrated in Figure 16. When VCC reaches

V

CC

12V, the FSFM260/261/300 begins switching and the internal high-voltage current source is disabled. Then, the FSFM260/261/300 continues its normal switching operation and the power is supplied from the auxiliary transformer winding unless V

voltage of 8V.

V

CC

2

8V/12V

Figure 16. Internal Startup Circuit

2. Feedback Control: FSFM260/261/300 employs

current-mode control, as shown in Figure 17. An optocoupler (such as the FOD817A) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the R

to control the switching duty cycle. When the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.5V, the opto coupler LED current increases, pulling down the feedback voltage and reducing the duty cycle. This typically occurs when the input voltage is increased or the output load is decreased.

2.1 Pulse-by-Pulse Current Limit: Because currentmode control is employed, the peak current through the SenseFET is determined by the inverting input of the PWM comparator (V

the current through the opto-transistor is zero and the current limit pin (#4) is left floating, the feedback current source (I

) of 0.9mA flows only through the internal

FB

resistor (R+2.5R=2.8k). In this case, the cathode voltage of diode D2 and the peak drain current have maximum

pin had an external startup

CC

) connected to the

vcc

goes below the stop

CC

V

DC

C

Vcc

Vstr

5

I

start

Vref

VCC good

Internal

Bias

FSFM260 Rev: 00

resistor makes it possible

SENSE

*), as shown in Figure 17. When

FB

values of 2.5V and 1.5A, respectively. The pulse-bypulse current limit can be adjusted using a resistor to GND on the using an external resistor (R

I

=

LIM

R

where, I

V

O

FSFM260 Rev: 00

current limit pin (#4). The current limit level

) is given by:

LIM

IR

⋅

SPE

LIMLIM

_

Rk

+Ω

8.2

LIM

k8.2I

LIM

==>

LIM

FOD817A

KA431

II

−

LIMSPEC_LIM

is the desired drain current limit.

V

CC

I

Vfb

delay

3

C

B

V

SD

I

D1 D2

V

FB

OSC

2.5R

+

*

fb

R

-

OLP

Gate

driver

SenseFET

R

sense

(1)

(2)

Figure 17. Pulse Width Modulation (PWM) Circuit

2.2 Leading-Edge Blanking (LEB): At the instant the

internal SenseFET is turned on, a high-current spike occurs through the SenseFET, caused by primary-side capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the R

SENSE

resistor

would lead to incorrect feedback operation in the currentmode PWM control. To counter this effect, the FSFM260/ 261/300 employs a leading edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time

) after the SenseFET is turned on.

(t

LEB

2.3 Constant Power Limit Circuit: Due to the circuit delay of FPS, the pulse-by-pulse limit current increases a little bit when the input voltage increases. This means unwanted excessive power is delivered to the secondary side. To compensate, the auxiliary power compensation network in Figure 18 can be used. R

can adjust pulse-

LIM

by-pulse current by absorbing internal current source

: typical value is 0.9mA) depending on the ratio

(I

FB

between resistors. With the suggested compensation circuit, additional current from I

proportionally to the input voltage (V constant power in wide input range. Choose R

is absorbed more

FB

) and achieves

DC

LIM

for

proper current to the application, then check the pulseby-pulse current difference between minimum and maximum input voltage. To eliminate the difference (to gain constant power), R

××

IV

lim_spec dc

≅

R

y

×

I ΔI

fb lim_comp

can be calculated by:

y

N

a

N

(3)

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 10

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

where, I specification; N

is the limit current stated on the

lim_spec

and Np are the number of turns for V

a

CC

and primary side, respectively; Ifb is the internal current source at feedback pin with a typical value of 0.9mA; and

ΔI

lim_comp

is the current difference that must be

eliminated. In case of capacitor in the circuit 1µF, 100V is good choice for all applications.

R

LIM

FSFM260 Rev. 00

Vfb Drain

Vcc

I_lim

GND

V

Np

DC

L

Na

compensation network

R

Y

-

C

Y

+

N

a

VV ×=

DCy

N

p

Figure 18. Constant Power Limit Circuit

Fault

Vds

Power

on

occurs

Fault

removed

components, the reliability is improved without increasing cost. Once the fault condition occurs, switching is terminated and the SenseFET remains off. This causes V

to fall. When VCC reaches the UVLO

CC

stop voltage, 8V, the protection is reset and the internal high-voltage current source charges the V

via the Vstr pin. When V

reaches the UVLO start

CC

capacitor

CC

voltage, 12V, the FSFM260/261/300 resumes normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated (see Figure 19).

3.1 Overload Protection (OLP): Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, even when the SMPS is in the normal operation, the overload protection circuit can be activated during the load transition. To avoid this undesired operation, the overload protection circuit is designed to be activated after a specified time to determine whether it is a transient situation or an overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current through the SenseFET is limited and, therefore the maximum input power is restricted with a given input voltage. If the output consumes beyond this maximum power, the output voltage (V

) decreases

O

below the set voltage. This reduces the current through the opto-coupler LED, which also reduces the optocoupler transistor current, increasing the feedback voltage (V

the 5µA current source starts to charge C

. In this condition, VFB continues increasing until it

V

CC

). If VFB exceeds 2.5V, D1 is blocked and

FB

slowly up to

B

reaches 6V, when the switching operation is terminated, as shown in Figure 20. The delay time for shutdown is the time required to charge C

from 2.5V to 6.0V with

B

5µA. In general, a 10 ~ 50ms delay time is typical for most applications.

Vcc

V

FB

FSFM260 Rev: 00

Overload protection

12V

8V

FSFM260 Rev: 00

Normal

operation

Fault

situation

Normal

operation

t

6.0V

2.5V

T12= Cfb*(6.0-2.5)/I

delay

Figure 19. Auto Restart Operation

3. Protection Circuit: The FSFM260/261/300 has

several self protective functions, such as overload

T

1

Figure 20. Overload Protection

T

t

2

protection (OLP), over-voltage protection (OVP), and thermal shutdown (TSD). Because these protection circuits are fully integrated into the IC without external

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 11

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

3.2 Over-Voltage Protection (OVP): If the secondary

side feedback circuit malfunctions or a solder defect causes an open in the feedback path, the current through the opto-coupler transistor becomes almost zero. Then, V

climbs up in a similar manner to the

FB

overload situation, forcing the preset maximum current to be supplied to the SMPS until the overload protection is activated. Because more energy than required is provided to the output, the output voltage may exceed the rated voltage before the overload protection is activated, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an overvoltage protection (OVP) circuit is employed. In general,

is proportional to the output voltage and the

V

CC

FSFM260/261/300 uses V monitoring the output voltage. If V

instead of directly

CC

exceeds 19V, an

CC

OVP circuit is activated, terminating the switching operation. To avoid undesired activation of OVP during normal operation, V

should be designed below 19V.

CC

3.3 Thermal Shutdown (TSD): The SenseFET and the control IC are built in one package. This allows for the control IC to detect the heat generation from the SenseFET. When the temperature exceeds approximately 140°C, the thermal shutdown is activated.

3.4 Abnormal Over-Current Protection (AOCP): When the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the LEB time. Even though the FPS has overload protection, it is not enough to protect the FPS in those abnormal cases, since severe current stress is imposed on the SenseFET until OLP triggers. This IC has an internal AOCP circuit shown in Figure 21. When the gate turn-on signal is applied to the power SenseFET, the AOCP block is enabled and monitors the current through the sensing resistor. The voltage across the resistor is compared with a preset AOCP level. If the sensing resistor voltage is greater than the AOCP level, the set signal is applied to the latch, resulting in the shutdown of the SMPS.

4. Soft-Start: The FSFM260/261/300 has an internal soft- start circuit that increases PWM comparator inverting input voltage, together with the SenseFET current, slowly after it starts up. The typical soft-start time is 15ms. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased to smoothly establish the required output voltage. It also helps prevent transformer saturation and reduce the stress on the secondary diode during startup.

5. Burst Operation: To minimize power dissipation in standby mode, the FSFM260/261/300 enters burst mode operation. As the load decreases, the feedback voltage decreases. As shown in Figure 22, the device automatically enters burst mode when the feedback voltage drops below V

(350mV). At this point,

BURL

switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes V

BURH

(500mV)

switching resumes. The feedback voltage then falls and the process repeats. Burst mode operation alternately enables and disables switching of the power SenseFET, thereby reducing switching loss in standby mode.

Vo

set

Vo

V

FB

0.5V

0.35V

Ids

Vds

FSFM260 Rev: 00

Switching

disabled

T1

T2 T3

Switching

disabled

Figure 22. Waveforms of Burst Operation

time

T4

2.5R

OSC

R

AOCP protection

LEB

SQQ

R

Gate

driver

V

FSFM260 Rev: 00

GND

1

OCP

Figure 21. Abnormal Over-Current Protection

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 12

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

PCB Layout Guide

Due to the combined scheme, FPS shows better noise immunity than conventional PWM controller and MOSFET discrete solutions. Furthermore, internal drain current sense eliminates noise generation caused by a

sensing resistor. There are some recommendations for PCB layout to enhance noise immunity and suppress the noise inevitable in power-handling components.

There are typically two grounds in the conventional SMPS: power ground and signal ground. The power ground is the ground for primary input voltage and power, while the signal ground is ground for PWM controller. In FPS, those two grounds share the same pin, GND. Normally the separate grounds do not share the same trace and meet only at one point, the GND pin. More, wider patterns for both grounds are good for large currents by decreasing resistance.

Capacitors at the V possible to the corresponding pins to avoid noise from

the switching device. Sometimes Mylar® or ceramic capacitors with electrolytic for V

operation. The ground of these capacitors needs to connect to the signal ground not the power ground.

The cathode of the snubber diode should be close to the drain pin to minimize stray inductance. The Y-capacitor between primary and secondary should be directly connected to the power ground of DC link to maximize surge immunity.

Because the voltage range of feedback line is small, it is affected by the noise of the drain pin. Those traces should not draw across or close to the drain line.

In FSFM260/261/300, drain pins are the heat radiation pins, so wider PCB pattern is recommended to decrease the package temperature. Drain pins are also high voltage switching pins; however, too wide PCB pattern may deteriorate EMI immunity.

and FB pins should be as close as

CC

is better for smooth

CC

Figure 23. Recommended PCB Layout

Mylar® is a registered trademark of DuPont Teijin Films.

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 13

Typical Application Circuit

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

Application FPS™ Device

LCD Monitor

Power Supply

FSFM300N 85-265V

Input Voltage

Range

AC

Rated Output Power

30W

Output Voltage

(Maximum Current)

5.0V (2.0A) 14V (1.4A)

Features

! Average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input ! Low standby mode power consumption (<1W at 230V

input and 0.5W load)

AC

! Enhanced system reliability through various protection functions ! Internal soft-start (15ms)

Key Design Notes

! The delay time for overload protection is designed to be about 23ms with C105 of 33nF. If faster/slower triggering of

OLP is required, C105 can be changed to a smaller/larger value (e.g. 100nF for 70ms).

! The SMD-type 100nF capacitor must be placed as close as possible to V

sating noises and to improve surge immunity.

pin to avoid malfunction by abrupt pul-

CC

1. Schematic

R202

1.2k

C201

1000 F

25V

L201

5H

L202

5H

R203 18k

C204

1000 F

10V

C205 47nF

C202

1000 F

25V

R204

8k

R205

8k

14V, 1.4A

5V, 2A

BD101

2KBP06M

RT1 NTC 5D-9

T1

EER3016

C301

4.7nF Y2

IC301

FOD817C

10

6

MBRF1060

7

6

D202

C203

2200 F

10V

R201

1k

IC201

KA431

1

FSFM300N

V

STR

I

LIM

FB

GND

Drain

1

V

CC

C104

3.3nF 630V

6,7,8

R105 100

0.5W

2

ZD101

1N4745A

C106

100nF

D101

1N4007

C107 47 F

50V

D102

UF 4004

2

3

4

5

C105

33nF 100V

R103 51k

1W

5

4

3

R102 75k

C103 100 F

2

1

C102

150nF

275V

LF101

30mH

R101

1M

1W

C101

150nF

275V

400V

3

4

AC

R108

N.C

AC

F1

FUSE

250V

2A

Figure 24. Demonstration Circuit of FSFM300N

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 14

2. Transformer

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

Top

Np/2

EER3016

1

2

3

4

N

a

5

10

N

14V

9

GND

8

N

5V

7

N

5V

6

Np/2

2

4 5

N

a

N

7

5V

N

8

5V

8

N

10

14V

2

Np/2

3

Bottom

Figure 25. Transformer Schematic Diagram

3. Winding Specification

Position No Pin (s→f) Wire Turns Winding Method

Bottom

To p

Np/2 3 → 20.25φ × 1 30 Two-Layer Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

N

14V

10 → 8 0.4φ × 2(TIW) 5 Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

N

5V

8 → 60.4φ × 3(TIW) 3 Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

N

5V

7 → 60.4φ × 3(TIW) 3 Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

N

a

7 → 6 0.15φ × 1 7 Center Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

/2 2 → 1 0.25φ × 1 19 Center Solenoid Winding

N

p

Insulation: Polyester Tape t = 0.025mm, Two Layers

1

6

4. Electrical Characteristics

Pin Specification Remarks

Inductance 1 - 3 1.2mH ± 10% 67kHz, 1V

Leakage 1 - 3 15µH Maximum Short all other pins

5. Core & Bobbin

! Core: EER3016 (Ae=109.7mm ! Bobbin: EER3016

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 15

2

)

6. Evaluation Board Part List

Part Value Note Part Value Note

Resistor Inductor

R101 1MΩ 1W L201 5µH 5A Rating

R102 75kΩ 1/2W L202 5µH 5A Rating

R103 51kΩ 1W Diode

R105 100Ω 1/4W D101 IN4007

R108 10kΩ 1/4W D102 UF4004 1A, 400V Ultrafast Rectifier

R201 1kΩ 1/4W ZD101 1N4745A

R202 1.2kΩ 1/4W D201 MBRF10H100 10A,100V Schottky Rectifier

R203 18kΩ 1/4W D202 MBRF1060 10A,60V Schottky Rectifier

R204 8kΩ 1/4W IC

R205 8kΩ 1/4W IC101 FSFM300N FPS™

Capacitor IC201 KA431 (TL431) Voltage Reference

C101 150nF/275V

C102 150nF/275V

AC

Box Capacitor IC202 FOD817A Opto-Coupler

Box Capacitor Fuse

C103 100µF/400V Electrolytic Capacitor Fuse 2A/250V

C104 3.3nF/630V Film Capacitor NTC

C105 33nF/50V Ceramic Capacitor RT101 5D-9

C106 100nF/50V SMD (1206) Bridge Diode

C107 47µF/50V Electrolytic Capacitor BD101 2KBP06M2N257 Bridge Diode

C201 1000µF/25V

C202 1000µF/25V

C203 2200µF/10V

C204 1000µF/10V

Low-ESR Electrolytic

Capacitor

Low-ESR Electrolytic

Capacitor

Low-ESR Electrolytic

Capacitor

Low-ESR Electrolytic

Capacitor

LF101 34mH

Transf ormer

T1 EER3016 Ae=109.7mm

C205 47nF/50V Ceramic Capacitor

C301 4.7nF/1kV Ceramic Capacitor

1A, 1000V General-Purpose

Rectifier

1W 16V Zener Diode

(optional)

Line Filter

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

2

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 16

Package Dimensions

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

9.83

9.00

6.67

6.096

8.255

7.61

3.60

3.00

3.683

3.20

0.356

0.20

5.08 MAX

0.33 MIN

(0.56)

2.54

0.56

0.355

1.65

1.27

7.62

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO

JEDEC MS-001 VARIATION BA

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS,

MOLD FLASH, AND TIE BAR EXTRUSIONS.

D) DIMENSIONS AND TOLERANC

ES PER

ASME Y14.5M-1994

E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.

7.62

9.957

7.87

Figure 26. 8-Lead Dual Inline Package (DIP)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 17

.

FSFM260N / FSFM261N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM261N / FSFM300N • Rev. 1.0.1 18