Datasheet fsam10sh60a Datasheet

FSAM10SH60A

TM

SPM

General Description

FSAM10SH60A is an advanced smart power module (SPM) that Fairchild has newly developed and designed to provide very compact and high performance ac motor drives mainly targeting high speed low-power inverterdriven application like washing machines. It combines optimized circuit protection and drive matched to low-loss IGBTs. Highly effective short-circuit current detection/ protection is realized through the use of advanced current sensing IGBT chips that allow continuous monitoring of the IGBTs current. System reliability is further enhanced by the built-in over-temperature monitoring and integrated undervoltage lock-out protection. The high speed built-in HVIC provides opto-coupler-less IGBT gate driving capability that further reduce the overall size of the inverter system design. In addition the incorporated HVIC facilitates the use of single-supply drive topology enabling the FSAM10SH60A to be driven by only one drive supply voltage without negative bias. Inverter current sensing application can be achieved due to the divided nagative dc terminals.

(Smart Power Module)

FSAM10SH60A

Features

• UL Certified No. E209204

• 600V-10A 3-phase IGBT inverter bridge including control ICs for gate driving and protection

• Divided negative dc-link terminals for inverter current sensing applications

• Single-grounded power supply due to built-in HVIC

• Typical switching frequency of 15kHz

• Built-in thermistor for over-temperature monitoring

• Inverter power rating of 0.5kW / 100~253 Vac

• Isolation rating of 2500Vrms/min.

• Very low leakage current due to using ceramic substrate

• Adjustable current protection level by varying series resistor value with sense-IGBTs

Applications

• AC 100V ~ 253V 3-phase inverter drive for small power (0.5kW) ac motor drives

• Home appliances applications requiring high switching frequency operation like washing machines drive system

• Application ratings:

- Power : 0.5 kW / 100~253 Vac

- Switching frequency : Typical 15kHz (PWM Control)

- 100% load current : 3.3A (Irms)

- 150% load current : 5.0A (Irms) for 1 minute

External View

60mm

31mm

Top View Bottom View

Fig. 1.

Rev. E, August 2003

Integrated Power Functions

• 600V-10A IGBT inverter for 3-phase DC/AC power conversion (Please refer to Fig. 3)

Integrated Drive, Protection and System Control Functions

• For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting Control circuit under-voltage (UV) protection Note) Available bootstrap circuit example is given in Figs. 14 and 15.

• For inverter low-side IGBTs: Gate drive circuit, Short-circuit (SC) protection

Control supply circuit under-voltage (UV) protection

• Temperature Monitoring: System over-temperature monitoring using built-in thermistor

Note) Available temperature monitoring circuit is given in Fig. 15.

• Fault signaling: Corresponding to a SC fault (Low-side IGBTs) or a UV fault (Low-side control supply circuit)

• Input interface: 5V CMOS/LSTTL compatible, Schmitt trigger input

Pin Configuration

Top View

FSAM10SH60A

(1) V

CC(L)

(2) com

(2) com (3) IN

(3) IN

(UL)

(4) IN

(VL)

(5) IN

(WL)

(6) com

(6) com (7) FO

(7) FO

(7) FO (8) C

(8) C

FOD

(9) C

SC

(10) R

SC

(11) IN

(11) IN (12) V

(12) V

CC(UH)

(13) V

B(U)

(14) V

S(U)

(15) IN

(15) IN (16) com

(16) com

(16) com (17) V

(17) V

CC(VH)

(18) V

B(V)

(19) V

S(V)

(20) IN

(20) IN (21) V

(21) V

CC(WH)

(22) V

B(W)

(23) V

S(W)

(L)

(UH)

(VH)

(WH)

(24) V

TH

(25) R

TH

(26) N

U

(27) N

V

(28) N

W

(29) U

(30) V

(H)

(31) W

(32) P

Case Temperature (TC)

Case Temperature (TC) Detecting Point

Detecting Point

Ceramic Substrate

Fig. 2.

Rev. E, August 2003

Pin Descriptions

Pin Number Pin Name Pin Description

1V

CC(L)

2COM

3IN

4IN

5IN

(UL)

(VL)

(WL)

6COM

7V

8C

9C

10 R

11 IN

12 V

13 V

14 V

15 IN

FO

FOD

SC

(UH)

CC(UH)

B(U)

S(U)

(VH)

16 COM

17 V

18 V

19 V

20 IN

21 V

22 V

23 V

24 V

25 R

26 N

27 N

28 N

CC(VH)

B(V)

S(V)

(WH)

CC(WH)

B(W)

S(W)

TH

U

V

W

29 U Output for U Phase

30 V Output for V Phase

31 W Output for W Phase

32 P Positive DC–Link Input

Low-side Common Bias Voltage for IC and IGBTs Driving

Low-side Common Supply Ground

(L)

Signal Input for Low-side U Phase

Signal Input for Low-side V Phase

Signal Input for Low-side W Phase

Low-side Common Supply Ground

(L)

Fault Output

Capacitor for Fault Output Duration Time Selection

Capacitor (Low-pass Filter) for Short-Circuit Current Detection Input

Resistor for Short-Circuit Current Detection

Signal Input for High-side U Phase

High-side Bias Voltage for U Phase IC

High-side Bias Voltage for U Phase IGBT Driving

High-side Bias Voltage Ground for U Phase IGBT Driving

Signal Input for High-side V Phase

High-side Common Supply Ground

(H)

High-side Bias Voltage for V Phase IC

High-side Bias Voltage for V Phase IGBT Driving

High-side Bias Voltage Ground for V Phase IGBT Driving

Signal Input for High-side W Phase

High-side Bias Voltage for W Phase IC

High-side Bias Voltage for W Phase IGBT Driving

High-side Bias Voltage Ground for W Phase IGBT Driving

Thermistor Bias Voltage

Series Resistor for the Use of Thermistor (Temperature Detection)

Negative DC–Link Input for U Phase

Negative DC–Link Input for V Phase

Negative DC–Link Input for W Phase

FSAM10SH60A

Rev. E, August 2003

Internal Equivalent Circuit and Input/Output Pins

Bottom View

FSAM10SH60A

(22) V

B(W)

(21) V

CC(WH)

(20) IN

(W H)

(23) V

S(W)

(18) V

B(V)

(17) V

CC(VH)

(16) C OM

(15) IN

(VH)

(19) V

S(V)

(13) V

B(U)

(12) V

CC(UH)

(11) IN

(UH)

(14) V

S(U)

(10) R

SC

(9) C

SC

(8) C

FOD

(7) V

FO

(6) CO M

(5) IN

(W L)

(4) IN

(VL)

(3) IN

(UL)

(2) CO M

(1) V

CC(L)

VB

VCC

COM

IN

OUT

VS

(32) P

(31) W

VB

VCC

(H)

COM

IN

OUT

VS

(30) V

VB

VCC

OUT

COM

IN

C(SC)

C(FOD)

VFO

(L)

IN(W L )

IN(VL )

IN(UL)

(L)

COM(L)

VS

OUT(W L)

OUT(VL)

OUT(UL)

(29) U

(28) N

(27) N

W

V

VCC

(26) N

U

(25) R

THERMISTOR

(24) V

TH

Note:

1) Inverter low-side is composed of three sense-IGBTs including freewheeling diodes for each IGBT and one control IC which has gate driving, current sensing and

protection functions.

2) Inverter power side is composed of four inverter dc-link input pins and three inverter output pins.

3) Inverter high-side is composed of three normal-IGBTs including freewheeling diodes and three drive ICs for each IGBT.

Fig. 3.

Rev. E, August 2003

FSAM10SH60A

Absolute Maximum Ratings (T

= 25°C, Unless Otherwise Specified)

J

Inverter Part

Item Symbol Condition Rating Unit

Supply Voltage V

Supply Voltage (Surge) V

Collector-Emitter Voltage V

PN

PN(Surge)

CES

Each IGBT Collector Current ± I

Each IGBT Collector Current (Peak) ± I

Collector Dissipation P

Operating Junction Temperature T

Note:

1. It would be recommended that the average junction temperature should be limited to TJ ≤ 125°C (@TC ≤ 100°C) in order to guarantee safe operation.

Applied between P- NU, NV, N

W

450 V

500 V

600 V

TC = 25°C 10 A

C

TC = 100°C 9 A

C

TC = 25°C,

CP

Instantaneous Value (Pulse)

TC = 25°C per One Chip 43 W

C

(Note 1) -20 ~ 125 °C

J

20 A

Control Part

Item Symbol Condition Rating Unit

Control Supply Voltage V

High-side Control Bias Voltage V

Input Signal Voltage V

Fault Output Supply Voltage V

Fault Output Current I

Current Sensing Input Voltage V

Applied between V

CC

BS

IN

FO

SC

, V

COM

(H)

CC(L)

- COM

Applied between

- V

V

B(U)

S(U)

, V

B(V)

Applied between IN IN

, IN

(VL)

, IN

(WL)

(UL)

Applied between VFO - COM

Sink Current at VFO Pin 5 mA

Applied between CSC - COM

CC(UH)

(L)

- V

S(V)

(UH)

- COM

, IN

, V

CC(VH)

B(W)

(VH)

(L)

, IN

- V

, V

(WH)

CC(WH)

S(W)

- COM

-

20 V

(H)

-0.3 ~ VCC+0.3 V

Total System

Item Symbol Condition Rating Unit

Self Protection Supply Voltage Limit (Short-Circuit Protection Capability)

Module Case Operation Temperature T

Storage Temperature T

Isolation Voltage V

V

PN(PROT)VCC

= VBS = 13.5 ~ 16.5V

= 25°C, Non-repetitive, less than 6µs

T

J

Note Fig.2 -20 ~ 100 °C

C

STG

60Hz, Sinusoidal, AC 1 minute, Connection

ISO

Pins to Heat-sink Plate

-20 ~ 125 °C

400 V

2500 V

rms

Rev. E, August 2003

Absolute Maximum Ratings

Thermal Resistance

Item Symbol Condition Min. Typ. Max. Unit

Junction to Case Thermal Resistance

R

Each IGBT under Inverter Operating Condition

th(j-c)Q

Each FWDi under Inverter Operating Condition - - 3.6 °C/W

th(j-c)F

FSAM10SH60A

--2.9°C/W

Contact Thermal Resistance

Note:

2. For the measurement point of case temperature(TC), please refer to Fig. 2.

3. The thickness of thermal grease should not be more than 100um.

Electrical Characteristics

Inverter Part

R

Ceramic Substrate (per 1 Module)

th(c-h)

Thermal Grease Applied (Note 3)

(TJ = 25°C, Unless Otherwise Specified)

Item Symbol Condition Min. Typ. Max. Unit

Collector - Emitter Saturation Voltage

FWDi Forward Voltage V

Switching Times t

Collector - Emitter

V

CE(SAT)VCC

FM

ON

t

C(ON)

t

OFF

t

C(OFF)

t

rr

I

CES

= VBS = 15V, VIN = 0V IC = 10A, TJ = 25°C - - 2.5 V

VIN = 5V IC = 10A, TJ = 25°C - - 2.3 V

VPN = 300V, VCC = VBS = 15V I

= 10A, TJ = 25°C

C

= 5V ↔ 0V, Inductive Load

V

IN

(High, Low-side)

(Note 4)

VCE = V

, TJ = 25°C - - 250 µA

CES

Leakage Current

Note:

4. tON and t

internally. For the detailed information, please see Fig. 4.

include the propagation delay time of the internal drive IC. t

OFF

C(ON)

and t

- - 0.06 °C/W

-0.27 - us

-0.12 - us

-0.6-us

-0.23 - us

-0.13 - us

are the switching time of IGBT itself under the given gate driving condition

C(OFF)

Rev. E, August 2003

V

IN(O N)

FSAM10SH60A

100% I

t

rr

V

CE

V

IN

t

ON

(a) Turn-on (b) Turn-off

C

I

C

t

C(ON)

Fig. 4. Switching Time Definition

V

IN(OFF)

I

C

V

IN

t

OFF

t

C(OFF)

V

CE

VCE: 100V/div.

IC: 5A/div.

time : 0.1us/div.

(a) Turn-on (b) Turn-off

(a) turn-on

IC: 5A/div.

time : 0.1us/div.

Fig. 5. Experimental Results of Switching Waveforms

Test Condition: Vdc=300V, Vcc=15V, L=500uH (Inductive Load), TJ=25°°°°C

VCE: 100V/div.

(b) turn-off

Rev. E, August 2003

FSAM10SH60A

Electrical Characteristics (T

= 25°C, Unless Otherwise Specified)

J

Control Part

Item Symbol Condition Min. Typ. Max. Unit

Quiescent V

Supply Cur-

CC

rent

Quiescent V rent

Supply Cur-

BS

Fault Output Voltage V

Short-Circuit Trip Level V

Sensing Voltage of IGBT Current

Supply Circuit UnderVoltage Protection

Fault Output Pulse Width t

ON Threshold Voltage V

OFF Threshold Voltage V

ON Threshold Voltage V

OFF Threshold Voltage V

Resistance of Thermistor R

Note:

5. Short-circuit current protection is functioning only at the low-sides. It would be recommended that the value of the external sensing resistor (RSC) should be

selected around 50 Ω in order to make the SC trip-level of about 15A at the shunt resistors (RSU,RSV,RSW) of 0Ω . For the detailed information about the relationship between the external sensing resistor (RSC) and the shunt resistors (RSU,RSV,RSW), please see Fig. 7.

6. The fault-out pulse width t

7. TTH is the temperature of thermistor itself. To know case temperature (TC), please make the experiment considering your application.

FOD

I

QCCLVCC

I

QCCHVCC

I

QBSVBS

FOHVSC

V

FOLVSC

SC(ref)VCC

V

SENRSC

= 15V

IN

(UL, VL, WL)

= 15V

IN

(UH, VH, WH)

= 15V

IN

(UH, VH, WH)

= 0V, VFO Circuit: 4.7kΩ to 5V Pull-up 4.5 - - V

= 1V, VFO Circuit: 4.7kΩ to 5V Pull-up - - 1.1 V

= 15V (Note 5) 0.45 0.51 0.56 V

= 50 Ω, RSU = RSV = RSW = 0 Ω and IC = 15A

(Note Fig. 7)

UV

IN(OFF)

depends on the capacitance value of C

Detection Level 11.5 12 12.5 V

CCD

Reset Level 12 12.5 13 V

CCR

Detection Level 7.3 9.0 10.8 V

BSD

Reset Level 8.6 10.3 12 V

BSR

FODCFOD

IN(ON)

TH

= 33nF (Note 6) 1.4 1.8 2.0 ms

High-Side Applied between IN

Low-Side Applied between IN

@ TTH = 25°C (Note Fig. 6) (Note 7) - 50 - kΩ

= 100°C (Note Fig. 6) (Note 7) - 3.4 - kΩ

@ T

TH

V

CC(L)

- COM

--26mA

(L)

= 5V

V

, V

= 5V

FOD

CC(UH)

COM

(H)

V

- V

B(U)

- V

V

B(W)

- COM

IN

(WH)

- COM

IN

(WL)

according to the following approximate equation : C

CC(VH)

S(U)

S(W)

, V

CC(WH)

-V

B(V)

S(V)

(UH)

(H)

(UL)

(L)

, IN

-

,

- - 130 uA

- - 420 uA

0.45 0.51 0.56 V

,

(VH)

--0.8V

3.0 - - V

,

(VL)

--0.8V

3.0 - - V

= 18.3 x 10-6 x t

FOD

[F]

Recommended Operating Conditions

Item Symbol Condition

Supply Voltage V

Control Supply Voltage V

High-side Bias Voltage V

Blanking Time for Preventing Arm-short

PWM Input Signal f

Input ON Threshold Voltage V

Input OFF Threshold Voltage V

t

IN(ON)

IN(OFF)

Applied between P - NU, NV, N

PN

Applied between V

CC

BS

dead

PWMTC

, V

COM

(H)

Applied between V

- V

V

B(W)

For Each Input Signal 3 - - us

≤ 100°C, TJ ≤ 125°C - 15 - kHz

Applied between IN

, IN

COM

(H)

Applied between IN COM

, IN

(H)

CC(L)

S(W)

(UL)

CC(UH)

- COM

B(U)

, IN

(VL)

, IN

(VL)

(UH)

(L)

- V

, IN

W

, V

CC(VH), VCC(WH)

, V

S(U)

B(V)

, IN

(VH)

(WH)

- COM

(WL)

, IN

(VH)

(WH)

- COM

(WL)

- V

(L)

Values

Min. Typ. Max.

Unit

- 300 400 V

-

13.5 15 16.5 V

,

S(V)

-

13.5 15 16.5 V

0 ~ 0.65 V

4 ~ 5.5 V

Rev. E, August 2003

]

㏀

FSAM10SH60A

R-T Curve

70

60

50

40

30

Resistance [

20

10

0

20 30 40 50 60 70 80 90 100 110 120 130

Temperature TTH [℃]

Fig. 6. R-T Curve of The Built-in Thermistor

100

80

(1)

60

]

Ω

[ R

SC

40

(2)

20

0

0.00 0.02 0.04 0.06 0.08 0.10 0.12 0.14

Fig. 7. R

Variation by change of Shunt Resistors ( RSU, RSV, RSW) for Short-Circuit Protection

SC

RSU,RSV,RSW [Ω]

(1) @ around 100% Rated Current Trip (IC ·=· 10A),

(2) @ around 150% Rated Current Trip (I

·=· 15A)

C

,

, ,

Rev. E, August 2003

Mechanical Characteristics and Ratings

F SAM10SH60A

Item Condition

Mounting Torque Mounting Screw: M4

(Note 8 and 9)

Ceramic Flatness Note Fig.8 0 - +120 um

Weight -35- g

Recommended 10Kg•cm 8 10 12 Kg•cm

Recommended 0.98N•m 0.78 0.98 1.17 N•m

(+)

Datum Line

Limits

Min. Typ. Max.

(+)

Unit

Fig. 8. Flatness Measurement Position of The Ceramic Substrate

Note:

8. Do not make over torque or mounting screws. Much mounting torque may cause ceramic cracks and bolts and Al heat-fin destruction.

9. Avoid one side tightening stress. Fig.9 shows the recommended torque order for mounting screws. Uneven mounting can cause the SPM ceramic substrate to

be damaged.

2

121

Fig. 9. Mounting Screws Torque Order

Rev. E, August 2003

Time Charts of SPMs Protective Function

Input Signal

FSAM10SH60A

Internal IGBT

Gate-Emitter Voltage

Control Supply Voltage

Output Current

Fault Output Signal

P1 : Normal operation - IGBT ON and conducting current P2 : Under-Voltage detection P3 : IGBT gate interrupt P4 : Fault signal generation P5 : Under-Voltage reset P6 : Normal operation - IGBT ON and conducting current

Fig. 10. Under-Voltage Protection (Low-side)

Input Signal

UV detect

P1

P3

P2

P4

P5

UV reset

P6

V

BS

Output Current

Fault Output Signal

P1 : Normal operation - IGBT ON and conducting current P2 : Under-Voltage detection P3 : IGBT gate interrupt P4 : No fault signal P5 : Under-Voltage reset P6 : Normal operation - IGBT ON and conducting current

Fig. 11. Under-Voltage Protection (High-side)

UV detect

P1

P4

P3

P2

P5

UV reset

P6

Rev. E, August 2003

Input Signal

FSAM10SH60A

P5

Internal IGBT

P6

Gate-E m itter Voltage

SC D etection

P1

P4

Output Current

P7

P2

SC R eference

Sensing Voltage

RC Filte r Delay

Fault Output Signal

P1 : Normal operation - IGBT ON and conducting current P2 : Short-Circuit current detection P3 : IGBT gate interrupt / Fault signal generation P4 : IGBT is slowly turned off P5 : IGBT OFF signal P6 : IGBT ON signal - but IGBT cannot be turned on during the fault Output activation P7 : IGBT OFF state P8 : Fault Output reset and normal operation start

Voltage (0.5V)

P3

P8

Fig. 12. Short-Circuit Current Protection (Low-side Operation only)

Rev. E, August 2003

5V-Line

FSAM10SH60A

SPM

2k

R

PL

Ω

100

R

PF

4.7k

Ω

CPU

Ω

100

C

1nF

Note:

1) It would be recommended that by-pass capacitors for the gating input signals, IN

and on the both sides of CPU and SPM for the fault output signal, VFO, as close as possible.

2) The logic input is compatible with standard CMOS or LSTTL outputs.

3) RPLCPL/RPHCPH/RPFC

to each of SPM pins.

coupling at each SPM input is recommended in order to prevent input/output signals’ oscillation and it should be as close as possible

PF

Fig. 13. Recommended CPU I/O Interface Circuit

These Values depend on PWM Control Algorithm

C

PL

(UL)

, IN

(VL)

, IN

R

4.7k

C

1.2nF0.47nF1nF

(WL)

PH

, IN

Ω

(UH)

, IN

(VH)

IN

V

COM

and IN

,,

(UH)IN(VH)

,,

(UL)IN(VL)

FO

should be placed on the SPM pins

(WH)

IN

(WH)

(WL)

15V-Line

20

Ω

D

BS

22uF 0.1uF

470uF 0.1uF

Note:

It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.

One-Leg Diagram of SPM

Vcc

IN

COM

Vcc

IN

COM

Fig. 14. Recommended Bootstrap Operation Circuit and Parameters

P

VB

HO

VS

Inverter

Output

OUT

N

Rev. E, August 2003

CCCC

UUUU

FSAM10SH60A

15V line

5V line

R

Gating WH

Gating VH

PPPP

Gating UH

Fault

Gating WH

Gating VH

Gating UH

S

R

S

R

S

5V line

R

RPLRPLR

PF

PL

R

S

R

S

R

S

R

S

C

BPF

C

CPLC

C

PL

RBSD

R

PH

C

PH

RBSD

R

PH

C

PH

R

BS

R

PH

C

PH

PF

R

C

SC

C

SP15

Temp. Monitoring

BS

C

BS

CBSC

D

BS

C

BS

SC

R

C

BSC

C

BSC

F

R

CSC

C

SPC15

(22) V

B(W)

(21) V

CC(WH)

(20) IN

(WH)

(23) V

S(W)

(18) V

B(V)

(17) V

CC(VH)

(16) COM

(15) IN

(VH)

(19) V

S(V)

(13) V

B(U)

(12) V

CC(UH)

(11) IN

(UH)

(14) V

S(U)

(10) R

SC

(9) C

SC

(8) C

FOD

(7) V

FOD

FO

(6) COM

(L)

(5) IN

(WL)

(4) IN

(VL)

(3) IN

(UL)

(2) COM

(L)

(1) V

CC(L)

W-Phase C urrent V-Phase Current

VB

VCC

OUT

COM

IN

VS

VB

VCC

COM

IN

VB

VCC

COM

IN

C(SC)

C(FOD)

VFO

IN(WL )

IN(VL)

IN(UL)

COM(L)

VCC

OUT

VS

OUT

VS

OUT(WL)

OUT(VL)

OUT(UL)

THERMISTOR

(H)

U-Phase Current

C

FW

FV

P (32)

W (31)

V (30)

U (29)

N

(28)

W

NV (27)

NU (26)

VTH (24)

R

(25)

TH

R

FW

R

FV

R

FU

C

FU

M

C

Vdc

DCS

R

SW

R

SV

R

SU

5V line

R

TH

C

SPC05

C

SP05

Note:

1) RPLCPL/RPHCPH /RPFCPF coupling at each SPM input is recommended in order to prevent input signals’ oscillation and it should be as close as possible to each

SPM input pin.

2) By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is

possible.

3) VFO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance. Please

refer to Fig. 15.

4) C

of around 7 times larger than bootstrap capacitor CBS is recommended.

SP15

5) VFO output pulse width should be determined by connecting an external capacitor(C

tFO = 1.8 ms (typ.)) Please refer to the note 6 for calculation method.

6) Each input signal line should be pulled up to the 5V power supply with approximately 4.7kΩ (at high side input) or 2kΩ (at low side input) resistance (other RC

coupling circuits at each input may be needed depending on the PWM control scheme used and on the wiring impedance of the system’s printed circuit board). Approximately a 0.22~2nF by-pass capacitor should be used across each power supply connection terminals.

7) To prevent errors of the protection function, the wiring around RSC, RF and CSC should be as short as possible.

8) In the short-circuit protection circuit, please select the RFCSC time constant in the range 3~4 µs.

9) To enhance the noise immunity, CSC pin should be connected to the external circuit through a series resistor, R

be connected to CSC pin as close as possible.

10)Each capacitor should be mounted as close to the pins of the SPM as possible.

11) To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency non-

inductive capacitor of around 0.1~0.22 uF between the P&N pins is recommended.

12)Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and

the relays. It is recommended that the distance be 5cm at least.

) between C

FOD

(pin8) and COM

FOD

(pin2). (Example : if C

(L)

, which is approximately 390Ω. R

CSC

= 33 nF, then

FOD

SCS

should

Fig. 15. Typical Application Circuit

Rev. E, August 2003

Detailed Package Outline Drawings

SPM32-AA

28x2.00 ±0.30=(56.0)

(2.00)

2.00 ±0. 30

MAX1.05

0.60 ±0.1 0

0.40

MAX1.00

0.60 ±0.1 0

0.40

28.0 ±0. 30

FSAM10SH60A

(17.00)

(3.30)

MAX8.20

#23

11.0

(

10.14

MAX1.00

0.80

1.30±0. 10

MAX3.20

±0. 30

#32

19.86±0. 30

)

(46.60)

53.0 ±0. 30

60.0 ±0. 50

1.30±0. 10

MAX2.50

0.80

3x7.62

#1

#24

±0. 30

=(22.86)

3x4.0

2.00

0.40

0.60±0. 10

MAX1.60

±0. 30

13.6

±0. 30

(3.50)

=(12.0

(3.70)

Ø4.30

0.70

31.0 ±0. 50

(34.80)

(3

° ~5°

)

0

.05

36.05 ±0. 50

+0.10

7.20 ±0. 5

12.30 ±0. 5

)

Dimensions in Millimeters

Rev. E, August 2003

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ ActiveArray™ Bottomless™ CoolFET™ CROSSVOL T™ DOME™ EcoSPARK™ E2CMOS EnSigna

TM

FACT™

FACT Quiet Series™



FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ ImpliedDisconnect™ ISOPLANAR™

Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE T O ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY , FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT

CONVEY ANY LICENSE UNDER ITS PA TENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC



OPTOPLANAR™ P ACMAN™ POP™

Power247™ PowerTrench



QFET



QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER SMART ST ART™ SPM™ Stealth™ SuperSOT™-3

SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET



VCX™



FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Formative or In Design

First Production

Full Production

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. I5