Datasheet FQU8P10, FQD8P10 Datasheet (Fairchild Semiconductor)

FQD8P10 / FQU8P10

100V P-Channel MOSFET

FQD8P10 / FQU8P10

TM

QFET

General Description

These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well

Features

• -6.6A, -100V, R

• Low gate charge ( typical 12 nC)

• Low Crss ( typical 30 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

= 0.53Ω @VGS = -10 V

DS(on)

suited for low voltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control.

D

GS

D

D-PAK

FQD Series

GSD

I-PAK

FQU Series

G

S

Absolute Maximum Ratings T

= 25°C unless otherwise noted

C

Symbol Parameter FQD8P10 / FQU8P10 Units

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt P

D

Drain-Source Voltage -100 V Drain Current

- Continuous (T

Drain Current - Pulsed

= 25°C)

C

= 100°C)

C

(Note 1)

-6.6 A

-4.2 A

-26.4 A Gate-Source Voltage ± 30 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy

Power Dissipation (TA = 25°C) * Power Dissipation (T

= 25°C)

C

(Note 2) (Note 1) (Note 1) (Note 3)

150 mJ

-6.6 A

4.4 mJ

-6.0 V/ns

2.5 W 44 W

- Derate above 25°C 0.35 W/°C

, T

T

J

STG

T

L

Operating and Storage Temperature Range -55 to +150 °C Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

300 °C

Thermal Characteristics

Symbol Parameter Typ Max Units

R

θJC

R

θJA

R

θJA

* When mounted on the minimum pad size recommended (PCB Mount)

Thermal Resistance, Junction-to-Case -- 2.84 °C/W Thermal Resistance, Junction-to-Ambient * -- 50 °C/W Thermal Resistance, Junction-to-Ambient -- 110 °C/W

Rev. B, August 2002

FQD8P10 / FQU8P10

Electrical Characteristics T

= 25°C unless otherwise noted

C

Symbol Parameter Te st Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BV

DSS

/ ∆T I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient

J

Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, ID = -250 µA

V

GS

I

= -250 µA, Referenced to 25°C

D

V

= -100 V, VGS = 0 V

DS

V

= -80 V, TC = 125°C

DS

V

= -30 V, VDS = 0 V

GS

= 30 V, VDS = 0 V

V

GS

-100 -- -- V

-- -0.1 -- V/°C

-- -- -1 µA

-- -- -10 µA

-- -- -100 nA

-- -- 100 nA

On Characteristics

V R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage Static Drain-Source

On-Resistance Forward Transconductance

V

= VGS, ID = -250 µA

DS

= -10 V, ID = -3.3 A

V

GS

= -40 V, ID = -3.3 A

V

DS

(Note 4)

-2.0 -- -4.0 V

-- 0.41 0.53 Ω

-- 4.1 -- S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance Output Capacitance -- 120 155 pF Reverse Transfer Capacitance -- 30 40 pF

= -25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 360 470 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q Q Q

g gs gd

Turn-On Delay Time Turn-On Rise Time -- 110 230 ns Turn-Off Delay Time -- 20 50 ns Turn-Off Fall Time -- 35 80 n s Total Gate Charge Gate-Source Charge -- 3.0 -- nC Gate-Drain Charge -- 6.4 -- nC

= -50 V, ID = -8.0 A,

V

DD

= 25 Ω

R

G

V

= -80 V, ID = -8.0 A,

DS

V

GS

= -10 V

(Note 4, 5)

-- 11 30 ns

-- 12 15 nC

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 5.2mH, IAS = -6.6A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ -8.0A, di/dt ≤ 300A/µs, VDD ≤ BV

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

Maximum Continuous Drain-Source Diode Forward Current -- -- -6.6 A Maximum Pulsed Drain-Source Diode Forward Current -- -- -26.4 A

= 0 V, IS = -6.6 A

Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 0.35 -- µC

Starting TJ = 25°C

DSS,

V

GS

= 0 V, IS = -8.0 A,

V

GS

/ dt = 100 A/µs

dI

F

-- -- -4.0 V

-- 98 -- ns

(Note 4)

Rev. B, August 2002

Typical Characteristics

V

GS

Top : -15.0 V

1

10

-10.0 V

-8.0 V

-7.0 V

-6.5 V

-5.5 V

-5.0 V

0

10

Botto m : -4.5 V

-1

, Drain Current [A]

10

D

-I

-2

10

-1

10

0

10

-VDS, Drain-Source Voltage [V]

※

Notes :

1. 250μs Pulse Test

℃

2. T

= 25

C

1

10

FQD8P10 / FQU8P10

1

10

℃

0

10

, Drain Current [A]

D

-I

-1

10

2

150

℃

25

℃

-55

46810

※

Notes :

1. V

= -40V

DS

2. 250μs Pulse Test

-VGS , Gate-Source Voltage [V]

Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s

1.5

1.2

0.9

[Ω],

DS(on)

R

0.6

Drain-Source On-Resistance

0.3

0.0 0 5 10 15 20 25

VGS = - 10V

VGS = - 20V

※

-ID , Drain Curren t [A]

Figure 3. On-Resistance Variati on vs.

Drain Current and Gate Voltage

900

800

700

600

500

400

300

Capacitance [pF]

200

100

0

-1

10

C

oss

C

iss

C

rss

-VDS, Drain-Source Voltage [V]

C

= C

iss

= Cds + C

C

oss

C

= C

rss

0

10

Note : T

= 25

J

+ Cgd (Cds = shorted)

gs

gd

※

Notes :

= 0 V

1. V

GS

2. f = 1 MH z

1

10

℃

0

10

℃

25

℃

, Reve rs e D ra in Current [A ]

150

DR

-I

-1

10

0.0 0.5 1.0 1.5 2.0 2.5 3.0

※

Notes :

= 0V

1. V

GS

2. 250μs Pulse Test

-VSD , Source-Drain Voltage [V]

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

12

10

8

6

4

, Gate-Source Voltage [V]

GS

2

-V

0

0 2 4 6 8 10 12 14

QG, Tota l Gate Charge [n C]

VDS = -20V

VDS = -50V

VDS = -80V

※

Note : ID = -8.0 A

Figure 5. Capacitance C haracteristics Figure 6. Gate Charge Characteristics

Rev. B, August 2002

Typical Characteristics (Continued)

FQD8P10 / FQU8P10

1.2

1.1

1.0

, (Norm a liz e d )

DSS

※

-BV

0.9

Drain-Source Breakdown Voltage

0.8

-100 -50 0 50 100 150 200

1. V

2. I

Notes :

TJ, Junction Temperature [oC]

Figure 7. Breakdown Voltage Variation

vs. Temperature

2

10

1

10

0

10

, Dra i n Curre nt [A]

D

-I

-1

10

0

10

-VDS, Drain-Source Voltage [V]

Operation in This Area is Limited by R

DS(on)

DC

※

Notes :

1. T

= 25 oC

C

2. T

= 150 oC

J

3. Single Pulse

1

10

100 µs

1 ms

10 ms

= 0 V

GS

= -250 μA

D

3.0

2.5

2.0

1.5

, (Normalized)

1.0

DS(ON)

R

Drain-Source On-Resistance

0.5

0.0

-100 -50 0 50 100 150 200

※

Notes :

= -10 V

1. V

GS

2. I

= -3.3 A

D

TJ, Junction Temperature [oC]

Figure 8. On-Resistance Variation

vs. Temperature

7

6

5

4

2

10

3

, Drain Current [A]

D

2

-I

1

0

25 50 75 100 125 150

TC, Case Temperature [℃]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

10

(t), Therm al Response

JC

θ

Z

vs. Case Temperature

D=0.5

0

10

0.2

0.1

0.05

-1

0.02

0.01

-5

10

single pulse

-4

10

-3

10

-2

※

No te s :

(t) = 2.84 ℃/W M ax .

1. Z

θ

JC

2. D u ty F a c to r , D = t

3. TJM - TC = PDM * Z

P

DM

t

1

t

-1

10

1/t2

(t)

θ

JC

2

0

1

10

t1, Square W ave Pulse Duration [sec]

Figure 11. Transient Thermal Response Cur ve

Rev. B, August 2002

12V

200nF

-3mA

50K

FQD8P10 / FQU8P10

Gate Charge Test Circuit & Waveform

V

GS

DS

GS

-10V

Q

g

Q

gs

Q

gd

Charge

Same Type

Ω

300nF

V

GS

Same Type

as DUT

DUT

V

Resistive Switching Test Circuit & Waveforms

-10V

R

L

DUT

L

V

DD

V

GS

10%

V

DS

V

DS

V

GS

R

G

t

d(on)tr

90%

t

on

t

off

t

d(off)

t

f

Unclamped Inductive Switching Test Circuit & Waveforms

BV

DSS

L

LL

V

DS

I

IDI

D

V

DD

BV

DD

I

AS

DSS

R

G

DUT

t

p

V

DD

1

----

E

=LI

E

=LI

AS

2

AS

t

p

I

(t)

D

DSS

--------------------

-------------------BV

BV

DSS-VDD

Time

V

(t)

V

(t)

DS

Rev. B, August 2002

Peak Diode Recovery dv /d t Test Circuit & Waveforms

+

V

DS

DUT

I

SD

Driver

R

G

V

GS

_

L

LL

Compliment of DUT

(N-Channel)

• dv/dt controlled by R

•ISDcontroll ed by pulse peri od

G

FQD8P10 / FQU8P10

V

DD

V

GS

( Driver )

I

SD

( DUT )

V

DS

( DUT )

Gate Pulse Width

--------------------------

D =

Gate Pulse Period

Body Diode Reverse Current

I

RM

IFM, Body Diode Forward Current

V

SD

Body Diode

Forward Voltage Drop

Body Diode Recoverydv/dt

di/dt

10V

V

DD

Rev. B, August 2002

Package Dimensions

6.60 ±0.20

FQD8P10 / FQU8P10

D-PAK

0.60 ±0.20

0.80 ±0.20

MAX0.96

2.30TYP

[2.30±0.20]

5.34 ±0.30 (4.34)(0.50) (0.50)

0.76 ±0.10

2.30TYP

[2.30±0.20]

2.70 ±0.20

0.70 ±0.20

6.10 ±0.20

9.50 ±0.30

±0.10

0.91

0.89 ±0.10

6.60 ±0.20 (5.34)

(5.04) (1.50)

2.30 ±0.10

0.50 ±0.10

1.02 ±0.20

2.30 ±0.20

(0.90)

(0.70)

MIN0.55

(1.00)

9.50 ±0.30

(2XR0.25)

6.10 ±0.20

2.70 ±0.20 (0.10) (3.05)

0.76 ±0.10

Dimensions in Millimeters

Rev. B, August 2002

Package Dimensions

(Continued)

FQD8P10 / FQU8P10

I-PAK

(0.50) (0.50)(4.34)

0.60 ±0.20

0.80 ±0.10

MAX0.96

0.76 ±0.10

6.60 ±0.20

5.34 ±0.20

0.70 ±0.20

1.80 ±0.20

2.30 ±0.20

0.50 ±0.10

6.10 ±0.20

16.10 ±0.30

9.30 ±0.30

2.30TYP

[2.30±0.20]

2.30TYP

[2.30±0.20]

0.50 ±0.10

Dimensions in Millimeters

Rev. B, August 2002

TRADEMARKS

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1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In

Design

Preliminary First Production This datasheet contains preliminary data, and

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Obsolete Not In Production This datasheet contains specifications on a product

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Semiconductor reserves the right to make changes at any time without notice in order to improve design.

that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. I1