Datasheet FQS4410 Datasheet (Fairchild Semiconductor)

May 2000

FQS4410

Single N-Channel, Logic Level, Power MOSFET

General Description

These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as DC/DC converters, high efficiency switching for power management in portable and battery operated products.

Features

• 10A, 30V, R

• Low gate charge ( typical 21 nC)

• Low Crss ( typical 145 pF)

• Fast switching

• Improved dv/dt capability

• 175°C maximum junction temperature rating

= 0.0135Ω @VGS = 10 V

DS(on)

8

7

6

QFET

QFETQFET

4

3

2

TM

5

Absolute Maximum Ratings T

Symbol Parameter FQS4410 Units

V

DSS

I

D

I

DM

V

GSS

dv/dt Peak Diode Recovery dv/dt P

D

T

, T

J

STG

Drain-Source Voltage 30 V Drain Current

Drain Current - Pulsed Gate-Source Voltage ± 20 V

Power Dissipation (TC = 25°C) Linear Derating Factor 0.02 W/°C Operating and Storage Temperature Range -55 to +175 °C

- Continuous (T

= 25°C unless otherwise noted

C

= 25°C)

C

= 70°C)

C

(Note 1)

(Note 3)

10 A

8A

50 A

7.0 V/ns

2.5 W

1

Thermal Characteristics

Symbol Parameter Typ Max Units

R

θJA

Thermal Resistance, Junction-to-Ambient -- 50 °C/W

Rev. A, May 2000

FQS4410

Electrical Characteristics T

= 25°C unless otherwise noted

C

Symbol Parameter Test Conditions Min Typ Max

Off Characteristics

BV

DSS

∆BV

DSS

/ ∆T I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient

J

Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, ID = 250 µA

V

GS

= 250 µA, Referenced to

I

D

25°C V

= 30 V, VGS = 0 V

DS

V

= 24 V, TC = 125°C

DS

= 20 V, VDS = 0 V

V

GS

V

= -20 V, VDS = 0 V

GS

30 -- -- V

-- 0.03 -- V/°C

-- -- 1 µA

-- -- 10 µA

-- -- 100 nA

-- -- -100 nA

On Characteristics

V R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage Static Drain-Source

On-Resistance Forward Transconductance

V

= VGS, ID = 250 µA

DS

= 10 V, ID = 10 A

V

GS

V

= 4.5 V, ID = 5 A

GS

= 10 V, ID = 5 A

V

DS

(Note 4)

1.0 -- 2.5 V

--

-- 16 -- S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance Output Capacitance -- 590 770 pF Reverse Transfer Capacitance -- 145 190 pF

= 25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 980 1280 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q Q Q

g gs gd

Turn-On Delay Time Turn-On Rise Time -- 165 340 ns Turn-Off Delay Time -- 65 140 ns Turn-Off Fall Time -- 110 23 0 ns Total Gate Charge Gate-Source Charge -- 4.2 -- nC Gate-Drain Charge -- 12 -- nC

V

= 15 V, ID = 5 A,

DD

R

= 50 Ω

G

= 24 V, ID = 10 A,

V

DS

V

GS

= 5 V

(Note 4, 5)

-- 30 70 ns

-- 21 28 nC

0.0135

0.02

Unit

s

Ω

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 3mH, IAS = 10A, VDD = 15V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ 10A, di/dt ≤ 300A/us, VDD ≤ BV

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

Maximum Continuous Drain-Source Diode Forward Current -- -- 2.3 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 50 A

= 0 V, IS = 2.3 A

Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 45 -- nC

Starting TJ = 25°C

DSS,

V

GS

= 0 V, IS = 24 A,

V

GS

dI

/ dt = 100 A/µs

F

(Note 4)

-- -- 1.1 V

-- 45 -- ns

Rev. A, May 2000

Typical Characteristics

FQS4410

1

10

, Drain Current [A]

D

I

0

10

-1

10

VDS, Drain-Source Voltage [V]

Figure 1. Output Characte ri st ic s

※

Not e :

1. 250μs Pulse Test

℃

= 25

2. T

C

0

10

V Top : 10 .0 V

8.0 V

6.0 V

5.0 V

4.5 V

4.0 V

3.5 V Bottom : 3.0 V

GS

1

10

℃

150

℃

25

0

10

, Drain Current [A]

D

I

-1

10

2.0 2.5 3.0 3.5 4.0

VGS, Gate-Source Voltage [V]

Figure 2. Transfer Characteristics

※

Note

1. V

= 10V

℃

-55

DS

2. 250μs Pulse Test

40

30

],

Ω

20

[m

DS(ON)

R

10

Drain-Source On-Resistance

0

0 1020304050

VGS = 4.5V

VGS = 10V

※

Note : T

J

ID, Drain Current [A]

= 25

℃

1

10

0

10

※

℃

, Reverse Drain Current [A]

DR

I

-1

10

0.2 0.4 0.6 0.8 1.0 1.2

150

℃

25

Not e :

= 0V

1. V

GS

2. 250μs Pul se Test

VSD, Source-Drain voltage [V]

Figure 3. On-Resistance Variati on vs.

Drain Current

3000

2500

2000

1500

1000

Capacitance [pF]

500

0

-1

10

VDS, Drain-Source Voltage [V]

C

iss

C

oss

C

rss

C

oss

C

iss

C

rss

0

10

Figure 5. Capacitance vs. Drai n-Source Voltage

= Cgs + Cgd (Cds = shorted)

= Cds + C

gd

= C

gd

※

Note ;

= 0 V

1. V

GS

2. f = 1 MHz

1

10

Figure 4. Source-Drain Diode Forward Voltage

12

10

VDS = 15V

VDS = 24V

8

6

4

2

, Gate-Source Voltage [V]

GS

V

0

0 5 10 15 20 25 30 35 40

QG, Total Gate Charge [nC]

Figure 6. Gate Charge vs. Gate-Source Voltage

※

Note : I

= 10A

D

Rev. A, May 2000

Typical Characteristics (Continued)

FQS4410

1.2

1.1

1.0

, (No rmalize d )

DSS

0.9

BV

Drain-Source Breakdown Voltage

0.8

-100 -50 0 50 100 150 200

TJ, Junction Temperature [oC]

※

1. V

2. I

Not e :

= 0 V

GS

= 250 μA

D

2.5

2.0

1.5

1.0

, (Normalized)

DS(ON)

R

0.5

Drain-Source On-Resistance

0.0

-100 -50 0 50 100 150 200

, Junction Temperature [oC]

T

J

※

Note :

1. V

GS

= 10 A

2. I

D

Figure 7. Breakdown Voltage vs. Temperature Figure 8. On-Res is ta nce vs. Temperature

Operation in This Area is Limite d by R

2

10

1

10

0

10

, Drain Current [A]

D

I

-1

10

-1

10

DS(o n)

DC

※

Not e s :

1. T

= 25 oC

C

2. T

= 150 oC

J

3. Single Puls e

0

10

100 ms

10 ms

1 ms

10

100 µs

1

VDS, Drain-Source Voltage [V]

12

10

8

6

4

, Drain Current [A]

D

I

2

0

25 50 75 100 125 150

TC, Case Temperature [℃]

= 10 V

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

10

※

Notes :

(t) = 5 0 ℃/W M a x.

1. Z

θ JA

2. D u t y F a c t o r , D = t

3. TJM - TA = PDM * Z

-1

10

0

10

1/t2

(t)

θ JA

1

10

2

10

D=0.5

1

0.2

10

0.1

0.05

0.02

0

10

0.01

(t), Therm al Response

JA

θ

Z

-1

10

-4

10

single pulse

-3

10

-2

t1, Square W ave Pulse Duration [sec]

Figure 11. Thermal Response

Rev. A, May 2000

Gate Charge Test Circuit & Waveform

FQS4410

V

DS

)

5V

V

GS

DS

Q

90%

Q

g

gs

Q

gd

Charge

12V

200nF

3mA

50KΩ

300nF

V

GS

Same Type

as DUT

V

DUT

Resistive Switching Test Circuit & Waveforms

R

V

DS

R

G

L

( 0.5 rated V

V

DD

DS

5V

10V

10%

V

in

DUT

in

t

d(on)tr

t

on

t

d(off )

t

f

t

off

Unclamped Inductive Switching Test Circuit & Waveforms

BV

DSS

V

LL

DS

V

DD

IDI

D

R

G

DUT

BV

V

DSS

I

AS

DD

E

AS

1

----

=LL I

2

AS

I

(t)

D

t

p

DSS

--------------------

-------------------BV

BV

-- V

DSS

DD

DSS

DD

Time

V

(t)

V

(t)

DS

Rev. A, May 2000

Peak Diode Recovery dv /d t Test Circuit & Waveforms

FQS4410

V

GS

( Driver )

DUT

+

V

DS

_

ISI

S

LL

Driver

R

G

V

GS

D =

Same Type

as DUT

• dv/dt controlled by R

•IScontrolled by pulse period

Gate Pulse Width

--------------------------

-------------------------Gate Pulse Period

Gate Pulse Period

V

DD

G

10V

I

( DUT )

V

( DUT )

S

DS

IFM, Body Diode Forward Current

I

RM

Body Diode Reverse Current

Body Diode Recovery dv/dt

V

f

Body Diode

Forward Voltage Drop

di/dt

V

DD

Rev. A, May 2000

Package Dimensions

FQS4410

8-SOP

1.55 ±0.20

0.061 ±0.008

MIN

0.004~0.001

0.1~0.25

0.56

0.022

()

0.006

0.15

+

-0.002

-0.05

0.004

0.50 ±0.20

0.020 ±0.008

+

0.10

#1

#4

6.00 ±0.30

0.236 ±0.012

3.95 ±0.20

0.156 ±0.008

5.72

0.225

#8

#5

0.071

0~8°

MAX

5.13

0.202

1.80

4.92 ±0.20

MAX

0.194 ±0.008

MAX0.10

MAX0.004

1.27

0.050

0.41 ±0.10

0.016 ±0.004

Rev. A, May 2000

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™

2

E

CMOS™ EnSigna™ FACT™ FACT Quiet Series™

®

FAST

FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench

®

QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™

VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In

Design

Preliminary First Production This datasheet contains preliminary data, and

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Obsolete Not In Production This datasheet contains specifications on a product

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Semiconductor reserves the right to make changes at any time without notice in order to improve design.

that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. F1