Datasheet FQP3N80C, FQPF3N80C Datasheet (Fairchild)

Page 1
FQP3N80C/FQPF3N80C
800V N-Channel MOSFET
FQP3N80C/FQPF3N80C
TM
QFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well
Features
• 3.0A, 800V, R
• Low gate charge ( typical 13 nC)
• Low Crss ( typical 5.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
= 4.8Ω @VGS = 10 V
DS(on)
suited for high efficiency switch mode power supplies.
D
!!!!
!!!!
!!!!
!!!!
####
####
""""
""""
!!!!
!!!! !!!!
!!!!
!!!!
!!!!
S
G
SD
TO-220
FQP Series
Absolute Maximum Ratings T
D
G
S
= 25°C unless otherwise noted
C
TO-220F
FQPF Series
!!!!
!!!!
G
Symbol Parameter FQP3N80C FQPF3N80C Units
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt P
D
Drain-Source Voltage 800 V Drain Current
- Continuous (T
- Continuous (T
Drain Current - Pulsed
= 25°C)
C
= 100°C)
C
(Note 1)
33 *A
1.9 1.9 * A 12 12 * A
Gate-Source Voltage ± 30 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Power Dissipation (TC = 25°C)
(Note 2) (Note 1) (Note 1) (Note 3)
320 mJ
3A
10.7 mJ
4.5 V/ns
107 39 W
- Derate above 25°C 0.85 0.31 W/°C
T
, T
J
STG
T
L
* Drain current limited by maximum junction temperature.
Operating and Storage Temperature Range -55 to +150 °C Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
300 °C
Thermal Characteristics
Symbol Parameter FQP3N80C FQPF3N80C Units
R
θJC
R
θCS
R
θJA
©2003 Fairchild Semiconductor Corporation Rev. A, April 2003
Thermal Resistance, Junction-to-Case 1.17 3.2 °C/W Thermal Resistance, Case-to-Sink Typ. 0.5 -- °C/W Thermal Resistance, Junction-to-Ambient 62.5 62.5 °C/W
Page 2
FQP3N80C/FQPF3N80C
Electrical Characteristics T
= 25°C unless otherwise noted
C
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
BV
DSS
/ ∆T I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage Breakdown Voltage Temperature
Coefficient
J
Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
= 0 V, ID = 250 µA
V
GS
I
= 250 µA, Referenced to 25°C
D
V
= 800 V, VGS = 0 V
DS
V
= 640 V, TC = 125°C
DS
V
= 30 V, VDS = 0 V
GS
= -30 V, VDS = 0 V
V
GS
800 -- -- V
-- 1 -- V/°C
-- -- 10 µA
-- -- 100 µA
-- -- 100 nA
-- -- -100 nA
On Characteristics
V R
g
FS
GS(th)
DS(on)
Gate Threshold Voltage Static Drain-Source
On-Resistance Forward Transconductance
V
= VGS, ID = 250 µA
DS
= 10 V, ID = 1.5 A
V
GS
= 50 V, ID = 1.5 A
V
DS
(Note 4)
3.0 -- 5.0 V
-- 4.0 4.8
-- 3 -- S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance Output Capacitance -- 54 70 pF Reverse Transfer Capacitance -- 5.5 7. 5 pF
= 25 V, VGS = 0 V,
V
DS
f = 1.0 MHz
-- 543 705 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q Q Q
g gs gd
Turn-On Delay Time Turn-On Rise Time -- 43.5 95 ns Turn-Off Delay Time -- 22.5 55 ns Turn-Off Fall Time -- 32 75 ns Total Gate Charge Gate-Source Charge -- 3.4 -- nC Gate-Drain Charge -- 5.8 -- nC
= 400 V, ID = 3 A,
V
DD
= 25
R
G
(Note 4, 5)
V
= 640 V, ID = 3 A,
DS
V
GS
(Note 4, 5)
= 10 V
-- 15 40 ns
-- 13 16.5 nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 67mH, IAS = 3.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 3A, di/dt 200A/µs, VDD BV
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
©2003 Fairchild Semiconductor Corporation
Maximum Continuous Drain-Source Diode Forward Current -- -- 3.0 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 12 A
= 0 V, IS = 3.0 A
Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 4.0 -- µC
Starting TJ = 25°C
DSS,
V
GS
= 0 V, IS = 3.0 A,
V
GS
/ dt = 100 A/µs
dI
F
-- -- 1.4 V
-- 642 -- ns
(Note 4)
Rev. A, April 2003
Page 3
Typical Characteristics
FQP3N80C/FQPF3N80C
10
10
10
, Dra in C u rre n t [A ]
D
I
10
1
V Top : 1 5 .0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V Botto m : 5.5 V
0
-1
-2
-1
10
GS
$
Note s :
1. 250&s Pulse Test
%
2. T
= 25
C
0
10
1
10
VDS, Drain-Source Voltage [V]
VGS = 20V
VGS = 10V
$
Note : T
%
= 25
J
10
8
],
'
[
6
DS(ON)
R
4
Drain-Source On-Resistance
2
02468
ID, Drain Current [A]
1
10
150oC
0
10
25oC
, Drain Current [A]
D
I
-1
10
46810
-55oC
$
Note s :
1. V
= 50V
DS
2. 25 0&s Pulse Te st
VGS, Gate-Source Voltage [V]
Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s
1
10
0
10
%
, Reverse Drain Current [A]
DR
I
-1
10
0.2 0.4 0.6 0.8 1.0 1.2 1.4
150
VSD, So ur ce -Drain v olta g e [V ]
%
25
$
Note s :
= 0V
1. V
GS
2. 250&s Pulse Test
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
800
600
400
Capacitance [pF]
200
0
-1
10
C
= Cgs + Cgd (Cds = shorted)
iss
C
= Cds + C
oss
gd
C
= C
rss
C
iss
C
oss
C
rss
0
10
gd
1
10
$
Notes :
1. V
= 0 V
GS
2. f = 1 M Hz
12
10
8
6
4
, Gate-Source Voltage [V]
GS
2
V
0
03691215
VDS, Drain-Source Voltage [V]
VDS = 160V
VDS = 400V
VDS = 640V
QG, Tota l G a te C h arg e [n C ]
$
Note : I
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Ch a ra ct eristics
= 3A
D
Rev. A, April 2003©2003 Fairchild Semiconductor Corporation
Page 4
Typical Characteristics
(Continued)
FQP3N80C/FQPF3N80C
1.2
1.1
1.0
, (N ormalize d )
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-100 -50 0 50 100 150 200
$
1. V
2. I
Note s :
D
= 0 V
GS
= 250 &A
TJ, Junction Temperature [oC]
Figure 7. Breakdown Voltage Variation
vs Temperature
Operation in This Area is Limited by R
1
10
0
10
, Dra in Curren t [A ]
-1
D
I
10
-2
10
0
10
DS(on)
100 ms
DC
$
Note s :
1. T
= 25 oC
C
2. T
= 150 oC
J
3. Single Pulse
1
10
2
10
VDS, Drain-Source Voltage [V]
10 ms
100 µs
1 ms
3.0
2.5
2.0
1.5
, (Normalize d )
1.0
DS(ON)
R
Drain-Source On-Resistance
0.5
0.0
-100 -50 0 50 100 150 200
$
Note s :
= 10 V
1. V
GS
= 1.5 A
2. I
D
TJ, Junction Temperature [oC]
Figure 8. On-Resistance Va riation
vs Temperature
Operation in This Area is Limited by R
$
Note s :
1. T
2. T
3. Single Pulse
1
10
= 25 oC
C
= 150 oC
J
DS(on)
100 µs
1 ms
10 ms
100 ms
DC
2
10
3
10
1
10
0
10
, Drain Current [A]
-1
D
I
10
-2
10
3
10
0
10
VDS, Drain-Source Voltage [V]
Figure 9-1. Maximum Safe O per at in g Are a
4
3
2
, Drain Current [A]
D
I
1
0
25 50 75 100 125 150
Figure 10. Maximum Drain Current
vs Case Temperature
©2003 Fairchild Semiconductor Corporation
for FQP3N80C
TC, Case Temperature [%]
Figure 9-2. Maximum Safe Operating Area
for FQPF3N80C
Rev. A, April 2003
Page 5
Typical Characteristics
0
10
D=0.5
(Continued)
FQP3N80C/FQPF3N80C
0.2
0.1
-1
10
0.05
0.02
(t), Th e rm al Re s p o n se
JC
0.01
(
Z
-2
10
-5
10
single pulse
-4
10
-3
10
-2
10
$
No tes :
1. Z
(t) = 1.17 %/W M a x.
(
JC
2. D u ty Fa ct o r, D = t
3. TJM - TC = PDM * Z
P
DM
t
1
t
2
-1
10
10
1/t2
(t)
(
JC
0
t1, Square W ave Pulse Duration [sec]
Figure 11-1. Transient Thermal Response Curve for FQP3N80C
D=0.5
0
10
0.2
0.1
0.05
-1
10
0.02
(t), The rm al Res p o n s e
JC
0.01
(
Z
sin g le p u ls e
-2
10
-5
10
-4
10
-3
10
t
, Square Wave Pulse Duration [sec]
1
-2
10
$
Notes :
1. Z
(t) = 3.2 %/W M ax .
(
JC
2. D u ty F ac t o r, D = t
3. TJM - TC = PDM * Z
P
DM
t
1
-1
10
1/t2
(
JC
t
2
0
10
1
10
(t)
1
10
©2003 Fairchild Semiconductor Corporation
Figure 11-2. Transient Thermal Res ponse Curve for FQPF3N80 C
Rev. A, April 2003
Page 6
12V
12V
200nF
200nF
3mA
3mA
50K)
50K)
V
V
Gate Charge Test Circuit & Waveform
V
V
GS
GS
GS
300nF
300nF
Same Type
Same Type
as DUT
as DUT
DUT
DUT
V
V
DS
DS
GS
10V
10V
Resistive Switching Test Circuit & Waveforms
FQP3N80C/FQPF3N80C
Q
Q
g
g
Q
Q
gs
gs
Q
Q
gd
gd
Charge
Charge
10V
10V
10V
10V
R
R
L
DUT
DUT
L
V
V
DD
DD
V
V
DS
DS
V
V
GS
GS
R
R
G
G
V
V
DS
DS
90%
90%
10%
10%
V
V
GS
GS
t
t
d(on)tr
d(on)tr
t
t
on
on
t
t
d(off)
d(off)
t
t
f
f
t
t
off
off
Unclamped Inductive Switching Test Circuit & Waveforms
BV
BV
DSS
L
LL
V
V
DS
DS
BV
BV
DSS
V
V
DSS
I
I
AS
AS
DD
DD
I
IDI
D
D
R
R
G
G
DUT
DUT
t
t
p
p
V
V
DD
DD
1
1
1
1
----
----
----
----
E
E
=LI
E
=LI
=LI
AS
AS
AS
2
2
2
2
AS
AS
AS
ID (t)
ID (t)
t
2
2
2
t
p
p
DSS
--------------------
-------------------­BV
BV
DSS-VDD
DSS-VDD
Time
Time
V
(t)
V
(t)
DS
DS
©2003 Fairchild Semiconductor Corporation
Rev. A, April 2003
Page 7
Peak Diode Recovery dv /d t Test Circuit & Waveforms
+
DUT
DUT
I
I
SD
SD
Driver
Driver
R
R
G
G
V
V
GS
GS
+
V
V
DS
DS
_
_
L
LL
Same Type
Same Type
as DUT
as DUT
• dv/dt controlled by R
• dv/dt controlled by R
•ISDcontroll ed by pulse period
•ISDcontroll ed by pulse period
G
G
FQP3N80C/FQPF3N80C
V
V
DD
DD
V
V
GS
GS
( Driver )
( Driver )
I
I
SD
SD
( DUT )
( DUT )
V
V
DS
DS
( DUT )
( DUT )
Gate Pulse Width
Gate Pulse Width
Gate Pulse Width
--------------------------
--------------------------
--------------------------
D =
D =
D =
Gate Pulse Period
Gate Pulse Period
Gate Pulse Period
IFM, Body Diode Forward Current
IFM, Body Diode Forward Current
I
I
RM
RM
Body Diode Reverse Current
Body Diode Reverse Current
Body Diode Recovery dv/dt
Body Diode Recovery dv/dt
V
V
SD
SD
Body Diode
Body Diode
Forward Voltage Drop
Forward Voltage Drop
di/dt
di/dt
10V
10V
V
V
DD
DD
©2003 Fairchild Semiconductor Corporation
Rev. A, April 2003
Page 8
Package Dimensions
FQP3N80C/FQPF3N80C
TO-220
(1.70)
9.20 ±0.2013.08 ±0.20
1.30 ±0.10
(1.46)
(1.00)
1.27 ±0.10
9.90 ±0.20 (8.70)
ø3.60 ±0.10
(3.70)(3.00)
(45°)
1.52 ±0.10
2.80 ±0.1015.90 ±0.20
18.95MAX.
4.50 ±0.20
+0.10
1.30
–0.05
2.54TYP
±0.20]
[2.54
©2003 Fairchild Semiconductor Corporation
10.00 ±0.20
0.80 ±0.10
2.54TYP
±0.20]
[2.54
10.08 ±0.30
0.50
+0.10 –0.05
2.40 ±0.20
Dimensions in Millimeters
Rev. A, April 2003
Page 9
Package Dimensions
10.16 ±0.20
(Continued)
TO-220F
ø3.18 ±0.10
2.54
FQP3N80C/FQPF3N80C
±0.20
3.30 ±0.10
15.80 ±0.20
9.75 ±0.30
MAX1.47
0.80 ±0.10
(7.00)
(30°)
6.68 ±0.20
(1.00x45°)
(0.70)
0.20
15.87 ±
0.35 ±0.10
2.54TYP
[2.54
±0.20]
©2003 Fairchild Semiconductor Corporation
#1
9.40 ±0.20
2.54TYP
[2.54
±0.20]
4.70 ±0.20
0.50
+0.10 –0.05
2.76 ±0.20
Dimensions in Millimeters
Rev. A, April 2003
Page 10
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
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PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design
Preliminary First Production This datasheet contains preliminary data, and
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Obsolete Not In Production This datasheet contains specifications on a product
©2003 Fairchild Semiconductor Corporation
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Semiconductor reserves the right to make changes at any time without notice in order to improve design.
that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I2
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