Datasheet FQI30N06L Datasheet (Fairchild Semiconductor)

Page 1
May 2001
QFET
TM
FQB30N06L / FQI30N06L
©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001
FQB30N06L / FQI3 0N06L
60V LOGIC N-Channel MOSFET
General Description
Features
• 32A, 60V, R
DS(on)
= 0.035 @VGS = 10 V
• Low gate charge ( typical 15 nC)
• Low Crss ( typical 50 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175°C maximum junction temperature rating
!
"
!
!
!
"
"
"
!
"
!
!
!
"
"
"
Absolute Maximum Ratings T
C
= 25°C unless otherwise noted
Thermal Characteristics
Symbol Parameter FQB30N06L / FQI30N06L Units
V
DSS
Drain-Source Voltage 60 V
I
D
Drain Current
- Continuous (T
C
= 25°C)
32 A
- Continuous (T
C
= 100°C)
22.6 A
I
DM
Drain Current - Pulsed
(Note 1)
128 A
V
GSS
Gate-Source Voltage ± 20 V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
350 mJ
I
AR
Avalanche Current
(Note 1)
32 A
E
AR
Repetitive Avalanche Energy
(Note 1)
7.9 mJ
dv/dt Peak Diode Recovery dv/dt
(Note 3)
7.0 V/ns
P
D
Power Dissipation (TA = 25°C) *
3.75 W
Power Dissipation (T
C
= 25°C)
79 W
- Derate above 25°C 0.53 W/°C
T
J
, T
STG
Operating and Storage Temperature Range -55 to +175 °C
T
L
Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
300 °C
Symbol Parameter Typ Max Units
R
θJC
Thermal Resistance, Junction-to-Case -- 1.90 °C/W
R
θJA
Thermal Resistance, Junction-to-Ambient * -- 40 °C/W
R
θJA
Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W
* When mounted on the minimum pad size recommended (PCB Mount)
S
D
G
D2-PAK
FQB Series
I2-PAK
FQI Series
G
S
D
G
S
D
Page 2
FQB30N06L / FQI30N06L
Rev. A1. May 2001©2001 Fairchild Semiconductor Corporation
Electrical Characteristics T
C
= 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 400µH, IAS = 32A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 32A, di/dt 300A/us, VDD BV
DSS,
Starting TJ = 25°C
4. Pulse Test : Pulse width 300us, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
Symbol Parameter Te st Conditions Min Typ Max Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, ID = 250 µA
60 -- -- V
BV
DSS
/ ∆T
J
Breakdown Voltage Temperature Coefficient
I
D
= 250 µA, Referenced to 25°C
-- 0.06 -- V/°C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 60 V, VGS = 0 V
-- -- 1 µA
V
DS
= 48 V, TC = 150°C
-- -- 10 µA
I
GSSF
Gate-Body Leakage Current, Forward
V
GS
= 20 V, VDS = 0 V
-- -- 100 nA
I
GSSR
Gate-Body Leakage Current, Reverse
V
GS
= -20 V, VDS = 0 V
-- -- -100 nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= VGS, ID = 250 µA
1.0 -- 2.5 V
R
DS(on)
Static Drain-Source On-Resistance
V
GS
= 10 V, ID = 16 A
V
GS
= 5 V , ID =16 A
----0.027
0.035
0.035
0.045
g
FS
Forward Transconductance
V
DS
= 25 V, ID = 16 A
-- 24 -- S
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= 25 V, VGS = 0 V,
f = 1.0 MHz
-- 800 1040 pF
C
oss
Output Capacitance -- 270 350 pF
C
rss
Reverse Transfer Capacitance -- 50 65 pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
V
DD
= 30 V, ID = 16 A,
R
G
= 25
-- 15 40 ns
t
r
Turn-On Rise Time -- 210 430 ns
t
d(off)
Turn-Off Delay Time -- 60 130 ns
t
f
Turn-Off Fall Time -- 110 23 0 n s
Q
g
Total Gate Charge
V
DS
= 48 V, ID = 32 A,
V
GS
= 5 V
-- 15 20 nC
Q
gs
Gate-Source Charge -- 3.5 -- nC
Q
gd
Gate-Drain Charge -- 8.5 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current -- -- 32 A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current -- -- 128 A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, IS = 32 A
-- -- 1.5 V
t
rr
Reverse Recovery Time
V
GS
= 0 V, IS = 32 A,
dI
F
/ dt = 100 A/µs
-- 60 -- ns
Q
rr
Reverse Recovery Charge -- 90 -- nC
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
Page 3
FQB30N06L / FQI30N06L
©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001
10
-1
10
0
10
1
10
0
10
1
10
2
V
GS
Top : 10.0 V
8.0 V
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V Bottom : 3 .0 V
!
Notes :
1. 250"s Pulse Te st
2. T
C
= 25
#
I
D
, Drain Current [A]
VDS, Drain-Source Vo ltage [V]
0 5 10 15 20 25 30
0
2
4
6
8
10
12
VDS = 30V
VDS = 48V
!
Note : I
D
= 32A
V
GS
, Gate-Source Voltage [V]
QG, Total Gate Charge [nC]
10
-1
10
0
10
1
0
500
1000
1500
2000
C
iss
= Cgs + Cgd (Cds = shorted)
C
oss
= Cds + C
gd
C
rss
= C
gd
!
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
0.4 0.6 0.8 1.0 1.2 1.4 1.6
10
0
10
1
10
2
175
#
!
Notes :
1. V
GS
= 0V
2. 250"s Pulse Test
25
#
I
DR
, Reverse Drain Current [A]
VSD, Source-Drain voltage [V]
0 20406080100120
0
20
40
60
80
VGS = 10V
VGS = 5V
!
Not e : T
J
= 25
#
R
DS(ON)
[m
$
],
Drain-Source On-Resistance
ID, Drain Current [A]
0246810
10
0
10
1
10
2
175
#
25
#
-55
#
!
Notes :
1. V
DS
= 25V
2. 250"s Pulse Test
I
D
, Drain Current [A]
V
GS
, Gate-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variati on vs .
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On-Region Charact eristics
Page 4
FQB30N06L / FQI30N06L
©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
-2
10
-1
10
0
!
Notes :
1. Z
%
JC
(t) = 1.90 #/W M a x .
2. D u t y Fa c t o r , D = t
1/t2
3. TJM - TC = PDM * Z
%
JC
(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
Z
%
JC
(t), Thermal R esponse
t1, S q u a re W a v e P uls e D u ra tio n [s e c ]
25 50 75 100 125 150 175
0
10
20
30
40
I
D
, Drain Current [A]
TC, Case Temperature [#]
10
-1
10
0
10
1
10
2
10
0
10
1
10
2
DC
10 ms
1 ms
100 µs
Op eration in This Area is Limited by R
DS(on)
!
Notes :
1. T
C
= 25 oC
2. T
J
= 175 oC
3. Singl e Pulse
I
D
, Drain Current [A]
VDS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
!
Notes :
1. V
GS
= 10 V
2. ID = 16 A
R
DS(ON)
, (Normalized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
!
Note s :
1. VGS = 0 V
2. ID = 250 "A
BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
TJ, Junction Temperature [oC]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs Case Temperature
Figure 7. Breakdo w n Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Transient Thermal Response Cur ve
t
1
P
DM
t
2
Page 5
FQB30N06L / FQI30N06L
©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveform
Charge
V
GS
5V
Q
g
Q
gs
Q
gd
3mA
V
GS
DUT
V
DS
300nF
50K
&
200nF
12V
Same Type
as DUT
Charge
V
GS
5V
Q
g
Q
gs
Q
gd
3mA
V
GS
DUT
V
DS
300nF
50K
&
200nF
12V
Same Type
as DUT
V
GS
V
DS
10%
90%
t
d(on)tr
t
on
t
off
t
d(off)
t
f
V
DD
5V
V
DS
R
L
DUT
R
G
V
GS
V
GS
V
DS
10%
90%
t
d(on)tr
t
on
t
off
t
d(off)
t
f
V
DD
5V
V
DS
R
L
DUT
R
G
V
GS
E
AS
=LI
AS
2
---­2
1
-------------------­BV
DSS-VDD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
10V
DUT
R
G
L
I
D
t
p
E
AS
=LI
AS
2
---­2
1
E
AS
=LI
AS
2
---­2
1
---­2
1
-------------------­BV
DSS-VDD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
10V
DUT
R
G
LL
IDI
D
t
p
Page 6
FQB30N06L / FQI30N06L
©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001
Peak Diode Recovery dv/d t Test Circuit & Waveforms
DUT
V
DS
+
_
Driver
R
G
Same Type
as DUT
V
GS
• dv/dt controlled by R
G
•ISDcontroll e d by pulse period
V
DD
L
I
SD
10V
V
GS
( Driver )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
SD
IFM, Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recoverydv/dt
di/dt
D =
Gate Pulse Width Gate Pulse Period
--------------------------
DUT
V
DS
+
_
Driver
R
G
Same Type
as DUT
V
GS
• dv/dt controlled by R
G
•ISDcontroll e d by pulse period
V
DD
LL
I
SD
10V
V
GS
( Driver )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
SD
IFM, Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recoverydv/dt
di/dt
D =
Gate Pulse Width Gate Pulse Period
--------------------------
D =
Gate Pulse Width Gate Pulse Period
--------------------------
Page 7
FQB30N06L / FQI30N06L
©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001
Package Dimensions
10.00 ±0.20
10.00 ±0.20 (8.00) (4.40)
1.27
±0.10
0.80 ±0.10
0.80 ±0.10
(2XR0.45)
9.90
±0.20
4.50 ±0.20
0.10 ±0.15
2.40 ±0.20
2.54 ±0.30
15.30 ±0.30
9.20 ±0.20
4.90 ±0.20
1.40 ±0.20
2.00 ±0.10
(0.75)
(1.75)
(7.20)
0°~3°
1.20 ±0.20
9.20 ±0.20
15.30 ±0.30
4.90 ±0.20
(0.40)
2.54 TYP 2.54 TYP
1.30
+0.10 –0.05
0.50
+0.10 –0.05
D2PAK
Page 8
FQB30N06L / FQI30N06L
©2001 Fairchild Semiconductor Corporation Rev. A1. May 2001
Package Dimensions
(Continued)
9.90 ±0.20
2.40 ±0.20
4.50 ±0.20
1.27 ±0.10 1.47 ±0.10
(45°)
0.80 ±0.10
10.00 ±0.20
2.54 TYP2.54 TYP
13.08 ±0.20
9.20 ±0.20
1.20 ±0.20
10.08 ±0.20 MAX13.40
MAX 3.00
(0.40)
(1.46)
(0.94)
1.30
+0.10 –0.05
0.50
+0.10 –0.05
I2PAK
Page 9
©2001 Fairchild Semiconductor Corporation Rev. H2
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2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
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