Datasheet FQB17P10 Datasheet (Fairchild Semiconductor)

FQB17P10 / FQI17P10

100V P-Channel MOSFET

FQB17P10 / FQI17P10

TM

QFET

General Description

These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as audio amplifier,

Features

• -16.5A, -100V, R

• Low gate charge ( typical 30 nC)

• Low Crss ( typical 100 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

• 175°C maximum junction temperature rating

= 0.19Ω @VGS = -10 V

DS(on)

high efficiency switching DC/DC converters, and DC motor control.

D

G

GS

Absolute Maximum Ratings T

D2-PAK

FQB Series

GSD

= 25°C unless otherwise noted

C

I2-PAK

FQI Series

S

Symbol Parameter FQB17P10 / FQI17P10 Units

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt P

D

Drain-Source Voltage -100 V Drain Current

- Continuous (T

Drain Current - Pulsed

= 25°C)

C

= 100°C)

C

(Note 1)

-16.5 A

-11.7 A

-66 A Gate-Source Voltage ± 30 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy

Power Dissipation (TA = 25°C) * Power Dissipation (T

= 25°C)

C

(Note 2) (Note 1) (Note 1) (Note 3)

580 mJ

-16.5 A 10 mJ

-6.0 V/ns

3.75 W 100 W

- Derate above 25°C 0.67 W/°C

, T

T

J

STG

T

L

Operating and Storage Temperature Range -55 to +175 °C Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

300 °C

Thermal Characteristics

Symbol Parameter Typ Max Units

R

θJC

R

θJA

R

θJA

* When mounted on the minimum pad size recommended (PCB Mount)

Thermal Resistance, Junction-to-Case -- 1.5 °C/W Thermal Resistance, Junction-to-Ambient * -- 40 °C/W Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W

Rev. B, August 2002

FQB17P10 / FQI17P10

Electrical Characteristics T

= 25°C unless otherwise noted

C

Symbol Parameter Te st Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BV

DSS

/ ∆T I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient

J

Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, ID = -250 µA

V

GS

I

= -250 µA, Referenced to 25°C

D

V

= -100 V, VGS = 0 V

DS

V

= -80 V, TC = 150°C

DS

V

= -30 V, VDS = 0 V

GS

= 30 V, VDS = 0 V

V

GS

-100 -- -- V

-- -0.1 -- V/°C

-- -- -1 µA

-- -- -10 µA

-- -- -100 nA

-- -- 100 nA

On Characteristics

V R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage Static Drain-Source

On-Resistance Forward Transconductance

V

= VGS, ID = -250 µA

DS

= -10 V, ID = -8.25 A

V

GS

= -40 V, ID = -8.25 A

V

DS

(Note 4)

-2.0 -- -4.0 V

-- 0.14 0.19 Ω

-- 9.9 -- S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance Output Capacitance -- 310 400 pF Reverse Transfer Capacitance -- 100 130 pF

= -25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 850 1100 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q Q Q

g gs gd

Turn-On Delay Time Turn-On Rise Time -- 200 410 ns Turn-Off Delay Time -- 45 100 ns Turn-Off Fall Time -- 100 210 ns Total Gate Charge Gate-Source Charge -- 4.8 -- nC Gate-Drain Charge -- 17 -- nC

= -50 V, ID = -16.5 A,

V

DD

= 25 Ω

R

G

V

= -80 V, ID = -16.5 A,

DS

V

GS

= -10 V

(Note 4, 5)

-- 17 45 ns

-- 30 39 nC

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 3.2mH, IAS = -16.5A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ -16.5A, di/dt ≤ 300A/µs, VDD ≤ BV

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

Maximum Continuous Drain-Source Diode Forward Current -- -- -16.5 A Maximum Pulsed Drain-Source Diode Forward Current -- -- -66 A

= 0 V, IS = -16.5 A

Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 0.52 -- µC

Starting TJ = 25°C

DSS,

V

GS

= 0 V, IS = -16.5 A,

V

GS

/ dt = 100 A/µs

dI

F

-- -- -4.0 V

-- 120 -- ns

(Note 4)

Rev. B, August 2002

Typical Characteristics

V

GS

Top : -15.0 V

-10.0 V

-8.0 V

-7.0 V

1

-6.5 V

10

-5.5 V

-5.0 V Botto m : -4.5 V

0

10

, Drain Current [A]

D

-I

-1

10

-1

10

0

10

-VDS, Drain-Source Voltage [V]

※

Notes :

1. 250μs Pulse Test

℃

2. T

= 25

C

1

10

FQB17P10 / FQI17P10

1

10

℃

175

0

10

℃

25

, Drain Current [A]

D

-I

-1

10

246810

℃

-55

※

Notes :

1. V

= -40V

DS

2. 250μs Pulse Test

-VGS , Gate-Source Voltage [V]

Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s

0.7

0.6

0.5

],

Ω

0.4

[

DS(on)

0.3

R

VGS = - 10V

VGS = - 20V

0.2

Drain-Source On-Resistance

0.1

0.0 0 20406080

※

Note : T

℃

= 25

J

-ID , Drai n Curren t [A]

Figure 3. On-Resistance Variati on vs.

Drain Current and Gate Voltage

2200 2000 1800 1600 1400 1200 1000

800

Capacitance [pF]

600 400 200

0

-1

10

C

oss

C

iss

C

rss

VDS, Drain-Source Voltage [V]

C

= Cgs + Cgd (Cds = shorted)

iss

= Cds + C

C

oss

gd

C

= C

rss

gd

※

Notes :

= 0 V

1. V

GS

2. f = 1 MHz

0

10

1

10

1

10

0

10

℃

25

℃

175

, Reve rs e D ra in Current [A ]

DR

-I

-1

10

0.0 0.5 1.0 1.5 2.0 2.5 3.0

※

Notes :

= 0V

1. V

GS

2. 250μs Pulse Test

-VSD , Source-Drain Voltage [V]

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

VDS = -50V

VDS = -80V

VDS = -20V

※

Note : I

= -16.5 A

D

12

10

8

6

4

, Gate-Source Voltage [V]

GS

2

-V

0

0 5 10 15 20 25 30 35

QG, Tota l Gate Charge [n C]

Figure 5. Capacitance C haracteristics Figure 6. Gate Charge Characteristics

Rev. B, August 2002

Typical Characteristics (Continued)

FQB17P10 / FQI17P10

1.2

1.1

1.0

, (Norm a liz e d )

DSS

※

-BV

0.9

Drain-Source Breakdown Voltage

0.8

-100 -50 0 50 100 150 200

1. V

2. I

Notes :

TJ, Junction Temperature [oC]

Figure 7. Breakdown Voltage Variation

vs. Temperature

Operation in This Area is Limited by R

※

Notes :

1. T

= 25 oC

C

2. T

= 175 oC

J

3. Single Pulse

1

10

DS(on)

100 µs

1 ms

10 ms

DC

2

10

1

10

, Dra i n Curre nt [A]

0

D

10

-I

-1

10

0

10

-VDS, Drain-Source Voltage [V]

= 0 V

GS

= -250 μA

D

2.5

2.0

1.5

, (Normalized)

1.0

DS(ON)

R

0.5

Drain-Source On-Resistance

0.0

-100 -50 0 50 100 150 200

※

Notes :

= -10 V

1. V

GS

2. I

= -8.25 A

D

TJ, Junction Temperature [oC]

Figure 8. On-Resistance Variation

vs. Temperature

20

16

12

8

, Drain Current [A]

D

-I

4

2

10

0

25 50 75 100 125 150 175

TC, Case Temperature [℃]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

0

10

D=0.5

0.2

0.1

-1

10

0.05

0.02

(t), Therm al Response

JC

0.01

θ

Z

-2

10

-5

10

single pulse

-4

10

-3

10

-2

10

※

N o te s :

1. Z

(t) = 1.5 ℃/W M ax.

θ

JC

2. D u ty F a c t o r, D = t

3. TJM - TC = PDM * Z

P

DM

t

1

t

2

-1

10

1/t2

(t)

θ

JC

0

1

10

t1, S q u a re W av e P u ls e D u ra tio n [s ec ]

Figure 11. Transient Thermal Response Cur ve

Rev. B, August 2002

12V

200nF

-3mA

50K

Gate Charge Test Circuit & Waveform

Same Type

Ω

300nF

V

GS

Same Type

as DUT

DUT

V

DS

Resistive Switching Test Circuit & Waveforms

V

GS

-10V

FQB17P10 / FQI17P10

Q

g

Q

gs

Q

gd

Charge

-10V

R

L

DUT

L

V

DD

V

GS

10%

V

DS

V

DS

V

GS

R

G

t

d(on)tr

90%

t

on

t

off

t

d(off)

t

f

Unclamped Inductive Switching Test Circuit & Waveforms

BV

DSS

L

LL

V

DS

I

IDI

D

V

DD

BV

DD

I

AS

DSS

R

G

DUT

t

p

V

DD

1

----

E

=LI

E

=LI

AS

2

AS

t

p

I

(t)

D

DSS

--------------------

-------------------BV

BV

DSS-VDD

Time

V

(t)

V

(t)

DS

Rev. B, August 2002

Peak Diode Recovery dv /d t Test Circuit & Waveforms

+

V

DS

DUT

I

SD

Driver

R

G

V

GS

_

L

LL

Compliment of DUT

(N-Channel)

• dv/dt controlled by R

•ISDcontroll ed by pulse peri od

G

FQB17P10 / FQI17P10

V

DD

V

GS

( Driver )

I

SD

( DUT )

V

DS

( DUT )

Gate Pulse Width

--------------------------

D =

Gate Pulse Period

Body Diode Reverse Current

I

RM

IFM, Body Diode Forward Current

V

SD

Body Diode

Forward Voltage Drop

Body Diode Recoverydv/dt

di/dt

10V

V

DD

Rev. B, August 2002

Package Dimensions

FQB17P10 / FQI17P10

D2-PAK

9.90

±0.20

(0.40)

1.40 ±0.20

1.27

±0.10

0.80 ±0.10

2.54 TYP 2.54 TYP

1.20 ±0.20

9.20 ±0.20

4.90 ±0.20

15.30 ±0.30

2.00 ±0.10

(0.75)

4.50 ±0.20

10.00 ±0.20 (8.00) (4.40)

+0.10

1.30

–0.05

0.10 ±0.15

2.40 ±0.20

0°~3°

+0.10

0.50

–0.05

2.54 ±0.30

10.00 ±0.20

15.30 ±0.30

(1.75)

(2XR0.45)

(7.20)

9.20 ±0.20

4.90 ±0.20

0.80 ±0.10

Dimensions in Millimeters

Rev. B, August 2002

Package Dimensions

(Continued)

FQB17P10 / FQI17P10

I2-PAK

9.90 ±0.20

(0.40)

(1.46)

(0.94)

1.27 ±0.10 1.47 ±0.10

13.08 ±0.20

(45°)

0.80 ±0.10

2.54 TYP2.54 TYP

1.20 ±0.20

9.20 ±0.20

MAX 3.00

10.08 ±0.20 MAX13.40

0.50

4.50 ±0.20

+0.10 –0.05

+0.10

1.30

–0.05

2.40 ±0.20

10.00 ±0.20

Dimensions in Millimeters

Rev. B, August 2002

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ ActiveArray™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™

2

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Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™

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®

OPTOPLANAR™

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SPM™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET

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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In

Design

Preliminary First Production This datasheet contains preliminary data, and

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Obsolete Not In Production This datasheet contains specifications on a product

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Semiconductor reserves the right to make changes at any time without notice in order to improve design.

that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. I1

Datasheet FQB17P10 Datasheet (Fairchild Semiconductor)

Specifications and Main Features

Frequently Asked Questions

User Manual