Datasheet FQA140N10 Datasheet (Fairchild Semiconductor)

FQA140N10

100V N-Channel MOSFET

September 2000

QFET

QFETQFET

TM

General Description

These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control.

G

SD

Absolute Maximum Ratings T

Symbol Parameter FQA140N10 Units

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt P

D

T

, T

J

STG

T

L

Drain-Source Voltage 100 V Drain Current

Drain Current - Pulsed Gate-Source Voltage ± 25 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy

Power Dissipation (TC = 25°C)

Operating and Storage Temperature Range -55 to +175 °C Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

- Continuous (T

- Derate above 25°C 2.5 W/°C

TO-3P

FQA Series

= 25°C unless otherwise noted

C

= 25°C)

C

= 100°C)

C

Features

• 140A, 100V, R

• Low gate charge ( typical 220 nC)

• Low Crss ( typical 470 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

• 175°C maximum junction temperature rating

!

G

(Note 1)

(Note 2) (Note 1) (Note 1) (Note 3)

= 0.01Ω @VGS = 10 V

DS(on)

D

!

"

!

"

" "

"

!

S

140 A

99 A

560 A

1500 mJ

140 A

37.5 mJ

6.5 V/ns

375 W

300 °C

Thermal Characteristics

Symbol Parameter Typ Max Units

R

θJC

R

θCS

R

θJA

Thermal Resistance, Junction-to-Case -- 0.4 °C/W Thermal Resistance, Case-to-Sink 0.24 -- °C/W Thermal Resistance, Junction-to-Ambient -- 40 °C/W

Rev. A, September 2000

FQA140N10

Electrical Characteristics T

= 25°C unless otherwise noted

C

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BV

DSS

/ ∆T I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient

J

Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, ID = 250 µA

V

GS

I

= 250 µA, Referenced to 25°C

D

V

= 80 V, VGS = 0 V

DS

V

= 64 V, TC = 150°C

DS

V

= 25 V, VDS = 0 V

GS

= -25 V, VDS = 0 V

V

GS

100 -- -- V

-- 0.08 -- V/°C

-- -- 1 µA

-- -- 10 µA

-- -- 100 nA

-- -- -100 nA

On Characteristics

V R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage Static Drain-Source

On-Resistance Forward Transconductance

V

= VGS, ID = 250 µA

DS

= 10 V, ID = 70 A

V

GS

= 30 V, ID = 70 A

V

DS

(Note 4)

2.0 -- 4.0 V

-- 0.008 0.01 Ω

-- 80 -- S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance Output Capacitance -- 2000 2600 pF Reverse Transfer Capacitance -- 420 550 pF

= 25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 6100 7900 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q Q Q

g gs gd

Turn-On Delay Time Turn-On Rise Time -- 940 1890 ns Turn-Off Delay Time -- 350 71 0 ns Turn-Off Fall Time -- 360 7 3 0 ns Total Gate Charge Gate-Source Charge -- 39 -- nC Gate-Drain Charge -- 114 -- nC

= 40 V, ID = 140 A,

V

DD

= 25 Ω

R

G

V

= 64 V, ID = 140 A,

DS

V

GS

= 10 V

(Note 4, 5)

-- 75 160 ns

-- 220 285 nC

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 0.115mH, IAS = 140A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ 140A, di/dt ≤ 300A/µs, VDD ≤ BV

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

6. Continuous Drain Current Calculated by Maximum Junction Temperature : Limited by Package

Maximum Continuous Drain-Source Diode Forward Current -- -- 140 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 560 A

= 0 V, IS = 140 A

Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 730 -- nC

Starting TJ = 25°C

DSS,

V

GS

= 0 V, IS = 140 A,

V

GS

/ dt = 100 A/µs

dI

F

(Note 6)

-- -- 1.5 V

-- 140 -- ns

(Note 4)

Rev. A, September 2000

Typical Characteristics

V

GS

Top : 15.0 V

10

, Drain Current [A]

D

I

10

10.0 V

8.0 V

7.0 V

6.0 V

5.5 V

2

5.0 V Bottom : 4.5 V

1

-1

10

0

10

VDS, Drain-Source Voltage [V]

※

Notes :

1. 250μs Pulse Test

℃

2. T

= 25

C

1

10

2

10

℃

175

1

10

℃

25

, Dra in Curre n t [A]

0

D

10

I

-1

10

246810

VGS , Gate-Source Voltage [V]

FQA140N10

℃

-55

※

Note s :

1. V

= 40V

DS

2. 250μs Pulse Tes t

Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s

30

25

],

20

Ω

[m

15

DS(ON)

R

10

Drain-Source On-Resistance

5

0

0 100 200 300 400 500 600 700 800 900

VGS = 10V

VGS = 20V

※

ID , Drai n Curren t [A]

Note : T

2

10

1

℃

= 25

J

10

0

10

, Reverse Drain Current [A]

℃

175

DR

I

-1

10

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

℃

25

VSD , Source-Drain Voltage [V]

※

Notes :

1. V

= 0V

GS

2. 250μs Pulse Tes t

Figure 3. On-Resistance Variati on vs.

Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

20000

18000

16000

14000

12000

10000

8000

6000

Capacitance [pF]

4000

2000

0

10

C

oss

C

iss

C

rss

-1

C

= Cgs + Cgd (Cds = shorted)

iss

= Cds + C

C

oss

gd

C

= C

rss

gd

※

Notes :

= 0 V

1. V

GS

2. f = 1 MHz

0

10

1

10

VDS, Drain-Source Voltage [V]

12

10

8

6

4

, Gate-S o u rce V o ltag e [V ]

2

GS

V

0

0 40 80 120 160 200 240

QG, Tota l Gate C harge [n C]

VDS = 50V

VDS = 80V

※

Figure 5. Capacitance C haracteristics Figure 6. Gate Charge Characteristics

Note : I

= 140 A

D

Typical Characteristics (Continued)

FQA140N10

1.2

1.1

1.0

, (Norm a liz e d )

DSS

BV

0.9

Drain-Source Breakdown Voltage

0.8

-100 -50 0 50 100 150 200

※

1. V

2. I

Notes :

TJ, Junction Temperature [oC]

Figure 7. Breakdown Voltage Variation

vs. Temperature

Ope ra tion in This A r e a

3

10

2

10

1

10

, Drain Current [A]

D

I

0

10

-1

10

0

10

is Limited by R

DS(on)

1 ms

10 ms

DC

※

Notes :

1. T

= 25 oC

C

= 175 oC

2. T

J

3. Single Pulse

1

10

VDS, Drain-Source Voltage [V]

100 µs

= 0 V

GS

= 250 μA

D

10 µs

2.5

2.0

1.5

, (Norma lized)

1.0

DS(ON)

R

0.5

Drain-Source On-Resistance

0.0

-100 -50 0 50 100 150 200

※

Notes :

1. V

= 10 V

GS

2. I

= 70 A

D

TJ, Junction Temperature [oC]

Figure 8. On-Resistance Variation

vs. Temperature

150

120

90

60

, Drain Current [A]

D

I

30

2

10

0

Limited by Package

25 50 75 100 125 150 175

TC, Case Temperature [℃]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

10

(t), Therm al Response

JC

10

θ

Z

vs. Case Temperature

D=0.5

※

-1

0.2

0.1

No te s :

1. Z

(t) = 0.4 ℃/W Ma x .

θ

JC

2. D u ty F a c to r, D = t

3. TJM - TC = PDM * Z

1/t2

(t)

θ

JC

0.05

P

0.02

-2

0.01

-5

10

single pulse

-4

10

-3

10

-2

10

DM

t

1

t

2

-1

10

0

10

1

10

t1, Square W ave Pulse Duration [sec]

Figure 11. Transient Thermal Response Cur ve

Rev. A, September 2000

Gate Charge Test Circuit & Waveform

FQA140N10

Same Type

as DUT

DUT

12V

200nF

3mA

50KΩ

V

GS

300nF

V

GS

Q

g

10V

V

DS

Q

gs

g

Q

gd

Charge

Resistive Switching Test Circuit & Waveforms

R

L

10V

DUT

L

V

DD

V

DS

V

GS

R

G

V

DS

90%

10%

V

GS

t

d(on)tr

t

on

t

d(off)

t

f

t

off

10V

Unclamped Inductive Switching Test Circuit & Waveforms

BV

DSS

L

LL

V

DS

BV

DSS

V

DSS

I

AS

DD

I

IDI

D

R

G

DUT

t

p

V

DD

1

----

E

=LI

E

=LI

AS

2

AS

ID (t)

t

2

p

DSS

--------------------

-------------------BV

BV

DSS-VDD

Time

V

(t)

V

(t)

DS

Peak Diode Recovery dv /d t Test Circuit & Waveforms

+

DUT

I

SD

Driver

R

G

V

GS

+

V

DS

_

L

LL

Same Type

as DUT

• dv/dt controlled by R

•ISDcontroll ed by pulse peri od

G

FQA140N10

V

DD

V

GS

( Driver )

I

SD

( DUT )

V

DS

( DUT )

Gate Pulse Width

--------------------------

D =

Gate Pulse Period

IFM, Body Diode Forward Current

I

RM

Body Diode Reverse Current

Body Diode Recoverydv/dt

V

SD

Body Diode

Forward Voltage Drop

di/dt

10V

V

DD

Rev. A, September 2000

Package Dimensions

FQA140N10

ø3.20 ±0.10

15.60 ±0.20

13.60 ±0.20

9.60 ±0.20

TO-3P

3.80 ±0.20

4.80 ±0.20

+0.15

1.50

–0.05

13.90 ±0.20

2.00 ±0.20

3.00 ±0.20

1.00 ±0.20

5.45TYP

±0.30]

[5.45

5.45TYP

±0.30]

[5.45

12.76 ±0.20

19.90 ±0.20

3.50 ±0.20

23.40 ±0.20

16.50 ±0.30

18.70 ±0.20

1.40 ±0.20

+0.15

0.60

–0.05

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™

2

E

CMOS™ EnSigna™ FACT™ FACT Quiet Series™

®

FAST

FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench

®

QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™

VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In

Design

Preliminary First Production This dat asheet contains preliminary data, and

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Obsolete Not In Production This datasheet contains specifications on a product

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Semiconductor reserves the right to make changes at any time without notice in order to improve design.

that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. F1