Datasheet FODM8061 Datasheet (Fairchild)

Page 1
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
May 2010
FODM8061 High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
High Noise Immunity characterized by common mode
■
transient immunity (CMTi) – 20kV/µs Minimum CMTi
High Speed
■
– 10Mbit/sec Date Rate (NRZ) – 80ns max. Propagation Delay – 25ns max. Pulse Width Distortion – 40ns max. Propagation Delay Skew
■
3.3V LVTTL/LVCMOS Compatibility Specifications guaranteed over 3V to 5.5V supply
■
voltage and -40°C to +110°C temperature range
■
Safety and regulatory approvals – UL1577, 3750 VAC
– IEC60747-5-2 (pending approval)
RMS
for 1 min.
Applications
Microprocessor system interface
■
– SPI, I Industrial fieldbus communications
■
– DeviceNet, CAN, RS485
■
Programmable logic control Isolated data acquisition system
■
■
Voltage level translator Isolating MOSFET/IGBT gate drivers
■
2
C
Description
The FODM8061 is a 3.3V/5V high-speed logic gate output (open collector) optocoupler, which supports isolated communications allowing digital signals to communicate between systems without conducting ground loops or hazardous voltages. It utilizes Fairchild’s proprietary coplanar packaging technology, Optoplanar and optimized IC design to achieve high noise immunity, characterized by high common mode transient immunity specifications.
This optocoupler consists of an AlGaAS LED at the input, optically coupled to a high speed integrated photo­detector logic gate. The output of the detector IC is an open collector schottky-clamped transistor. The coupled parameters are guaranteed over the wide temperature range of -40°C to +110°C. A maximum input signal of 5mA will provide a minimum output sink current of 13mA (fan out of 8).
Related Resources
www.fairchildsemi.com/products/opto/
■
■
www.fairchildsemi.com/pf/FO/FODM611.html www.fairchildsemi.com/pf/FO/FODM8071.html
■
®
,
Functional Schematic
Truth Table
ANODE
CATHODE
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3
1
3 4
6
5
V
CC
V
O
GND
LED Output
Off High On Low
Page 2
°
Pin Definitions
Number Name Function Description
1 ANODE Anode 3CATHODE Cathode 4 GND Output Ground 5V 6V
O
CC
Output Voltage Output Supply Voltage
Safety and Insulation Ratings for Mini-Flat Package (SO5 Pin)
As per IEC60747-5-2 (Pending Certification). This optocoupler is suitable for “safe electrical insulation” only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Symbol Parameter Min. Typ. Max. Unit
Installation Classifications per DIN VDE 0110/1.89 Table 1 For rated main voltage < 150Vrms I-IV For rated main voltage < 300Vrms I-III Climatic Classification 40/110/21 Pollution Degree (DIN VDE 0110/1.89) 2
CTI Comparative Tracking Index 175
V
V
T
V
PR
V
PR
IORM
IOTM
Case
R
IO
Input to Output Test Voltage, Method b, VIORM x 1.875 = V t
= 1 sec, Partial Discharge < 5 pC
m
, 100% Production Test with
PR
Input to Output Test Voltage, Method a, VIORM x 1.5 = V t
= 60 sec, Partial Discharge < 5 pC
m
, Type and Sample Test with
PR
Max Working Insulation Voltage 565 V Highest Allowable Over Voltage 4000 V External Creepage 5.0 mm External Clearance 5.0 mm Insulation thickness 0.5 mm Safety Limit Values, Maximum Values allowed in the event
of a failure, Case Temperature Insulation Resistance at T
, V
= 500V 10
S
IO
1060
848
150
peak
peak
C
9
Ω
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 2
Page 3
1.
≤
Ω
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Absolute Maximum Ratings
(T
=25ºC unless otherwise specified)
A
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol Parameter Value Units
T T
T
V
PD
PD
STG
OPR
T
J
SOL
I
F
V
R
CC
V
O
I
O
I
O
Storage Temperature -40 to +125 ºC Operating Temperature -40 to +110 ºC Junction Temperature -40 to +125 ºC Lead Solder Temperature
260 for 10sec ºC
(Refer to Reflow Temperature Profile) Forward Current 50 mA Reverse Voltage 5.0 V Supply Voltage 0 to 7.0 V Output Voltage -0.5 to V
+0.5 V
CC
Average Output Current 50 mA Input Power Dissipation Output Power Dissipation
(1)(2)
(1)(2)
100 mW
85 mW
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol Parameter Min. Max. Unit
T
A
V
V
CC,
V
FL
I
FH
I
FL
NFan Out (at R
R
L
Isolation Characteristics
Ambient Operating Temperature -40 +110 ºC
DD
Supply Voltages
(3)
3.0 5.5 V Logic Low Input Voltage 0 0.8 V Logic High Input Current
(4)
6.3 15 mA Logic Low Input Current 250 µA
= 1k Ω )5TTL Loads
L
Output Pull-up Resistor 330 4k
(T
=25ºC)
A
Ω
Symbol Parameter Test Conditions Min. Typ. Max. Units
V
R C
Notes:
No derate required to 110 ºC.
2. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
3. 0.1µF bypass capacitor must be connected between pins 4 and 6.
4. Recommended I
5. Device is considered a two terminal device: Pins 1 and 3 are shorted, and Pins 4, 5, and 6 are shorted together.
6. 3,750 VAC
Input-Output Isolation Voltage freq= 60Hz, t = 1.0min,
ISO
Isolation Resistance V
ISO
Isolation Capacitance V
ISO
is 9.3mA for operation above T
FH
for 1 minute duration is equivalent to 4,500 VAC
RMS
I
10µA
I-O
= 500V
I-O
= 0V, freq=1.0MHz
I-O
=100ºC.
A
(5)(6)
(5)
3750 Vac
(5)
for 1 second duration.
RMS
12
10
0.6 pF
RMS
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 3
Page 4
≤
≤
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Electrical Characteristics
(T
= -40ºC to +110ºC, 3.0V ≤ V
A
Typical value is measured at T
(Apply over all recommended conditions)
5.5V), unless otherwise specified.
CC
= 25ºC and V
A
CC
= 3.3V.
Symbol Parameter Test Conditions Min. Typ. Max. Units
INPUT CHARACTERISTICS
V
BV I
FHL
OUTPUT CHARACTERISTICS
V
I
I
CCL
I
CCH
Forward Voltage I
F
Input Reverse Breakdown Voltage I
R
Threshold Input Current V
Logic LOW Output Voltage IF = rated I
OL
Logic HIGH Output Current IF = 250µA, VO = 3.3V, Fig. 4 8.0 50.0 µA
OH
Logic LOW Output Supply Current IF = 10mA, V
Logic HIGH Output Supply Current IF = 0mA, V
= 10mA, Fig. 1 1.05 1.45 1.8 V
F
= 10µA 5.0 V
R
= 0.6V, I
O
T
< 85ºC, Fig. 2 3.4 5.0 mA
A
T
= 85ºC to 110 ºC 4.2 7.5
A
I
(sinking) = 13mA, Fig.3
OL
I
= 250µA, VO = 5.0V, Fig. 4 2.1 30.0 µA
F
I
= 10mA, V
F
I
= 0mA, V
F
(sinking) = 13mA,
OL
,
FHL
= 3.3V, Fig. 5, 7 6.0 8.5 mA
CC
= 5.0V, Fig. 5, 7 7.5 10.0 mA
CC
= 3.3V, Fig. 6, 7 4.0 7.0 mA
CC
= 5.0V, Fig. 6, 7 6.0 9.0 mA
CC
0.4 0.6 V
Switching Characteristics
(T
= -40ºC to +110ºC, 3.0V ≤ V
A
Typical value is measured at T
(Apply over all recommended conditions)
5.5V, I
CC
= 25ºC and V
A
= 7.5mA), unless otherwise specified.
F
= 3.3V
CC
Symbol Parameter Test Conditions Min. Typ. Max. Units
Date Rate RL = 350Ω 10 Mbps
t
PHL
t
PLH
PWD Pulse Width Distortion,
t
PSK
t
R
t
F
|CM
|CM
Notes
7. t
PSK
from the same manufacturing date code that are operated at same case temperature (±5°C), at same operating conditions, with equal loads (R
8. Common mode transient immunity at output high is the maximum tolerable positive dVcm/dt on the leading edge of the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity at output low is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal, Vcm, to assure that the output will remain low.
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 4
Propagation Delay Time to Logic Low Output
Propagation Delay Time to Logic High Output
- t
| t
PHL
PLH
|
RL = 350Ω, CL = 15pF, Fig. 8 and 11
RL = 350Ω, CL = 15pF, Fig. 8 and 11
= 350Ω, CL = 15pF,
R
L
Fig. 9
Propagation Delay Skew RL = 350Ω, CL = 15pF
Output Rise Time, (10% to 90%) RL = 350Ω, CL = 15pF,
Fig. 10 and 11
Output Fall Time, (90% to 10%) RL = 350Ω, CL = 15pF,
Fig. 10 and 11
| Common Mode Transient
H
Immunity at Output High
| Common Mode Transient
L
Immunity at Output Low
IF = 0mA, VO > 0.8 x VCC, V
= 1000V
CM
IF = 7.5mA, VO < 0.8V, V
= 1000V
CM
is equal to the magnitude of the worst case difference in t
= 350 Ω and C
L
= 15pF), and with an input rise time less than 5ns.
L
(8)
, Fig. 12
(8)
, Fig. 12
PHL
(7)
and/or t
43 80 ns
50 80 ns
725ns
40 ns
20 ns
10 ns
20 40 kV/µs
20 40 kV/µs
that will be seen between any two units
PLH
Page 5
Typical Performance Curves
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
100
– INPUT LED CURRENT (mA)
F
0.01
I
0.001
Fig. 1 Input LED Current vs Forward Voltage
10
= 110°C
T
TA = 25°C
A
– FORWARD VOLTAGE (V)
V
F
TA = -40°C
1
0.1
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Fig. 3 Low Level Output Voltage vs. Ambient Temperature
0.60 IOL = 13mA
IF = 5mA
0.55
0.50
VCC = 3.3V
0.45
0.40
– LOW LEVEL OUTPUT VOLTAGE (V)
OL
V
0.35
-40 -20 0 20 40 60 80 100 120 TA – AMBIENT TEMPERATURE (°C)
VCC = 5.0V
Fig. 2 Threshold Input Current vs Ambient Temperature
6
IOL = 13mA
5
4
3
– THRESHOLD INPUT CURRENT (mA)
2
FHT
I
1
-40 -20 0 20 40 60 80 100 120
V
= 5.0V
CC
V
= 3.3V
CC
TA – AMBIENT TEMPERATURE (°C)
Fig. 4 Logic High Output Current vs Ambient Temperature
20
IF = 250µA V
= 3.3V
O
15
10
5
– LOGIC HIGH OUTPUT CURRENT (µA)
OH
I
0
-40 -20 0 20 40 60 80 100 120 TA – AMBIENT TEMPERATURE (°C)
VCC = 3.3V
VCC = 5.0V
Fig. 5 Typical Logic Low Output Supply Current
10
IF = 10mA
9
8
7
6
5
4
3
– TYPICAL LOGIC LOW OUTPUT SUPPLY CURRENT (mA)
2
-40 -20 0 20 40 60 80 100 120
CCL
I
vs. Ambient Temperature
VCC = 5.0V
VCC = 3.3V
TA – AMBIENT TEMPERATURE (°C)
– TYPICAL LOGIC HIGH OUTPUT SUPPLY CURRENT (mA)
I
Fig. 6 Typical Logic High Output Supply Current
10
IF = 0mA
8
6
4
2
0
-40 -20 0 20 40 60 80 100 120
CCH
vs. Ambient Temperature
VCC = 5.0V
VCC = 3.3V
TA – AMBIENT TEMPERATURE (°C)
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 5
Page 6
Typical Performance Curves (Continued)
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Fig. 7 Typical Logic Output Supply Current
10
IF = 0mA (for I
= 25°C
T
A
8
6
4
2
– TYPICAL LOGIC OUTPUT SUPPLY CURRENT (mA)
0
CC
I
3.0 3.5 4.0 4.5 5.0 5.5
vs. Output Supply Voltage
), 10mA (for I
CCH
VCC – OUTPUT SUPPLY VOLTAGE (V)
I
I
CCL
CCL
CCH
)
Fig. 9 Typical Pulse Width Distortion vs. Ambient Temperature
10
Frequency = 5MHz Duty Cycle = 50%
= 7.5mA
I
F
= 350Ω
R
8
L
VCC = 3.3V
6
4
| ) – PULSE WIDTH DISTORTION (ns)
2
PLH
VCC = 5.0V
– t
PHL
0
( | t
-40 -20 0 20 40 60 80 100 120 TA – AMBIENT TEMPERATURE (°C)
Fig. 8 Typical Propagation Delay vs. Ambient Temperature
10
Frequency = 5MHz Duty Cycle = 50%
= 7.5mA
I
F
= 350Ω
R
8
L
6
t
@ VCC = 3.3V
PLH
4
t
t
@ VCC = 3.3V
PHL
– PROPAGATION DELAY (ns)
P
2
t
t
@ VCC = 5.0V
PLH
0
-40 -20 0 20 40 60 80 100 120
@ VCC = 5.0V
PHL
TA – AMBIENT TEMPERATURE (°C)
Fig. 10 Typical Rise and Fall Time vs. Ambient Temperature
40
Frequency = 5MHz Duty Cycle = 50%
= 7.5mA
I
F
= 350Ω
R
L
30
20
– RISE, FALL TIME (ns)
F
, t
10
R
t
0
-40 -20 0 20 40 60 80 100 120
tR @ VCC = 5.0V
tR @ VCC = 3.3V
tF @ VCC = 3.3V
tF @ VCC = 5.0V
TA – AMBIENT TEMPERATURE (°C)
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 6
Page 7
Schematics
Pulse Gen. 5MHz t
= tr = 5ns
f
DC = 50%
Input Monitoring Mode
Input
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
I
F
0.1µF Bypass
R
M
(IF = 7.5mA)
50%
350Ω
V Node
C
L
Monitoring
O
Output
t
t
PHL
f
t
PLH
t
r
90%
1.5V 10%
V
OL
Figure 11. Test Circuit for Propagation Delay Time, Rise Time and Fall Time
I
F
V
350Ω
C
L
CC
Monitoring
V
O
Node
SW
0.1µF Bypass
R
M
V
CM
Pulse Gen
V
V
(IF = 0mA)
O
CM
90%
10%
t
r
t
1kV
0V
f
V
OH
0.8 V
CC
0.8V
V
(IF = 7.5mA)
O
V
OL
Figure 12. Test Circuit for Instantaneous Common Mode Rejection Voltage
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 7
Page 8
Package Dimensions
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Notes:
1. No standard applies to this package.
2. All dimensions are in millimeters.
3. Dimensions are exclusive of burrs, mold flash, and tie bar extrusion.
4. Drawings filesname and revision: MKT-MFP05A.
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 8
.fairchildsemi.com/packaging/
Page 9
Ordering Information
Order Entry Identifier
Option
No Suffix FODM8061 Mini-Flat 5-pin, shipped in tubes (100 units per tube)
R2 FODM8061R2 Mini-Flat 5-pin, tape and reel (2,500 units per reel)
All packages are lead free per JEDEC: J-STD-020B standard.
(Example) Description
Marking Information
1
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
M8061
V
V
43
Definitions
1Fairchild logo 2Device number 3 IEC60747-5-2 (VDE marking) 4 One digit year code, e.g., ‘9’ 5Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code
2
MYYX
5
6
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 9
Page 10
Tape and Reel Dimensions
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
K
t
0
W
1
d
Description
Tape Width Tape Thickness Sprocket Hole Pitch Sprocket Hole Diameter Sprocket Hole Location
Pocket Location
Pocket Pitch Pocket Dimension
Pocket Hole Diameter Cover Tape Width Cover Tape Thickness
Max. Component Rotation or Tilt
Devices Per Reel
Reel Diameter
P
0
Symbol
W t
P
0
D
0
E F
P
2
P
A
0
B
0
K
0
D
1
W
1
d
P
A
0
P
Dimensions (mm)
12.00 +0.30
2
B
0
2.54 Pitch
0.30 ±0.05
4.00 ±0.10
1.50 +0.10
1.75 ±0.10
5.50 ±0.10
2.00 ±0.10
8.00 ±0.10
4.40 ±0.10
7.30 ±0.10
2.30 ±0.10
1.50 Min.
9.20
0.065 ±0.010 10° Max.
2500
330mm (13")
D
-0.10
/
-0.0
/
0
E
W
F
D
1
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 10
Page 11
Reflow Profile
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
Ts ma x
Preheat Area
Ts mi n
t
L
t
s
260 240 220 200 180 160 140 120
T
P
T
L
100
80 60
Temperature (°C)
40 20
0
120
240 360
Time 25°C to Peak
Time (seconds)
Profile Feature Pb-Free Assembly Profile
Temperature Min. (Tsmin) 150°C Temperature Max. (Tsmax) 200°C Time (t Ramp-up Rate (t Liquidous Temperature (T Time (t Peak Body Package Temperature 260°C +0°C / –5°C Time (t Ramp-down Rate (T Time 25°C to Peak Temperature 8 minutes max.
) from (Tsmin to Tsmax) 60–120 seconds
S
to tP) 3°C/second max.
L
) 217°C
L
) Maintained Above (TL) 60–150 seconds
L
) within 5°C of 260°C 30 seconds
P
to TL) 6°C/second max.
P
t
P
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 11
Page 12
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
Product Status Definition
Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
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Rev. I49
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FODM8061 Rev. 1.0.3 12
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