Datasheet FIN1104 Datasheet (Fairchild Semiconductor)

Page 1

FIN1104 LVDS 4 Port High Speed Repeater

FIN1 104 LVDS 4 Port High Speed Repeater

January 2002 Revised January 2003

General Description

This 4 port repeater is designed for high speed interco nnects utilizing Low Voltage Differential Signaling (LVDS) technology. The FIN1104 accepts and outputs LVDS levels with a typical differential output swing of 330 mV which provides low EMI at ultr a low power dissipation even at high frequencies. The FIN1104 provides a V

coupling on the inputs. In add ition the F IN 1104 can directly accept LVPECL, HSTL, and SSTL-2 for translation to LVDS.

reference for AC

Features

■ Greater than 800 Mbps data rate

■ 3.3V power supply operation

■ 3.5 ps maximum random jitter and 135 ps maximum

deterministic jitter

■ Wide rail-to-rail common mode range

■ LVDS receiver inputs accept LVPECL, HSTL, and

SSTL-2 directly

■ Ultra low power consumption

■ 20 ps typical channel-to-chann el skew

■ Power off protection

■

> 7.5 kV HBM ESD Protection

■ Meets or exceeds the TIA/EIA-644-A LVDS standard

■ Available in space saving 24-Lead TSSOP package

■ Open circuit fail safe protection

■ V

reference output

Ordering Code:

Order Number Package Number Package Description

FIN1104MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Devices also availab l e in Tape and Reel. Specify by appending su ffix let te r “X” to the ordering code.

Pin Descriptions Connection Diagram

Pin Name Description

, R

IN1+

IN2+

, R

IN3+

IN4+

, R

IN1−

IN2−

, R

IN3−

IN4−

, D

OUT1+

, D

OUT3+

, D

OUT1−

, D

OUT3−

EN Driver Enable Pin for All Output EN

GND Ground V

Non-inverting LVDS Input

Inverting LVDS Input

Non-inverting Driver Output

OUT2+ OUT4+

Inverting Driver Output

OUT2− OUT4−

Inverting Driver Enable Pin for all Outputs Power Supply

Reference Voltage Output

Page 2

Function Table

Inputs Outputs

FIN1104

EN EN

HLHLHL HLLHLH H L Fail Safe Case H L XHXXZZ LXXXZZ

H = HIGH Logic Level L = LOW Logic Level X = Don’t Care Z = High Impedance

IN+

IN−DOUT+DOUT−

Functional Diagram

www.fairchildsemi.com 2

Page 3

FIN1104

Absolute Maximum Ratings(Note 1) Recommended Operating

Supply Voltage (VCC) −0.5V to +4.6V LVDS DC Input Voltage (V LVDS DC Output Voltage (V Driver Short Circuit Current (I Storage Temperature Range (T Max Junction Temperature (T Lead Temperature (T

) −0.5V to +4.6V

OUT

) Continuous 10 mA

OSD

) −65°C to +150°C

STG

)150°C

)

(Soldering, 10 seconds) 260 ESD (Human Body Model) 7500V ESD (Machine Model) 400V

Conditions

Supply Voltage (V Magnitude of Differential

Voltage (|V

Common Mode Voltage

Range (V

Operating Temperature (T

°C

Note 1: The “Absolute Maximum Ratings”: are those valu es b eyo nd which damage to the device may occur. The databook specifications should be met, without exception , to ensu re that the syst em design is reliab le over its power supply, temperature and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specification.

) 3.0V to 3.6V

|) 100 mV to V

)(0V + |VID|/2) to (VCC − |VID|/2)

) −40°C to +85°C

DC Electrical Characteristics

Symbol Parameter Test Conditions

Differential Input Threshold HIGH See Figure 1; VIC = +0.05V, +1.2V, or VCC − 0.05V 100 mV

Differential Input Threshold LOW See Figure 1; VIC = +0.05V, +1.2V, or VCC − 0.05V −100 mV

Input HIGH Voltage (EN or EN)2.0V

Input LOW Voltage (EN or EN)GND0.8V

Output Differential Voltage 250 330 450 mV

∆V

ODVOD

∆V

OFF

CCZ

OUT

Note 2: All typical values are at TA = 25°C and with VCC = 3.3V.

Magnitude Change from Differential LOW-to-HIGH R Offset Voltage See Figure 2 1.125 1.23 1.375 V Offset Magnitude Change from Differential LOW-to-HIGH Short Circuit Output Current D

Input Current (EN, EN, D

Power Off Input or Output Current VCC = 0V, VIN or V Disabled Power Supply Current Drivers Disabled 5.4 11 mA Power Supply Current Drivers Enabled, Any Valid Input Condition 30.4 41 mA Disabled Output Leakage Current Driver Disabled, D

Common Mode Voltage Range |VID| = 100 mV to V Input Capacitance Enable Input 2.6

Output Capacitance 2.8 pF Output Reference Voltage VCC = 3.3V, IBB = 0 to −275 µA 1.125 1.2 1.375 V

INx+

, D

= 100 Ω, Driver Enabled,

= 0V and D

OUT+

Driver Enabled VOD = 0V, Driver Enabled ±3.4 ±6mA

= 0V to VCC, Other Input = VCC or 0V

INx−)VIN

(for Differential Inputs)

= 0V to3.6V

OUT−

= 0V,

OUT−

= 0V to 3.6V ±20 µA

OUT

= 0V to 3.6V or

OUT+

LVDS Input 2.1

Min Typ Max

(Note 2)

−3.4 −6mA

±20 µA

0V + |VID|/2 VCC − (|VID|/2) V

Units

25 mV

3 www.fairchildsemi.com

Page 4

AC Electrical Characteristics

Over supply voltage and operating temperature ranges, unless otherwise specified

FIN1104

Symbol Parameter Test Conditions

PLHD

Differential Output Propagation Delay LOW-to-HIGH

PHLD

TLHD

THLD

SK(P)

SK(LH)

SK(HL)

SK(PP)

MAX

PZHD

Differential Output Propagation Delay HIGH-to-LOW R

= 100 Ω, CL = 5 pF,

Differential Output Rise Time (20% to 80%) VID = 200 mV to 450 mV, 0.29 0.4 0.58 ns Differential Output Fall Time (80% to 20%) VIC = |VID|/2 to VCC − (|VID|/2), 0.29 0.4 0.58 ns Pulse Skew |t

- t

| Duty Cycle = 50%, 0.02 0.2 ns

PLH

PHL

, Channel-to-Channel Skew See Figure 1 and Figure 3 0.02

(Note 4) 0.02 Part-to-Part Skew (Note 5) 0.5 ns Maximum Frequency (Note 6)(Note 7) 400 800 MHz Differential Output Enable Time from Z to HIGH

PZLD

Differential Output Enable Time from Z to LOW RL = 100 Ω, CL = 5 pF,

PHZD

Differential Output Disable Time See Figure 2 and Figure 3 from HIGH to Z

PLZD

Differential Output Disable Time from LOW to Z

LVDS Data Jitter, VID = 300 mV, PRBS = 223 - 1, Deterministic VIC = 1.2V at 800 Mbps

LVDS Clock Jitter, VID = 300 mV, Random (RMS) V

Note 3: All typical values are at TA = 25°C and with VCC = 3.3V . Note 4: t

tion. Note 5: t (either Low-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.

Note 6: Passing criteria for maximum frequency is the output V Note 7: Output loading is transm ission line environm ent only; C

, t

SK(LH)

SK(PP)

is the skew between speci fie d outputs of a s ingle device w hen the outputs have identical loads and are switching in t he same direc-

SK(HL)

is the magnitude of t he difference in propagation delay tim es between any spec ified terminals of t w o devices switching in the sam e di re c ti on

= 1.2V at 400 MHz

> 200 mV and the duty cycle is 45% to 55% with all channels switching.

is < 1 pF of stray test fixture capacitance.

Min Typ Max

(Note 3)

0.75 1.1 1.75 ns

2.2 5 ns

2.5 5 ns

1.8 5 ns

2.1 5 ns

85 135 ps

2.1 3.5 ps

Units

0.15 ns

FIGURE 1. Di ffere ntial R eceive r Voltage Definition s and

Propagation and Transition Time Test Circuit

FIGURE 2. Differential Driver DC Test Circuit

www.fairchildsemi.com 4

Note A: All LVDS input pulses hav e fr equency = 10 MHz, tR

< = 0.5 ns

or t

includes all probe and test fixture capacitances

Note B: C

FIGURE 3. Differential Driver Propagation Delay

and Transition Time Test Circuit

Page 5

FIGURE 4. AC Waveform

FIN1104

Note A: All LVTTL input pulses have frequency = 10MHz, tR or tF < = 2 ns

includes all probe a nd jig capacitances

Note B: C

FIGURE 5. Differential Driver Enable and Disable Circuit

FIGURE 6. Enable and Disable AC Waveforms

5 www.fairchildsemi.com

Page 6

FIN1104 LVDS 4 Port High Speed Repeater

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Fairchild does not assume any responsibility for use of any circuitr y described, no circuit patent licenses are implied a nd Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems a re devices or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant inju ry to the user.

www.fairchildsemi.com 6

Package Number MTC24

2. A critical component in any com ponen t of a life su pport device or system whose failu re to perform can be reasonably expected to cause the failure of the li fe su pp ort device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com