Datasheet fds9933 Datasheet

Page 1
FDS9933
FDS9933
Dual P-Channel 2.5V Specified PowerTrench MOSFET
September 2006
General Description
This P-Channel MOSFET is a rugged gate version of Fairchild Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate drive voltage (2.5V – 12V).
Applications
• Load switch
• Motor drive
• DC/DC conversion
• Power management
D1
D
D1
D
D2
D
D2
D
SO-8
Pin 1
SO-8
S2
Absolute Maximum Ratings T
G1
G
S1
S
G2
S
S
o
=25
A
C unless otherwise noted
Features
• –5 A, –20 V, R R
• Extended V
• Low gate charge
• High performance trench technology for extremely
low R
• High power and current handling capability
DS(ON)
GSS
5 6 7 8
= 55 mΩ @ VGS = –4.5 V
DS(ON)
= 90 mΩ @ VGS = –2.5 V
DS(ON)
range (±12V) for battery applications
4
Q1
Q2
3 2 1
Symbol Parameter Ratings Units
V
Drain-Source Voltage
DSS
V
Gate-Source Voltage
GSS
ID Drain Current – Continuous (Note 1a) – Pulsed PD
TJ, T
STG
Power Dissipation for Dual Operation 2 Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) (Note 1c)
Operating and Storage Junction Temperature Range –55 to +175
–20 ±12
–5
–30
W
1
0.9 °C
V V A
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 Thermal Resistance, Junction-to-Case (Note 1) 40
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
2006 Fairchild Semiconductor International
9933 FDS9933 13’’ 12mm 2500 units
°C/W °C/W
FDS9933 Rev C
Page 2
FDS9933
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
∆BVDSS ∆T
I
Zero Gate Voltage Drain Current
DSS
I
Gate–Body Leakage
GSS
Breakdown Voltage Temperature Coefficient
J
V
= 0 V, ID = –250 µA
GS
I
= –250 µA, Referenced to 25°C
D
= –16 V, VGS = 0 V –1
V
DS
= ±12 V, VDS = 0 V ±100 nA
V
GS
–20 V
–12
mV/°C
µA
On Characteristics (Note 2)
–0.
V
Gate Threshold Voltage
GS(th)
∆VGS(th) ∆TJ
R
DS(on)
Gate Threshold Voltage Temperature Coefficient
Static Drain–Source
On–Resistance
I
On–State Drain Current
D(on)
V
= VGS, ID = –250 µA
DS
I
= –250 µA, Referenced to 25°C
D
V
= –4.5 V, ID = –3.2 A
GS
= –2.5 V, ID = –1.0 A
V
GS
= –4.5 V, VDS = –5 V –16 A
V
GS
6 –0.8 –1.2 V
3
44
72
55 90
mV/°C
mΩ
gFS Forward Transconductance VDS = –9 V, ID = –3.4 A 8 S
Dynamic Characteristics
= –10 V, V
V
C
Input Capacitance 825 pF
iss
C
Output Capacitance 420 pF
oss
C
Reverse Transfer Capacitance
rss
DS
f = 1.0 MHz
= 0 V,
GS
150 pF
Switching Characteristics (Note 2)
= –10 V, ID = –1 A,
V
t
Turn–On Delay Time 16 40 ns
d(on)
tr Turn–On Rise Time 46 80 ns t
Turn–Off Delay Time 40 70 ns
d(off)
tf Turn–Off Fall Time Qg Total Gate Charge 10 20 nC Qgs Gate–Source Charge 2.1 nC Qgd Gate–Drain Charge
DD
= –4.5 V, R
V
GS
= –6 V, ID = –3.2A,
V
DS
V
= –4.5 V
GS
GEN
= 6 Ω
25 40 ns
3.3 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward
VGS = 0 V, IS = –2.0 A (Note 2) –0.7 –1.2 V
Voltage
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
is guaranteed by design while R
θJC
a) 78°C/W when
mounted on a
0.5in2 pad of 2 oz copper
is determined by the user's board design.
θCA
b) 125°C/W when
mounted on a
0.02 in2 pad of 2 oz copper
–2.0
c) 135°C/W when
mounted on a minimum pad.
A
FDS9933 Rev C
Page 3
Typical Characteristics:
FDS9933
30
VGS = -4.5V
-4.0V
20
10
, DRAIN CURRENT (A)
D
-I
0
0 1 2 3 4 5
, DRAIN TO SOURCE VOLTAGE (V)
-V
DS
-3.5V
-3.0V
-2.5V
-2.0V
1.8
VGS=-2.5V
1.6
1.4
, NORMALIZED
1.2
DS(ON)
R
1
DRAIN-SOURCE ON-RESISTANCE
0.8 0 6 12 18 24 30
-3.0V
, DRAIN CURRENT (A)
-I
D
-3.5V
-4.0V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.4
ID = -5A
1.3
= -4.5V
V
GS
1.2
1.1
, NORMALIZED
1
DS(ON)
R
0.9
DRAIN-SOURCE ON-RESISTANCE
0.8
-50 -25 0 25 50 75 100 125 150
, JUNCTION TEMPERATURE (oC)
T
J
0.14
0.12
0.1
0.08
0.06
, ON-RESISTANCE (OHM)
DS(ON)
R
0.04
0.02
TA = 25oC
0 2 4 6 8 10
-V
TA = 125oC
, GATE TO SOURCE VOLTAGE (V)
GS
-4.5V
ID = -2.5A
Figure 3. On-Resistance Variation with
Temperature.
30
VDS = -5V
25
20
15
10
, DRAIN CURRENT (A)
D
-I
5
0
0 1 2 3 4 5
-V
TA = -55oC
, GATE TO SOURCE VOLTAGE (V)
GS
125oC
25oC
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS =0V
10
1
TA = 125oC
0.1
0.01
, REVERSE DRAIN CURRENT (A)
0.001
S
-I
0.0001 0 0.4 0.8 1.2 1.6
25oC
-55oC
-V
BODY DIODE FORWARD VOLTAGE (V)
SD,
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS9933 Rev C
Page 4
Typical Characteristics:
1ms
P(pk)
SINGLE PULSE
0.01
0.02
0.05
0.1
FDS9933
5
ID = -5A
4
3
VDS = -4V
-8V
-6V
1600
1200
C
iss
800
2
, GATE-SOURCE VOLTAGE (V)
1
GS
-V
0
0 2 4 6 8 10
Q
, GATE CHARGE (nC)
g
CAPACITANCE (pF)
400
C
rss
0
0 4 8 12 16 20
C
oss
-V
, DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
100
R
LIMIT
DS(ON)
10
100ms
1s
1
, DRAIN CURRENT (A)
D
-I
0.01
VGS = -4.5V
SINGLE PULSE
0.1 = 135oC/W
R
θJA
T
= 25oC
A
0.1 1 10 100
-V
DS
10s
DC
, DRAIN-SOURCE VOLTAGE (V)
100µs
10ms
50
SINGLE PULSE
40
R
30
20
10
P(pk), PEAK TRANSIENT POWER (W)
0
0.001 0.01 0.1 1 10 100 1000
t
, TIME (sec)
1
= 135°C/W
θ
JA
= 25°C
T
A
f = 1 MHz
= 0 V
V
GS
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
0.2
R
(t) = r(t) * R
θJA
R
θJA
= 135oC/W
0.1
t
1
t
0.01
r(t), NORMALIZED EFFECTIVE
0.001
TRANSIENT THERMAL RESISTANCE
0.0001 0.001 0.01 0.1 1 10 100 1000
t
, TIME (sec)
1
2
- TA = P * R
T
J
Duty Cycle, D = t
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
θJA
(t)
θJA
/ t
1
2
FDS9933 Rev C
Page 5
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
®
UniFET™ UltraFET VCX™ Wire™
®
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or syste ms are devices or syst ems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) wh ose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In Design This datasheet contains the design specifications for
Preliminary First Production This datasheet contains preliminary data, and
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Obsolete Not In Production This datasheet contains specifications on a product
product development. Specifications may change in any manner without notice.
supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
Semiconductor reserves the right to make changes at any time without notice to improve design.
that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I20
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