Datasheet FDS8958B Datasheet (Fairchild)

Page 1
FDS8958B
Dual N & P-Channel PowerTrench® MOSFET
Q1-N-Channel: 30 V, 6.4 A, 26 mΩ Q2-P-Channel: -30 V, -4.5 A, 51 mΩ
FDS8958B Dual N & P-Channel PowerTrench
December 2008
Features
Q1: N-Channel
Max rMax r
Q2: P-Channel
Max rMax rHBM ESD protection level > 3.5 kV (Note 3)
RoHS Compliant
= 26 mΩ at VGS = 10 V, ID = 6.4 A
DS(on)
= 39 mΩ at VGS = 4.5 V, ID = 5.2 A
DS(on)
= 51 mΩ at VGS = -10 V, ID = -4.5 A
DS(on)
= 80 mΩ at VGS = -4.5 V, ID = -3.3 A
DS(on)
D2
D2
D1
D1
Pin 1
S1
G1
S2
G2
General Description
These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild Semiconductor's advanced PowerTrench tailored to minimize on-state resistance and yet maintain superior switching performance.
These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
®
process that has been especially
Application
DC-DC ConversionBLU and motor drive inverter
D2
D2
D1
D1
5
Q2
6
Q1Q2Q1Q2Q1
7
8
G2
4
S2
3
G1
2
S1
1
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Q1 Q2 Units
V
DS
V
GS
I
D
P
D
E
AS
, T
T
J
STG
Drain to Source Voltage 30 -30 V Gate to Source Voltage ±20 ±25 V Drain Current - Continuous TA = 25 °C 6.4 -4.5
- Pulsed 30 -30 Power Dissipation for Dual Operation 2.0
T Single Pulse Avalanche Energy (Note 4) 18 5 mJ Operating and Storage Junction Temperature Range -55 to +150 °C
= 25 °C unless otherwise noted
C
A A
= 25 °C (Note 1a) 1.6 = 25 °C (Note 1b) 0.9
A
WPower Dissipation for Single Operation T
Thermal Characteristics
R
θJC
R
θJA
Thermal Resistance, Junction to Case (Note 1) 40 Thermal Resistance, Junction to Ambient (Note 1a) 78
°C/W
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDS8958B FDS8958B SO-8 13 ” 12 mm 2500 units
©2008 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDS8958B Rev.B
Page 2
FDS8958B Dual N & P-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Type Min Typ Max Units
Off Characteristics
BV
∆BV ∆T
I
DSS
I
GSS
DSS
DSS J
Drain to Source Breakdown Voltage Breakdown Voltage Temperature
Coefficient Zero Gate Voltage Drain Current
Gate to Source Leakage Current
= 250 µA, VGS = 0 V
D
I
= -250 µA, VGS = 0 V
D
ID = 250 µA, referenced to 25 °C I
= -250 µA, referenced to 25 °C
D
V
= 24 V, V
DS
V
= -24 V, V
DS
V
= ±20 V, V
GS
V
= ±25 V, V
GS
GS
GS
DS DS
= 0 V = 0 V
= 0 V = 0 V
Q1Q230
-30
Q1 Q2
Q1 Q2
Q1 Q2
V
24
-21
-1
±100
±10nAµA
mV/°C
1
I
On Characteristics
V
V
GS(th)
∆V ∆T
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
= VDS, ID = 250 µA
GS
V
= VDS, ID = -250 µA
GS
ID = 250 µA, referenced to 25 °C I
= -250 µA, referenced to 25 °C
D
= 10 V, ID = 6.4 A
V
GS
V
= 4.5 V, ID = 5.2 A
GS
V
= 10 V, ID = 6.4A, TJ = 125 °C
GS
V
= -10 V, ID = -4.5 A
GS
V
= -4.5 V, ID = -3.3 A
GS
V
= -10 V , ID = -4.5 A, TJ = 125 °C
GS
V
= 5 V, ID = 6.4 A
DD
V
= -5 V, ID = -4.5 A
DD
Q1Q21.0
-1.0
Q1 Q2
Q1
Q2
Q1 Q2
2.0
-1.9
-6 5
21 29 31
38 60 53
20 10
3.0
-3.0 mV/°C
26 39 39
51 80 72
µA
V
mΩ
S
®
MOSFET
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Q1
= 15 V, VGS = 0 V, f = 1 MHZ
V
DS
Q2
= -15 V, VGS = 0 V, f = 1 MHZ
V
DS
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
405 570
115
10080150
75
55
2.4
4.4
540 760
100 155
pF
pF
pF
Ω
Q1 V
= 15 V, ID = 6.4 A,
DD
V
= 10 V, R
GS
GEN
Q2
= -15 V, ID = -4.5 A,
V
DD
V
= -10 V, R
GS
V
= 10 V
GS
V
= -10 V
GS
V
= 4.5 V
GS
V
= -4.5 V
GS
= 6 Ω
= 6 Ω
GEN
Q1 VDD = 15 V, I
= 6.4 A
D
Q2
= -15 V,
V
DD
I
= -4.5 A
D
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
Q1 Q2
4.3
6.01012
2.0
6.01012 12
17
22 30
2.0
7.01014
8.31412 19
4.1
5.8
7.0
9.6
1.3
1.9
1.7
3.6
ns
ns
ns
ns
nC
nC
nC
nC
©2008 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDS8958B Rev.B
Page 3
FDS8958B Dual N & P-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Type Min Typ Max Units
Drain-Source Diode Characteristics
0.8
-0.8
17 20
6 8
1.2
-1.2 30
36 12
16
is determined by
θCA
V
= 0 V, IS = 1.3 A (Note 2)
V
SD
t
rr
Q
rr
NOTES:
1. R
is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJA
the user's board design.
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
4. UIL condition: Starting TJ = 25 °C, L = 1 mH, I Starting TJ = 25 °C, L = 1 mH, I
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
a) 78 °C/W when mounted on a 1 in2 pad of 2 oz copper
= 6 A, VDD = 27 V, VGS = 10 V . (Q1)
AS
= -4 A, VDD = -27 V, VGS = -10 V. (Q2)
AS
GS
V
= 0 V, IS = -1.3 A (Note 2)Q1Q2
GS
Q1 I
= 6.4 A, di/dt = 100 A/µs
F
Q2 I
= -4.5 A, di/dt = 100 A/µs
F
Q1 Q2
Q1 Q2
is guaranteed by design while R
θJC
b) 135 °C/W when mounted on a minimun pad
V
ns
nC
®
MOSFET
©2008 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDS8958B Rev.B
Page 4
FDS8958B Dual N & P-Channel PowerTrench
Typical Characteristics (Q1 N-Channel) T
30
24
18
12
DRAIN CURRENT (A)
,
D
6
I
0
0 0.5 1.0 1.5 2.0 2.5 3.0
Figure 1.
1.8
ID = 6.4 A V
1.6
GS
PULSE DURA TION = 80 µs DUTY CYCLE = 0.5% MAX
V
,
DRAIN TO SOURCE VOLTAGE (V)
DS
On Region Characteristics Figure 2.
= 10 V
1.4
1.2
1.0
NORMALIZED
0.8
0.6
DRAIN TO SOURCE ON-RESISTANCE
0.4
-75 -50 -25 0 25 50 75 100 125 150
T
, JUNCTION TEMPERATURE (
J
VGS = 10 V VGS = 6 V VGS = 4.5 V
VGS = 4 V
VGS = 3.5 V
o
C)
= 25 °C unless otherwise noted
J
3.0
V
= 3.5 V
GS
2.5
2.0
1.5
NORMALIZED
1.0
PULSE DURATION = 80 µs
DRAIN TO SOURCE ON-RESISTANCE
DUTY CYCLE = 0.5% MAX
0.5 0 6 12 18 24 30
I
, DRAIN CURRENT (A)
D
Norma l i z e d O n - Resistance
vs Drain Current and Gate Voltage
75
(mΩ)
60
45
DRAIN TO
,
DS(on)
r
30
SOURCE ON-RESISTANCE
15
TJ = 25 oC
246810
V
, GATE TO SOURCE VOL TA G E (V)
GS
VGS = 4 V
V
= 4.5 V
GS
VGS = 6 V
PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX
ID = 3.2 A
TJ = 125 oC
V
= 10 V
GS
®
MOSFET
Fi g ure 3 . Norm a lize d On Re sista n ce
vs Junction Temperature
30
PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX
25
V
= 5 V
DS
20
Figure 4.
30
V
10
On-Resistanc e vs Gate to
Source Voltage
= 0 V
GS
TJ = 125 oC
1
15
10
, DRAIN CURRENT (A)
D
I
5
0
123456
TJ = 125 oC
TJ = 25 oC
TJ = -55 oC
VGS, GATE TO SO UR C E VO LTAGE (V)
Figure 5. Transfer Characteristics
TJ = 25 oC
0.1
, REVERSE DRAIN CURRENT (A)
S
I
0.01
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6.
Source to Dr ai n Diode
TJ = -55 oC
Forward Voltage vs Source Current
©2008 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDS8958B Rev.B
Page 5
FDS8958B Dual N & P-Channel PowerTrench
Typical Characteristics (Q1 N-Channel) T
10
ID = 6.4 A
8
V
= 10 V
6
4
2
, GATE TO SOURCE VOLTAGE (V)
GS
V
0
0246810
Figure 7.
9 8 7
6 5
4 3
2
, AVALANCHE CURRENT (A)
AS
I
1
1
0.001 0.01 0.1 1 10 100
DD
VDD = 15 V
VDD = 20 V
Qg, GATE CHARGE (nC)
Gate Charge Characteristics
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALANCHE (ms)
= 25 °C unless otherwise noted
J
1000
100
CAPACITANCE (pF)
f = 1 MHz
= 0 V
V
GS
10
0.1 1 10 30
VDS, DRAIN TO SOURCE VOL TA G E (V)
Figure 8.
Capacitance vs Drain
to Source Voltage
100
THIS AREA IS LIMITED BY r
10
1
, DRAIN CURRENT (A)
0.1
D
I
0.01
0.01 0.1 1 10 100
DS(on)
SINGLE PULSE
= MAX RA TED
T
J
R
θJA
= 25
T
A
VDS, DRAIN to SOURCE VOLTAGE (V)
= 135
o
C
iss
C
oss
C
rss
®
MOSFET
0.1 ms
1 ms 10 ms 100 ms
o
C/W
C
1 s 10 s
DC
Figure 9.
Unc l a m p e d I ndu c t i v e
Switching Capability
Figure 10.
Operating Area
Forward Bias S af e
500
100
10
, PEAK TRANSIENT POWER (W)
1
(PK)
P
0.5
-4
10
-3
10
VGS = 10 V
SINGLE PULSE R
T
-2
10
-1
10
t, PULSE WIDTH (sec)
110
Figure 11. Single Pulse Maximum Power Dissipation
= 135 oC/W
θ
JA
= 25 oC
A
100 1000
©2008 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDS8958B Rev.B
Page 6
FDS8958B Dual N & P-Channel PowerTrench
Typical Characteristics (Q1 N-Channel) T
2 1
DUTY CYCLE-DESCENDING ORDER
JA
θ
Z
0.1
IMPEDANCE,
0.01
NORMALIZED THERMAL
0.001
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE R
= 135 oC/W
θ
JA
-4
10
-3
10
Figure 12.
-2
10
10
t, RECTANGULAR PULSE DURATION (sec)
Junction-to-Ambient Transient Thermal Response Curve
= 25 °C unless otherwise noted
J
NOTES: DUTY FACTOR: D = t
PEAK TJ = PDM x Z
-1
110
P
DM
t
1
t
2
1/t2
x R
+ T
θJA
θJA
100 1000
A
®
MOSFET
©2008 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com FDS8958B Rev.B
Page 7
FDS8958B Dual N & P-Channel PowerTrench
Typical Characteristics (Q2 P-Channel) T
30
24
18
12
, DRAIN CURRENT (A)
D
-I
6
0
Figure 15. On- Region Charact er is ti cs
1.6
1.4
1.2
1.0
NORMALIZED
0.8
DRAIN TO SOURCE ON-RESISTANCE
0.6
-75 -50 -25 0 25 50 75 100 125 150
VGS = -10 V
PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX
VGS = -6 V
VGS = -4.5 V
VGS = -4 V
VGS = -3.5 V
0.0 0.5 1.0 1.5 2.0 2.5 3.0
-V
, DRAIN TO SOURCE VOLTAGE (V)
DS
ID = -4.5 A V
= -10 V
GS
T
, JUNCTION TEMPERATURE (
J
o
C)
= 25 °C unless otherwise noted
J
4.5
V
= -3.5 V
4.0
GS
3.5
3.0
2.5
2.0
NORMALIZED
1.5
1.0
DRAIN TO SOURCE ON-RESISTANCE
0.5 0 6 12 18 24 30
-I
D
Figure 16. Normalized on-Resistance vs Drain
Current and Gate Voltage
200
160
(mΩ)
120
DRAIN TO
,
80
DS(on)
r
40
SOURCE ON-RESISTANCE
0
246810
-V
, GATE TO S OURCE VOLTAG E (V )
GS
VGS = -4 V
PULSE DURATION = 80 µs DUTY CYCLE = 0.5%MAX
, DRAIN CURRENT (A)
PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX
V
= -4.5 V
GS
TJ = 125 oC
TJ = 25 oC
V
= -6 V
GS
VGS = -10 V
ID = -2.3 A
®
MOSFET
Figure 17. Normalized On-Resistance
vs Junction Temperature
30
PULSE DURA TION = 80 µs DUTY CYCLE = 0.5% MAX
25
V
= -5 V
DS
20
15
TJ = -55 oC
TJ = 25 oC
TJ = 125 oC
10
, DRAIN CURRENT (A)
D
-I
5
0
123456
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 19. Transfer Characteristics
Figure 18. On-Resistance vs Gate to
Source Voltage
30
V
= 0 V
GS
10
TJ = 125 oC
TJ = 25 oC
0.1
, REVERSE DRAIN CURRENT (A)
S
-I
0.01
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
-VSD, BODY DIODE FORWARD VOLTAGE (V)
TJ = -55 oC
Figure 20. Source to Drain Diode
Forward Voltag e vs Source Current
©2008 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com FDS8958B Rev.B
Page 8
FDS8958B Dual N & P-Channel PowerTrench
Typical Characteristics (Q2 P-Channel) T
10
ID = -4.5 A
8
VDD = -10 V
6
4
2
, GATE TO SOURCE VOLTAGE (V)
GS
-V
0
03691215
Qg, GATE CHARGE (nC)
Figure 21. Gate Charge Characteristics
8 7
6 5
4 3
2
, AVALANCHE CURRENT (A)
AS
-I
1
0.01 0.1 1 10
TJ = 125 oC
tAV, TIME IN AVALANCHE (ms)
V
= -20 V
DD
TJ = 25 oC
VDD = -15 V
= 25 °C unless otherwise noted
J
2000
1000
100
CAPACITANCE (pF)
f = 1 MHz
= 0 V
V
GS
30
0.1 1 10 30
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 22. Capacitance vs Drain
to Source Volt age
-2
10
V
= 0V
GS
-3
10
-4
10
-5
10
-6
10
-7
10
-8
GATE LEAKAGE CURRENT(A)
10
,
g
-I
-9
10
0 5 10 15 20 25 30 35
TJ = 125oC
,
-V
GATE TO SOURCE VOLTAGE(V)
GS
TJ = 25oC
C
iss
C
oss
C
rss
®
MOSFET
Figure 23. Unclamped Inductive
Switching Capability
100
THIS AREA IS LIMITED BY r
10
1
, DRAIN CURRENT (A)
0.1
D
-I
0.01
0.01 0.1 1 10 100
DS(on)
SINGLE PULSE T
= MAX RATED
J
o
= 135
= 25
C/W
o
C
R
θJA
T
A
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 25. Forwa rd Bias S afe
Operating Area
0.1 ms
1 ms 10 ms 100 ms
1 s
10 s
DC
200 100
10
PEAK TRANSIENT POWER (W)
,
)
1
PK
(
P
0.5 10-410-310-210
Figure 26. Single Pulse Maximum Power
Figure 24. Ig vs Vgs
VGS = -10 V
SINGLE PULSE R
θ
JA
T
A
-1
t, PULSE WIDTH (sec)
110
Dissipation
= 135 oC/W
= 25 oC
100 1000
©2008 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com FDS8958B Rev.B
Page 9
FDS8958B Dual N & P-Channel PowerTrench
Typical Characteristics (Q2 P-Channel) T
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
JA
θ
Z
0.1
IMPEDANCE,
0.01
NORMALIZED THERMAL
0.002
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
= 135 oC/W
R
θ
JA
-4
10
-3
10
-2
10
10
t, RECTANGU LAR PULSE DURATION (sec)
Figure 27. Junction-to-Ambient Transient Thermal Response Curve
= 25 °C unless otherwise noted
J
NOTES: DUTY FACTOR: D = t
PEAK TJ = PDM x Z
-1
110
P
DM
t
1
t
2
1/t2
x R
+ T
θJA
θJA
A
100 1000
®
MOSFET
©2008 Fairchild Semiconductor Corporation 9 www.fairchildsemi.com FDS8958B Rev.B
Page 10
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FDS8958B Dual N & P-Channel PowerTrench
®
MOSFET
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As used herein:
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Datasheet Identification Product Status Definition
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
Datasheet contains the design specifications for product development. S pecifications may change in any manner without notice.
Datasheet contains preliminary data; supplementa ry dat a will be publ ished at a la ter date. Fairchild Semiconductor reserves the right to make cha nges at a ny time wit hout not ice to improve design.
Datasheet contains final specifications. Fair child Semiconductor reserves the right to make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I37
©2008 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com FDS8958B Rev.B
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