Page 1
November 2001
G
FDS6812A
FDS6812A
Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET
General Description
These N-Channel Logic Level MOSFETs are produced
using Fairchild Semiconductor’s advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
D1
D
D1
D
D2
D
D2
D
S2
G1
S1
S
G2
S
S
=25oC unless otherwise noted
A
SO-8
SO-8
Pin 1
Absolute Maximum Ratings T
Features
• 6.7 A, 20 V. R
• Low gate charge (12 nC typical)
• High performance trench technology for extremely
low R
DS(ON)
• High power and current handling capability
5
6
7
8
= 22 mΩ @ VGS = 4.5 V
DS(ON)
R
= 35 mΩ @ VGS = 2.5 V
DS(ON)
Q1
Q2
4
3
2
1
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 20 V
Gate-Source Voltage
Drain Current – Continuous (Note 1a) 6.7 A
– Pulsed 35
Power Dissipation for Dual Operation 2
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b)
(Note 1c)
Operating and Storage Junction Temperature Range –55 to +150
± 12
1
0.9
V
W
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 40
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS6812A FDS6812A 13’’ 12mm 2500 units
2001 Fairchild Semiconductor Corporation
°C/W
FDS6812A Rev B (W)
Page 2
Electrical Characteristics T
FDS6812A
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BVDSS
∆T
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA 20 V
Breakdown Voltage Temperature
Coefficient
J
ID = 250 µA, Referenced to 25°C
14
Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V
VDS = 16 V, VGS = 0 V, TJ = 55°C
Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100
Gate–Body Leakage, Reverse VGS = –12 V, VDS = 0 V –100
mV/°C
1
10
On Characteristics (Note 2)
V
GS(th)
∆VGS(th)
∆T
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage VDS = VGS, ID = 250 µA 0.6 0.8 1.5 V
Gate Threshold Voltage
Temperature Coefficient
J
Static Drain–Source
On–Resistance
ID = 250 µA, Referenced to 25°C
VGS = 4.5 V, ID = 6.7 A
VGS = 2.5 V, ID = 5.3 A
VGS = 4.5 V,ID = 7.5 A,TJ = 125°C
–3.2
17
22
23
On–State Drain Current VGS = 4.5V, VDS = 5 V 15 A
Forward Transconductance VDS = 5 V, ID = 6.7 A 37 S
mV/°C
22
35
29
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 1082 pF
Output Capacitance 277 pF
Reverse Transfer Capacitance
VDS = 10 V, V
f = 1.0 MHz
GS
= 0 V,
130 pF
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn–On Delay Time 8 16 ns
Turn–On Rise Time 8 16 ns
VDD = 10 V, ID = 1 A,
VGS = 4.5 V, R
GEN
= 6 Ω
Turn–Off Delay Time 24 38 ns
Turn–Off Fall Time
Total Gate Charge 12 19 nC
Gate–Source Charge 2 nC
VDS = 10 V, ID =6.7 A,
VGS = 4.5 V
Gate–Drain Charge
8 16 ns
3 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Maximum Continuous Drain–Source Diode Forward Current 1.3 A
Drain–Source Diode Forward
VGS = 0 V, IS = 1.3 A (Note 2) 0.7 1.2 V
Voltage
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
µA
nA
nA
mΩ
a) 78°C/W when
mounted on a 0.5in
pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
2
b) 125°C/W when
mounted on a 0.02
in2 pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum mounting pad.
FDS6812A Rev B (W)
Page 3
Typical Characteristics
I
D
, DRAIN CURRENT (A)
3.0V
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
4.0V
4.5V
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
, DRAIN CURRENT (A)
25oC
125oC
I
S
, REVERSE DRAIN CURRENT (A)
FDS6812A
30
VGS = 4.5V
25
20
15
10
5
0
3.5V
2.5V
2.0V
0 0.5 1 1.5 2 2.5 3
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
2.5
2
VGS = 2.0V
1.5
R
1
0.5
0 5 10 15 20 25 30
2.5V
3.0V
ID, DRAIN CURRENT (A)
Drain Current and Gate Voltage.
3.5V
1.8
ID = 6.7A
VGS = 4.5V
1.6
1.4
1.2
1
R
0.8
0.6
-50 -25 0 25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. On-Resistance Variation with
Temperature.
30
VDS = 5V
25
20
15
10
5
0
0.5 1 1.5 2 2.5 3
VGS, GATE TO SOURCE VOLTAGE (V)
TA = -55oC
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
1 2 3 4 5
TA = 25oC
VGS, GATE TO SOURCE VOLTAGE (V)
TA =
ID = 3.4 A
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS = 0V
10
1
0.1
0.01
0.001
0.0001
0 0.2 0.4 0.6 0.8 1 1.2
TA = 125oC
25oC
-55oC
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6812A Rev B (W)
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Typical Characteristics
V
, GATE-SOURCE VOLTAGE (V)
CAPACITANCE (pF)
I
D
, DRAIN CURRENT (A)
100
µ
1ms
P(pk), PEAK TRANSIENT POWER (W)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
P(pk)
FDS6812A
5
ID = 6.7A
4
3
2
1
GS
0
0 2 4 6 8 10 12 14
Qg, GATE CHARGE (nC)
VDS = 5V
15V
10V
1800
1500
C
1200
900
600
300
0
0 4 8 12 16 20
ISS
C
OSS
C
RSS
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
100
10
R
LIMIT
DS(ON)
1
VGS = 4.5V
SINGLE PULSE
0.1
R
= 135oC/W
θ
JA
TA = 25oC
0.01
0.01 0.1 1 10 100
VDS, DRAIN-SOURCE VOLTAGE (V)
10ms
100ms
1s
10s
DC
50
40
30
20
10
0
0.01 0.1 1 10 100 1000
t1, TIME (sec)
SINGLE PULSE
R
θJA
TA = 25°C
f = 1MHz
VGS = 0 V
= 135°C/W
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
1
0.1
0.01
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
R
(t) = r(t) * R
θJA
R
θJA
TJ - TA = P * R
= 135oC/W
t
1
t
2
θJA
θJA
Duty Cycle, D = t1 / t
(t)
0.001
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6812A Rev B (W)
2
Page 5
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOS
EnSigna
TM
TM
FACT™
FACT Quiet Series™
STAR*POWER is used under license
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or
In Design
First Production
Full Production
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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