Datasheet FDS6690S Datasheet (Fairchild Semiconductor)

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Page 1

FDS6690S

30V N-Channel PowerTrench SyncFET

May 2000

PRELIMINARY

™

General Description

The FDS6690S is designed to replace a single SO- 8 MOSFET and Schottky diode in synchronous DC:DC power supplies. This 30V MOSFET is designed to maximize power conversion efficiency, providing a low R

and low gate charge. The FDS6690S includes

DS(ON)

Features

• 10 A, 30 V. R

• Includes SyncFET Schottky diode

= 0.016 Ω @ VGS = 10 V

DS(ON)

= 0.024 Ω @ VGS = 4.5 V

DS(ON)

an integrated Schottky diode using Fairchild’s monolithic SyncFET technology. The performance of

• Low gate charge (11 nC typical)

the FDS6690S as the low-side switch in a synchronous rectifier is close to the performance of the FDS6690A in parallel with a Schottky diode.

Applications

• High performance trench technology for extremely low R

DS(ON)

• High power and current handling capability

• DC/DC converter

• Motor drives

SO-8

Absolute Maximum Ratings T

=25oC unless otherwise noted

5 6 7 8

4 3 2 1

Symbol Parameter Ratings Units

DSS

GSS

TJ, T

STG

Drain-Source Voltage 30 V Gate-Source Voltage ±20 V Drain Current – Continuous (Note 1a) 10 A

– Pulsed 50

Power Dissipation for Single Operation (Note 1a) 2.5

(Note 1b)

(Note 1c)

1.2 1

Operating and Storage Junction Temperature Range -55 to +150 °C

Thermal Characteristics

θJA

θJC

Thermal Resistance, Junction-to-Ambient (Note 1a) 50 °C/W Thermal Resistance, Junction-to-Case (Note 1) 25 °C/W

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

FDS6690S FDS6690S 13’’ 12mm 2500 units

2000 Fairchild Semiconductor Corporation

FDS6690S Rev B(W)

Page 2

Electrical Characteristics T

FDS6690S

= 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics

DSS

∆BVDSS ∆T

DSS

GSSF

GSSR

Drain–Source Breakdown Voltage VGS = 0 V, ID = 1 mA 30 V Breakdown Voltage Temperature

Coefficient

ID = 1 mA, Referenced to 25°C

Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 mA Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA Gate–Body Leakage, Reverse VGS = –20 V VDS = 0 V –100 nA

mV/°C

On Characteristics (Note 2)

GS(th)

∆VGS( th) ∆T

DS(on)

D(on)

Gate Threshold Voltage VDS = VGS, ID = 1 mA 1 2.4 3 V Gate Threshold Voltage

Temperature Coefficient

Static Drain–Source On–Resistance

ID = 1 mA, Referenced to 25°C

VGS = 10 V, ID = 10 A VGS = 4.5 V, ID = 8.5 A VGS=10 V, ID =10 A, TJ=125°C

-6 mV/°C

13 20 19

On–State Drain Current VGS = 10 V, VDS = 5 V 50 A Forward Transconductance VDS = 15 V, ID = 10 A 26 S

16 24 26

m Ω

Dynamic Characteristics

iss

oss

rss

Input Capacitance 1233 pF Output Capacitance 344 pF Reverse Transfer Capacitance

VDS = 15 V, V f = 1.0 MHz

= 0 V,

106 pF

Switching Characteristics (Note 2)

t t t t Q Q Q

d(on) r d(off) f

g gs gd

Turn–On Delay Time 8 16 ns Turn–On Rise Time 5 10 ns

VDS = 15 V, ID = 1 A, VGS = 10 V, R

GEN

= 6 Ω

Turn–Off Delay Time 25 40 ns Turn–Off Fall Time Total Gate Charge 11 18 nC Gate–Source Charge 5 nC

VDS = 15 V, ID = 10 A, VGS = 5 V

Gate–Drain Charge

11 20 ns

4 nC

Drain–Source Diode Characteristics and Maximum Ratings

Notes:

1. R

θJA

the drain pins. R

Maximum Continuous Drain–Source Diode Forward Current 3.5 A Drain–Source Diode Forward

Voltage Diode Reverse Recovery Time 17 nS

Diode Reverse Recovery Charge

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

is guaranteed by design while R

θJC

is determined by the user's board design.

θCA

VGS = 0 V, IS = 3.5 A (Note 2) 0.5 0.7 V IF = 10A

diF/dt = 300 A/µs (Note 3)

12.5 nC

a) 50°/W when

mounted on a 1in pad of 2 oz copper

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

3. See “SyncFET Schottky body diode characteristics” below.

b) 105°/W when

mounted on a .04 in pad of 2 oz copper

c) 125°/W when mounted on a

minimum pad.

FDS6680S Rev B (W)

Page 3

Typical Characteristics

4.5V

4.0V

6.0V

5.0V

4.5V

= 10V

TA = 125oC

FDS6690S

VGS = 10V

0 1 2 3

6.0V

5.0V

VDS, DRAIN-SOURCE VOLTAGE (V)

3.5V

2.6

VGS = 4.0V

2.2

1.8

1.4

0.6 0 10 20 30 40 50

ID, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.9 ID = 10A

VGS

1.6

1.3

0.7

0.4

-50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC)

0.06

0.05

0.04

0.03

0.02

0.01

2 4 6 8 10

TA = 25oC

VGS, GATE TO SOURCE VOLTAGE (V)

TA = 125

ID = 5A

Figure 3. On-Resistance Variation with

Temperature.

VDS = 5V

1.5 2.5 3.5 4.5 5.5

VGS, GATE TO SOURCE VOLTAGE (V)

TA = -55

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

VGS = 0V

0.1

0.01

0.001 0 0.2 0.4 0.6 0.8

25oC

-55oC

VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDS6680S Rev B (W)

Page 4

Typical Characteristics

= 0 V

SINGLE PULSE

10ms

SINGLE PULSE

0.01

0.2

FDS6690S

ID =10A VDS = 5V

0 3 6 9 12 15 18 21

Qg, GATE CHARGE (nC)

15V

10V

2000

1600

1200

800

400

0 5 10 15 20 25 30

VDS, DRAIN TO SOURCE VOLTAGE (V)

CISS

COSS

CRSS

f = 1MHz

VGS

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

100

RDS(ON) LIMIT

VGS = 10V

0.1 RθJA = 125oC/W

TA = 25oC

0.01

0.1 1 10 100

VDS , DRAIN-SOURCE VOLTAGE (V)

100ms

10s

0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec)

SINGLE PULSE

RθJA = 125°C/W

TA = 25°C

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

D = 0.5

θJA

(t) = r(t) + R

0.1

0.01

0.1

0.05

0.02

RθJA = 125 °C/W

TJ - TA = P * RθJA(t)

Duty Cycle, D = t1 / t

0.001

0.0001 0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec)

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.

FDS6680S Rev B (W)

θJA

Page 5

Typical Characteristics (continued)

10nS/DIV

FDS6690S

10nS/DIV

SyncFET Schottky Body Diode Characteristics

Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 12 shows the reverse recovery characteristic of the

FDS6690S.

3A/DIV

Figure 12. FDS6690S SyncFET body diode reverse recovery characteristic.

For comparison purposes, Figure 13 shows the reverse recovery characteristics of the body diode of an equivalent size MOSFET produced without SyncFET (FDS6690A).

Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will

increase the power in the device.

0.1

125oC

25oC

0.01

0.001

0.0001

0.00001 0 10 20 30

VDS, REVERSE VOLTAGE (V)

Figure 14. SyncFET body diode reverse

leakage versus drain-source voltage and

temperature.

3A/DIV

Figure 13. Non-SyncFET (FDS6690A) body

diode reverse recovery characteristic.

FDS6680S Rev B (W)

Page 6

SO-8 Tape and Reel Data and Package Dimensions

SOIC(8lds) Packaging Configuration: Figure 1.0

ELECTROSTATIC

SENSITIVE DEVICES

DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS

TNR DATE PT NUMBER PEEL STRENGTH MIN ______________gms

Customized Label

Packaging Option Packaging type

Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg)

Note/Comments

MAX _____________ gms

ESD Label

SOIC (8lds) Packaging Information

Standard

(no flow code)

2,500 95 4,000

13" Dia

343x64x343 530x130x83 343x64x343

5,000 30,000 8,000

0.0774 0.0774 0.0774 0.0774

0.6060 - 0.9696 0.1182

TNR

L86Z F011

Rail/Tube-TNR

13" Dia

Embossed Car rier Tape

Antistatic Cover Tape

Static Dissipative

F63TNR Label

D84Z

TNR

500

7" Dia

184x18 7x47

1,000

NDS

9959

852

SOIC-8 Unit Orientation

343mm x 342mm x 64 mm Stand a r d In t e rm ed iate box

Packaging Description:

SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 uni t s pe r 13" o r 33 0c m d ia met er reel . Th e reel s ar e dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm di ameter reel. This and some o ther options are further described in the Packaging Information table.

These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in di ff ere nt siz es depe nd in g on th e num be r of pa rts shippe d.

NDS

9959

NDS

9959

NDS

852

NDS 9959

852

Pin 1

F63TNR Label sample

LOT: CBVK741B019

FSID: FDS9953A

D/C1: D9842 QTY1: SPEC REV: D/C2: QTY2: CPN:

QTY: 2500

SPEC:

N/F: F (F63TNR)3

SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0

Carrier Tape

Cover Tape

Trailer Tape 640mm minimum or 80 empty pockets

F63TNLab el

ESD Label

Components

ESD Label

F63TNLabel

Leader Tape 1680mm minimum or 210 empty pockets

July 1999, Rev. B

Page 7

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0

User Direction of Feed

Dimensions are in millimeter

Pkg type

(8lds)

SOIC

(12mm)

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

SOIC(8lds) Reel Configuration: Figure 4.0

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

6.50

5.30

12.0

1.55

1.60

1.75

10.25

+/-0.10

+/-0.3

+/-0.05

+/-0.10

rotational and lateral movement requirements (see sketches A, B, and C).

20 deg maximum component rotation

Sketch A (Side or Front Sectional View)

Component Rotation

5.50

min

+/-0.05

20 deg maximum

Sketch B (Top View)

Component Rotation

W1 Measured at Hub

8.0 +/-0.1

Typical component cavity center line

Typical component center line

Dim A

Max

4.0 +/-0.1

0.450

2.1 +/-0.10

0.5mm maximum

Sketch C (Top View)

Component lateral movement

+/-

0.150

9.2 +/-0.3

0.5mm maximum

0.06 +/-0.02

Dim A

max

Tape Size

12mm 7" Dia

12mm 13" Dia

 1998 Fairchild Semiconductor Corporation

Reel

Option

Dim N

Diameter Option

See detail AA

B Min

Dim C

13" Diameter Option

See detail AA

W2 max Measured at Hub

Dim D

min

DETAIL AA

Dimensions are in inches and millimeters

Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

7.00

0.059

177.8

13.00 330

1.5

0.059

1.5

512 +0.020/-0.008 13 +0.5/-0.2

0.795

2.165550.488 +0.078/-0.000

20.2

0.795

7.00

20.2

178

12.4 +2/0

0.488 +0.078/-0.000

12.4 +2/0

0.724

18.4

0.724

18.4

0.469 – 0.606

11.9 – 15.4

0.469 – 0.606

11.9 – 15.4

July 1999, Rev. B

Page 8

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC-8 (FS PKG Code S1)

1 : 1

Scale 1:1 on letter size paper

Dimensions s hown below are in:

inches [m illimeters]

Part Weight per unit (gram): 0.0774

September 1998, Rev. A

Page 9

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™

CMOS

FACT™ FACT Quiet Series™



FAST FASTr™ GTO™

HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench



QFET™ QS™

Quiet Series™ SuperSOT™-3 SuperSOT™-6

SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. E