Datasheet FDS6574A Datasheet (Fairchild)

FDS6574A

May 2008

FDS6574A

20V N-Channel PowerTrench MOSFET

General Description

This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
low gate charge, low R

Applications

• DC/DC converter

D

and fast switching speed.

DS(ON)

D

D

D

SO-8

S

G

S

S

tmM

Features

• 16 A, 20 V. R

• Low gate charge

• High performance trench technology for extremely

low R

DS(ON)

• High power and current handling capability

• RoHS Compliant

5
6
7
8

R

R

DS(ON)

DS(ON)

DS(ON)

= 6 mΩ @ V
= 7 mΩ @ V
= 9 mΩ @ V

= 4.5 V

GS

= 2.5 V

GS

= 1.8 V

GS

4
3
2
1

Absolute Maximum Ratings T

=25oC unless otherwise noted

A

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

P

D

TJ, T

STG

Drain-Source Voltage 20 V

Gate-Source Voltage

± 8

Drain Current – Continuous (Note 1a) 16 A

– Pulsed 80

Power Dissipation for Single Operation (Note 1a) 2.5

(Note 1b)

(Note 1c)

1.2

1.0

Operating and Storage Junction Temperature Range –55 to +175

V

W

°C

Thermal Characteristics

R

θJA

R

θJC

Thermal Resistance, Junction-to-Ambient (Note 1a) 50

Thermal Resistance, Junction-to-Case (Note 1) 25

°C/W
°C/W

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

FDS6574A FDS6574A 13’’ 12mm 2500 units

2008 Fairchild Semiconductor Corporation

FDS6574A Rev B2(W)

Electrical Characteristics T

FDS6574A

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics

BV

DSS

∆BVDSS
∆T

I

DSS

I

GSSF

I

GSSR

Drain–Source Breakdown Voltage

Breakdown Voltage Temperature
Coefficient

J

VGS = 0 V, I

I

= 250 µA, Referenced to 25°C

D

= 250 µA

D

20 V

10

Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1

Gate–Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA

Gate–Body Leakage, Reverse VGS = –8 V VDS = 0 V –100 nA

mV/°C

On Characteristics (Note 2)

V

GS(th)

∆VGS(th)
∆T

R

DS(on)

I

D(on)

g

FS

Gate Threshold Voltage

Gate Threshold Voltage
Temperature Coefficient

J

Static Drain–Source
On–Resistance

VDS = VGS, I

I

= 250 µA, Referenced to 25°C

D

= 250 µA

D

VGS = 4.5 V, ID = 16 A
VGS = 2.5 V, ID = 15 A
VGS = 1.8 V, ID = 13 A
VGS = 4.5 V, ID = 16 A,T

=125°C

J

0.4 0.6 1.5 V

–2.7

4

4.4
5

5.3

On–State Drain Current VGS = 4.5 V, VDS = 5 V 40 A

Forward Transconductance VDS = 5 V, ID = 16 A 115 S

mV/°C

6

mΩ

7
9
9

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance 7657 pF

Output Capacitance 1432 pF

Reverse Transfer Capacitance

VDS = 10V, V
f = 1.0 MHz

GS

= 0 V,

775 pF

Switching Characteristics (Note 2)

t

t

t

t

Q

Q

Q

d(on)

r

d(off)

f

Turn–On Delay Time 19.5 35 ns

Turn–On Rise Time 22 36 ns

Turn–Off Delay Time 173 277 ns

Turn–Off Fall Time

g

gs

gd

Total Gate Charge 75 105 nC

Gate–Source Charge 9 nC

Gate–Drain Charge

VDD = 10 V, ID = 1 A,
VGS = 4.5 V, R

GEN

= 6 Ω

VDS = 10 V, ID = 16 A,
VGS = 4.5 V

82 131 ns

17 nC

Drain–Source Diode Characteristics and Maximum Ratings

I

S

V

SD

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

Maximum Continuous Drain–Source Diode Forward Current 2.1 A
Drain–Source Diode Forward

Voltage

is guaranteed by design while R

θJC

θCA

VGS = 0 V, IS = 2.1 A (Note 2) 0.56 1.2 V

is determined by the user's board design.

µA

a) 50°C/W when

mounted on a 1in
pad of 2 oz copper

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

2

b) 105°C/W when

mounted on a .04 in
pad of 2 oz copper

2

c) 125°C/W when mounted on a

minimum pad.

FDS6574A Rev B2(W)

Typical Characteristics

2.5V

, REVERSE DRAIN CURRENT (A)

FDS6574A

100

VGS = 4.5V

3.5V

80

60

40

, DRAIN CURRENT (A)

D

I

20

0

0 0.5 1 1.5 2

1.8V

1.5V

VDS, DRAIN TO SOURCE VOLTAGE (V)

2

1.8

VGS = 1.5V

1.6

1.4

, NORMALIZED

1.2

DS(ON)

R

1

DRAIN-SOURCE ON-RESISTANCE

0.8
0 20 40 60 80 100

1.8V

2.5V

ID, DIRAIN CURRENT (A)

3.0V

3.5V

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.6

ID = 16A

VGS = 4.5V

1.4

1.2

, NORMALIZED

1

DS(ON)

R

0.8

DRAIN-SOURCE ON-RESISTANCE

0.6

-50 -25 0 25 50 75 100 125 150 175

TJ, JUNCTION TEMPERATURE (oC)

0.012

0.01

0.008

0.006

, ON-RESISTANCE (OHM)

0.004

DS(ON)

R

0.002

TA = 25oC

1 2 3 4 5

TA = 125oC

VGS, GATE TO SOURCE VOLTAGE (V)

4.5V

ID = 8A

Figure 3. On-Resistance Variation with

Temperature.

90

VDS = 5V

75

60

45

30

, DRAIN CURRENT (A)

D

I

15

0

0.5 0.8 1.1 1.4 1.7 2

VGS, GATE TO SOURCE VOLTAGE (V)

TA = -55oC 25oC

125oC

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

100

VGS = 0V

10

1

0.1

0.01

0.001

S

I

0.0001
0 0.2 0.4 0.6 0.8 1

TA = 125oC

25oC

-55oC

VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDS6574A Rev B2(W)

Typical Characteristics

CAPACITANCE (pF)

, DRAIN CURRENT (A)

100µs

1ms

P(pk)

SINGLE PULSE

0.01

0.02

0.05

0.1

0.2

D = 0.5

FDS6574A

5

ID = 16 A

4

3

2

1

, GATE-SOURCE VOLTAGE (V)

GS

V

0

0 15 30 45 60 75 90

Qg, GATE CHARGE (nC)

VDS = 5V

15V

10V

10000

C

8000

6000

4000

2000

C

C

RSS

0

0 5 10 15 20

ISS

OSS

VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

1000

100

R

LIMIT

DS(ON)

10s

100ms

1s

10ms

10

1

VGS = 4.5V

D

I

SINGLE PULSE

R

0.1

0.01

= 125oC/W

θ

JA

TA = 25oC

0.01 0.1 1 10 100

VDS, DRAIN-SOURCE VOLTAGE (V)

DC

50

40

30

20

10

P(pk), PEAK TRANSIENT POWER (W)

0

0.001 0.01 0.1 1 10 100

t1, TIME (sec)

SINGLE PULSE
R

= 125°C/W

θ

JA

TA = 25°C

f = 1 MHz
VGS = 0 V

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

1

R

(t) = r(t)*R

0.1

0.01

r(t), NORMALIZED EFFECTIVE

TRANSIENT THERMAL RESISTANCE

0.001

θ

JA

R

θ

JA

TJ - TA = P * R

Duty Cycle, D = t1 / t

= 125oC/W

t

1

t

2

θ

JA

(t)

θ

JA

0.0001 0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec)

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c.

Transient thermal response will change depending on the circuit board design.

FDS6574A Rev B2(W)

2

TRADEMARKS

®

tm

tm

The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global
subsidianries, and is not intended to be an exhaustive list of all such trademarks.

®

ACEx
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT™
CTL™
Current Transfer Logic™
EcoSPARK

®

EfficentMax™
EZSWITCH™ *

™

®

Fairchild
Fairchild Semiconductor
FACT Quiet Series™

®

FACT

®

FAST
FastvCore™
FlashWriter

®

*

®

* EZSWITCH™ and FlashWriter

FPS™
F-PFS™

®

FRFET
Global Power Resource
Green FPS™
Green FPS™ e-Series™
GTO™
IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MillerDrive™
MotionMax™
Motion-SPM™
OPTOLOGIC
OPTOPLANAR

®

®

are trademarks of System General Corporation, used under license by Fairchild Semiconductor.

®

®

PDP-SPM™
Power-SPM™
PowerTrench

SM

Programmable Active Droop™
QFET

®

®

QS™
Quiet Series™
RapidConfigure™
Saving our world 1mW at a time™
SmartMax™
SMART START™

®

SPM
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SuperMOS™

®

The Power Franchise

TinyBoost™
TinyBuck™
TinyLogic

®

TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
µSerDes™

®

UHC
Ultra FRFET™
UniFET™
VCX™
VisualMax™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

®

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body or (b)
support or sustain life, and (c) whose failure to perform when
properly used in accordance with instructions for use provided

2. A critical component in any component of a life support,
device, or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.

in the labeling, can be reasonably expected to result in a
significant injury of the user.

PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In Design

This datasheet contains the design specifications for product development.
Specifications may change in any manner without notice.

This datasheet contains preliminary data; supplementary data will be pub-

Preliminary First Production

lished at a later date. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve design.

No Identification Needed Full Production

Obsolete Not In Production

This datasheet contains final specifications. Fairchild Semiconductor reserves
the right to make changes at any time without notice to improve the design.

This datasheet contains specifications on a product that is discontinued by
Fairchild Semiconductor. The datasheet is for reference information only.

Rev. I34

FDS6574A Rev B2(W)