Datasheet FDS4953 Datasheet (Fairchild Semiconductor)

February 1999

FDS4953

Dual P-Channel, Logic Level, PowerTrenchTM MOSFET

General Description Features

These P-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance.

These devices are well suited for portable electronics applications: load switching and power management, battery charging circuits, and DC/DC conversion.

SOT-23

SuperSOTTM-8

D2

D1

FDS

4953

G2

S2

G1

1

SO-8

S1

-5 A, -30 V. R R

= 0.053 Ω @ VGS = -10 V,

DS(ON)

= 0.095 Ω @ VGS = -4.5V.

DS(ON)

Low gate charge (8nC typical). High performance trench technology for extremely low

R

.

DS(ON)

High power and current handling capability.

SO-8 SOT-223SuperSOTTM-6

5

6

7

8

SOIC-16

4

3 2

1

Absolute Maximum Ratings T

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

Drain-Source Voltage -30 V Gate-Source Voltage ±20 V Drain Current - Continuous (Note 1a) -5 A

= 25oC unless otherwise noted

A

- Pulsed -20

P

D

Power Dissipation for Dual Operation 2 W Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1 (Note 1c) 0.9

TJ,T

THERMAL CHARACTERISTICS

R

JA

θ

R

JC

θ

Operating and Storage Temperature Range -55 to 150 °C

STG

Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W

FDS4953 Rev.C

Electrical Characteristics (T

= 25 OC unless otherwise noted )

A

Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS

BV

∆BV

I

DSS

Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -30 V Breakdown Voltage Temp. Coefficient ID = -250 µA, Referenced to 25 oC -20 mV/oC

/∆T

J

Zero Gate Voltage Drain Current VDS = -24 V, V

= 0 V -1 µA

GS

TJ = 55°C -10 µA

I

GSSF

I

GSSR

Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA Gate - Body Leakage, Reverse VGS = -20 V, V

= 0 V -100 nA

DS

ON CHARACTERISTICS (Note 2)

V

∆V

R

GS(th)

DS(ON)

Gate Threshold Voltage VDS = VGS, ID = -250 µA -1 -1.7 -3 V Gate Threshold Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC 4 mV/oC

/∆T

J

Static Drain-Source On-Resistance VGS = -10 V, ID = -5 A 0.04 0.053

Ω

TJ =125°C 0.055 0.085

VGS = -4.5 V, ID = -3.3 A 0.058 0.095

I

D(ON)

g

FS

On-State Drain Current VGS = -10 V, VDS = -5 V -20 A Forward Transconductance VDS = -10 V, ID = -5 A 11 S

DYNAMIC CHARACTERISTICS

C

iss

C

oss

C

rss

Input Capacitance VDS = -15 V, VGS = 0 V, Output Capacitance 220 pF

f = 1.0 MHz

750 pF

Reverse Transfer Capacitance 100 pF

SWITCHING CHARACTERISTICS (Note 2)

t t

t t Q Q Q

D(on)

r

D(off)

f

g

gs

gd

Turn - On Delay Time V Turn - On Rise Time

= -15 V, ID = -1 A 12 22 ns

DS

V

GEN

= -10 V, R

GEN

= 6 Ω

14 25 ns

Turn - Off Delay Time 24 38 ns Turn - Off Fall Time 16 27 ns Total Gate Charge VDS = -15 V, ID = -5 A, 8 12 nC Gate-Source Charge V

= -5 V 1.8 nC

GS

Gate-Drain Charge 3 nC

DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

I

S

V

SD

Notes:

1. R

JA

θ

guaranteed by design while R

Maximum Continuous Drain-Source Diode Forward Current -1.3 A Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.3 A

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R

is determined by the user's board design.

CA

θ

(Note 2) -0.75 -1.2 V

JC

θ

is

a. 78OC/W on a 0.5 in

pad of 2oz copper.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

2

b. 125OC/W on a 0.02 in

pad of 2oz copper.

2

c. 135OC/W on a 0.003 in

pad of 2oz copper.

2

FDS4953 Rev.C

Typical Electrical Characteristics

20

V =-10V

GS

-6.0V

15

10

5

D

- I , DRAIN-SOURCE CURRENT (A) 0

0 1 2 3 4 5

-4.5V

-4.0V

-3.5V

-3.0V

- V , DRAIN-SOURCE VOLTAGE (V)

DS

Figure 1. On-Region Characteristics.

1.6

I =5A

D

V =-10V

GS

1.4

1.2

1

DS(ON)

R , NORMALIZED

0.8

DRAIN-SOURCE ON-RESISTANCE

0.6

-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)

J

2.5

V = -3.5V

GS

2

-4.0 V

1.5

DS(ON)

1

R , NORMALIZED

DRAIN-SOURCE ON-RESISTANCE

0.5 0 5 10 15 20

-4.5 V

-5.5 V

-7.0 V

- I , DRAIN CURRENT (A)

D

Figure 2. On-Resistance Variation with

Dain Current and Gate Voltage.

0.2

0.15

0.1

0.05

DS(ON)

R , ON-RESISTANCE (OHM)

0

2 4 6 8 10

- V , GATE TO SOURCE VOLTAGE (V)

GS

I =-2.5A

T = 125°C

-10V

D

J

25°C

Figure 3. On-Resistance Variation with

Temperature.

20

V = -5V

DS

16

12

8

D

- I , DRAIN CURRENT (A)

4

0

1 2 3 4 5 6

-V , GATE TO SOURCE VOLTAGE (V)

T = -55°C

J

25°C

125°C

GS

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

20

V = 0V

10

GS

T = 125°C

1

0.1

0.01

0.001

S

-I , REVERSE DRAIN CURRENT (A)

0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4

J

25°C

-55°C

-V , BODY DIODE FORWARD VOLTAGE (V)

SD

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage

Variation with Source Current and Temperature.

FDS4953 Rev.C

Typical Electrical Characteristics (continued)

10

I = -5A

D

8

6

V = -5V

DS

-15V

4

2

GS

-V , GATE-SOURCE VOLTAGE (V) 0

0 3 6 9 12 15

Q , GATE CHARGE (nC)

g

Figure 7. Gate Charge Characteristics.

50

10

RDS(ON) LIMIT

3

0.5

V = -10V

GS

D

- I , DRAIN CURRENT (A)

0.05

0.01

SINGLE PULSE

JA

R = 135°C/W

θ

T = 25°C

A

0.1 0.3 1 2 5 10 30 50

- V , DRAIN-SOURCE VOLTAGE (V)

DS

DC

1ms

10ms

100ms

1s

10s

-10V

100us

2000

1000

C

300

f = 1 MHz V = 0 V

CAPACITANCE (pF)

GS

100

50

0.1 0.3 1 3 7 15 30

-V , DRAIN TO SOURCE VOLTAGE (V)

DS

C

Figure 8. Capacitance Characteristics.

30

25

20

15

POWER (W)

10

5

0

0.01 0.1 0.5 10 50 100 300 SINGLE PULSE TIME (SEC)

SINGLE PULSE

JA

R =135°C/W

θ

A

T = 25°C

iss

oss

rss

Figure 9. Maximum Safe Operating Area.

Figure 10. Single Pulse Maximum Power

Dissipation.

1

0.5

0.2

0.1

0.05

0.02

0.01

0.005

r(t), NORMALIZED EFFECTIVE

0.002

TRANSIENT THERMAL RESISTANCE

0.001

0.0001 0.001 0.01 0.1 1 10 100 300

D = 0.5

0.2

0.1

0.05

0.02

0.01 Single Pulse

t , TIME (sec)

1

R (t) = r(t) * R

JA

θ

R = 135°C/W

JA

θ

P(pk)

t

1

t

2

T - T = P * R (t)

J

A

Duty Cycle, D = t /t

JA

θ

1

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.

JA

θ

2

FDS4953 Rev.C

SO-8 Tape and Reel Data and Package Dimensions

SOIC(8lds) Packaging Configuration: Figure 1.0

ELECTROSTATIC

SENSITIVE DEVICES

DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS

TNR DATE PT NUMBER PEEL STRENGTH MIN ______________gms

Customized Label

Packaging Option Packaging type

Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg)

Note/Comments

MAX _____________ gms

ESD Label

SOIC (8lds) Packaging Information

Standard

(no flow code)

2,500 95 4,000

13" Dia

343x64x343 530x130x83 343x64x343

5,000 30,000 8,000

0.0774 0.0774 0.0774 0.0774

0.6060 - 0.9696 0.1182

TNR

L86Z F011

Rail/Tube-TNR

13" Dia

Embossed Car rier Tape

Antistatic Cover Tape

Static Dissipative

F63TNR Label

D84Z TNR

500

7" Dia

184x18 7x47

1,000

F

NDS

9959

852

9959

SOIC-8 Unit Orientation

343mm x 342mm x 64mm Stand a r d In t e rm ed iate box

Packaging Description:

SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 uni t s pe r 13" o r 33 0c m d ia met er reel . Th e reel s ar e dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm di ameter reel. This and some o ther options are further described in the Packaging Information table.

These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in di ff ere nt siz es depe nd in g on th e num be r of pa rts shippe d.

F

NDS

9959

F

NDS

9959

F

NDS

852

F

NDS 9959

852

Pin 1

F63TNR Label sample

LOT: CBVK741B019

FSID: FDS9953A

D/C1: D9842 QTY1: SPEC REV: D/C2: QTY2: CPN:

QTY: 2500

SPEC:

N/F: F (F63TNR)3

SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0

Carrier Tape

Cover Tape

Trailer Tape 640mm minimum or 80 empty pockets

F63TNLab el

ESD Label

Components

ESD Label

F63TNLabel

Leader Tape 1680mm minimum or 210 empty pockets

July 1999, Rev. B

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0

T

K0

Wc

B0

P0

D0

E1

F

W

E2

Tc

A0

D1

P1

User Direction of Feed

Dimensions are in millimeter

Pkg type

(8lds)

SOIC

(12mm)

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

SOIC(8lds) Reel Configuration: Figure 4.0

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

6.50

5.30

12.0

1.55

1.60

1.75

10.25

+/-0.10

+/-0.3

+/-0.05

+/-0.10

rotational and lateral movement requirements (see sketches A, B, and C).

B0

20 deg maximum component rotation

Sketch A (Side or Front Sectional View)

Component Rotation

5.50

min

+/-0.05

20 deg maximum

A0

Sketch B (Top View)

Component Rotation

W1 Measured at Hub

8.0 +/-0.1

Typical component cavity center line

Typical component center line

Dim A

Max

4.0 +/-0.1

0.450

2.1 +/-0.10

0.5mm maximum

Sketch C (Top View)

Component lateral movement

+/-

0.150

9.2 +/-0.3

0.5mm maximum

0.06 +/-0.02

Dim A

max

Tape Size

12mm 7" Dia

12mm 13" Dia

 1998 Fairchild Semiconductor Corporation

Reel

Option

Dim N

Diameter Option

7"

See detail AA

B Min

Dim C

13" Diameter Option

See detail AA

W2 max Measured at Hub

Dim D

W3

min

DETAIL AA

Dimensions are in inches and millimeters

Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

7.00

0.059

177.8

13.00 330

1.5

0.059

1.5

512 +0.020/-0.008 13 +0.5/-0.2

0.795

2.165550.488 +0.078/-0.000

20.2

0.795

7.00

20.2

178

12.4 +2/0

0.488 +0.078/-0.000

12.4 +2/0

0.724

18.4

0.724

18.4

0.469 – 0.606

11.9 – 15.4

0.469 – 0.606

11.9 – 15.4

July 1999, Rev. B

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC-8 (FS PKG Code S1)

1 : 1

Scale 1:1 on letter size paper

Dimensions s hown bel ow are in:

inches [millimeters]

Part Weight per unit (gram): 0.0774

9

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ CoolFET™ CROSSVOLT™

2

E

CMOS

TM

FACT™ FACT Quiet Series™

®

FAST FASTr™ GTO™ HiSeC™

ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™

Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8

TinyLogic™ UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.