Datasheet FDS2672 Datasheet (Fairchild)

Page 1
tm
FDS2672 N-Channel UltraFET Trench® MOSFET
200V, 3.9A, 70mΩ
Features
General Description
FDS2672 N-Channel UltraFET Trench
Max r
Max r
Fast switching speed
High performance trench technology for extremely low
r
DS(on)
RoHS compliant
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
= 70mΩ at V
DS(on)
= 80mΩ at V
DS(on)
D
SO-8
Drain to Source Voltage 200 V
Gate to Source Voltage ±20 V
Drain Current -Continuous (Note 1a) 3.9
-Pulsed 50
Single Pulse Avalanche Energy (Note 3) 37.5 mJ
Power Dissipation (Note 1a) 2.5
Power Dissipation (Note 1b) 1.0
Operating and Storage Temperature -55 to 150 °C
GS
GS
D
D
Pin 1
= 10V, ID = 3.9A
= 6V, ID = 3.5A
D
S
S
This single N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced UItraFET Trench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance.
Application
DC-DC conversion
G
S
= 25°C unless otherwise noted
A
5
6
7
8
4
3
2
1
Thermal Characteristics
®
®
MOSFET
A
W
R
θJC
θJA
R
θJA
Thermal Resistance, Junction to Case (Note 1) 25
Thermal Resistance, Junction to Ambient (Note 1a) 50
Thermal Resistance, Junction to Ambient (Note 1b) 125
Package Marking and Ordering Information
Device Marking Device Reel Size Tape Width Quantity
FDS2672 FDS2672 13’’ 12mm 2500 units
©2006 Fairchild Semiconductor Corporation FDS2672 Rev. B
°C/WR
www.fairchildsemi.com1
Page 2
FDS2672 N-Channel UltraFET Trench
Electrical Characteristics T
= 25°C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSS
On Characteristics
V
GS(th)
∆V
GS(th)
∆T
J
r
DS(on)
g
FS
Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V 200 V
Breakdown Voltage Temperature Coefficient
Zero Gate Voltage Drain Current
ID = 250µA, referenced to 25°C 206 mV/°C
V
= 160V, VGS=0V 1 µA
DS
V
= 160V, VGS=0V TJ = 55°C 10 µA
DS
Gate to Source Leakage Current VGS = ±20V ±100 nA
(Note 2)
Gate to Source Threshold Voltage VGS = VDS, ID = 250µA 2 2.9 4 V
Gate to Source Threshold Voltage Temperature Coefficient
Drain to Source On Resistance
Forward Transcondductance VDS = 10V,ID = 3.9A 15 S
ID = 250µA, referenced to 25°C -11 mV/°C
VGS = 10V, ID = 3.9A 59 70
VGS = 10V, ID = 3.9A, TJ = 125°C 124 148
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 100 135 pF
Reverse Transfer Capacitance 30 45 pF
VDS = 100V, VGS = 0V, f = 1MHz
1905 2535 pF
Gate Resistance f = 1MHz 0.7 Ω
mΩVGS = 6V, ID = 3.5A 63 80
®
MOSFET
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time 10 20 ns
Turn-Off Delay Time 35 56 ns
VDD = 100V, ID = 3.9A VGS = 10V, R
GEN
= 6Ω
22 35 ns
Fall Time 10 20 ns
Total Gate Charge at 10V
Gate to Source Gate Charge 11 nC
VDD =100V ID = 3.9A
33 46 nC
Gate to Drain “Miller”Charge 7 nC
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Notes: 1: R
θJA
the drain pins. R
Source to Drain Diode Voltage V
= 0V, IS = 3.9A 0.75 1.2 V
GS
Reverse Recovery Time IF = 3.9A, di/dt = 100A/µs 67 101 ns
Reverse Recovery Charge IF = 3.9A, di/dt = 100A/µs 179 269 nC
is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
a) 50°C/W (10 sec)
62.5°C/W steady state when mounted on a 1in pad of 2 oz copper
is determined by the user’s board design.
θCA
2
b) 125°C/W when mounted on a minimum pad .
Scale 1:1 on letter size paper
2: Pulse Test: Pulse Width < 300 us, Duty Cycle < 2.0%. 3: Starting T
FDS2672 Rev. B www.fairchildsemi.com2
= 25°C, L = 3mH, IAS = 5A, VDD = 100V, VGS = 10V
J
Page 3
FDS2672 N-Channel UltraFET Trench
Typical Characteristics T
50
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
40
V
= 6V
GS
= 25°C unless otherwise noted
J
VGS = 10V
30
20
10
, DRAIN CURRENT (A)
D
I
0
01234
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 5V
V
GS
Figure 1. On Region Characteristics
2.8
ID = 3.9A
V
= 10V
GS
2.2
1.6
NORMALIZED
1.0
0.4
DRAIN TO SOURCE ON-RESISTANCE
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
= 4.5V
3.0
2.5
V
= 4.5V
GS
2.0
1.5
NORMALIZED
1.0
DRAIN TO SOURCE ON-RESISTANCE
0.5 0 5 10 15 20 25 30 35 40 45 50
ID, DRAIN CURRENT(A)
Figure 2. Normalized
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
V
= 5V
GS
On-Resistance vs Drain
Current and Gate Voltage
180
ID = 3.9A
(mΩ)
160
140
120
100
, DRAIN TO
80
DS(on)
r
60
SOURCE ON-RESISTANCE
40
3.0 4.5 6.0 7.5 9.0
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
TJ = 150oC
o
T
= 25
C
J
V
= 6V
GS
V
= 10V
GS
®
MOSFET
10
Figure 3.
Normalized On Resistance vs Junction
Temperature
30
PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX
25
V
= 10V
DD
20
15
TJ = 150oC
TJ = 25oC
10
, DRAIN CURRENT (A)
D
I
5
0
23456
VGS, GATE TO SOURCE VOLTAGE (V)
TJ = - 55oC
Figure 5. Transfer Characteristics
FDS2672 Rev. B www.fairchildsemi.com3
Figure 4.
On-Resistance vs Gate to Source
Voltage
100
V
= 0V
GS
10
1
0.1
TJ = 150oC
0.01
, REVERSE DRAIN CURRENT (A)
S
I
1E-3
0.0 0.2 0.4 0.6 0.8 1.0 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6.
Source to Drain Diode Forward
TJ = 25oC
TJ = -55oC
Voltage vs Source Current
Page 4
FDS2672 N-Channel UltraFET Trench
0
Typical Characteristics T
= 25°C unless otherwise noted
J
10
V
= 50V
8
DD
VDD = 100V
6
4
VDD = 150V
2
, GATE TO SOURCE VOLTAGE(V)
0
GS
V
0 8 16 24 32 40
Figure 7.
Qg, GATE CHARGE(nC)
Gate Charge Characteristics Figure 8.
10
TJ = 25oC
1
, AVALANCHE CURRENT(A)
AS
I
0.1
0.01 0.1 1 10 100 1000
TJ = 125oC
tAV, TIME IN AVALANCHE(ms)
10000
C
iss
1000
C
oss
100
CAPACITANCE (pF)
10
0.1 1 10 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
C
Capacitance vs Drain to Source Voltage
4.0
3.5
3.0
V
2.5
2.0
V
= 6V
GS
1.5
1.0
, DRAIN CURRENT (A)
D
I
0.5
R
= 50oC/W
θJA
0.0
25 50 75 100 125 150
TA, AMBIENT TEMPERATURE (oC)
GS
rss
f = 1MHz V
= 10V
GS
= 0V
®
MOSFET
Figure 9.
Unclamped Inductive Switching
Capability
2
10
1
10
0
10
-1
10
, DRAIN CURRENT (A)
-2
D
10
I
-3
10
0.01 0.1 1 10 100 1000
LIMITED BY PACKAGE
OPERATION IN THIS AREA MAY BE LIMITED BY r
DS(on)
SINGLE PULSE T
= MAX RATED
J
O
C
TA = 25
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 11.
FDS2672 Rev. B www.fairchildsemi.com4
Forward Bias Safe Operating Area Figure 12. Single
100us
1ms
10ms 100ms
1s
DC
Figure 10.
Ambient Continuous Drain Current vs
Case Temperature
3000
1000
VGS = 10V
100
10
), PEAK TRANSIENT POWER (W)
PK
P(
SINGLE PULSE
1
10-410-310-210-110010110210
t, PULSE WIDTH (s)
TA = 25oC
FOR TEMPERATURES
o
ABOVE 25
I = I
25
Pulse Maximum Power
Dissipation
C DERATE PEAK
150 TA–
----------------------- -
125
3
Page 5
FDS2672 N-Channel UltraFET Trench
Typical Characteristics T
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1
θJA
0.05
0.02
0.01
IMPEDANCE, Z
1E-3
NORMALIZED THERMAL
1E-4
0.01
SINGLE PULSE
-4
10
-3
10
= 25°C unless otherwise noted
J
-2
10
-1
10
NOTES: DUTY FACTOR: D = t
PEAK TJ = PDM x Z
0
10
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 13. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1b
Transient thermal response will change depending on the circuit board design
θJA
P
DM
t
1
t
2
1/t2
x R
+ T
θJA
A
2
10
3
10
®
MOSFET
FDS2672 Rev. B www.fairchildsemi.com5
Page 6
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™
2
CMOS™
E EnSigna™ FACT™
®
FAST FASTr™ FPS™ FRFET™
Across the board. Around the world.™ The Power Franchise
FACT Quiet Series™ GlobalOptoisolator™ GTO™ HiSeC™
2
C™
I i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™
®
OCX™ OCXPro™ OPTOLOGIC
®
OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench QFET
®
®
QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ μSerDes™ ScalarPump™
SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyBoost™ TinyBuck™ TinyPWM™ TinyPower™ TinyLogic
®
TINYOPTO™ TruTranslation™ UHC™
Programmable Active Droop™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
®
UniFET™ UltraFET VCX™ Wire™
®
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or syste ms are devices or syst ems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) wh ose failure to pe rform when pr operly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In Design This datasheet contains the design specifications for
Preliminary First Production This datasheet contains preliminary data, and
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Obsolete Not In Production This datasheet contains specifications on a product
product development. Specifications may change in any manner without notice.
supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
Semiconductor reserves the right to make changes at any time without notice to improve design.
that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I20
Loading...