Datasheet FDR6674A Datasheet (Fairchild Semiconductor)

FDR6674A

30V N-Channel PowerTrench



MOSFET

FDR6674A

April 2000

PRELIMINARY

General Description

This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
“low side” synchronous rectifier operation, providing an
extremely low R

in a small package.

DS(ON)

Applications

• Synchronous rectifier

Features

• 11.5 A, 30 V. R

R

• High performance trench technology for extremely

low R

DS(ON)

• High power and current handling capability in a

smaller footprint than SO8

= 9.5 mΩ @ VGS = 4.5 V

DS(ON)

= 8.5 mΩ @ VGS = 10 V

DS(ON)

• DC/DC converter

S

D

D

S

G

SuperSOT -8

TM

D

D

D

Absolute Maximum Ratings T

=25oC unless otherwise noted

A

5

6

7

8

4

3

2

1

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

P

D

TJ, T

STG

Drain-Source Voltage 30 V

Gate-Source Voltage

±12

Drain Current – Continuous (Note 1a) 11.5 A

– Pulsed 50

Power Dissipation for Single Operation (Note 1a) 1.8

(Note 1b)

(Note 1c)

1.0

0.9

Operating and Storage Junction Temperature Range -55 to +150

V

W

°C

Thermal Characteristics

R

θJA

R

θJC

Thermal Resistance, Junction-to-Ambient (Note 1a) 70

Thermal Resistance, Junction-to-Case (Note 1) 20

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

.6674A FDR6674A 13’’ 12mm 2500 units

2000 Fairchild Semiconductor Corporati on

°C/W

°C/W

FDR6674A Rev C(W)

FDR6674A

Electrical Characteristics T

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BVDSS
===∆T

J

I

DSS

I

GSSF

I

GSSR

Drain–Source Breakdown Voltage

Breakdown Voltage Temperature
Coefficient

= 0 V, ID = 250 µA

V

GS

I

= 250 µA, Referenced to 25°C

D

Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1

Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA

Gate–Body Leakage, Reverse VGS = –12 V , VDS = 0 V –100 nA

30 V

23

mV/°C

On Characteristics (Note 2)

V

GS(th)

∆VGS(th)
===∆T

J

R

DS(on)

I

D(on)

g

FS

Gate Threshold Voltage

Gate Threshold Voltage
Temperature Coefficient

Static Drain–Source
On–Resistance

= VGS, ID = 250 µA

V

DS

I

= 250 µA, Referenced to 25°C

D

= 4.5 V, ID = 10.5 A

V

GS

= 4.5 V, ID = 10.5 A, TJ 125°C

V

GS

= 10 V, ID = 11.5 A

V

GS

On–State Drain Current VGS = 4.5 V, VDS = 5 V 50 A

Forward Transconductance VDS = 10 V, ID = 11.5 A 75 S

0.8 1.2 2 V

-4

8.2

11.5

6.8

9.5
16

mV/°C

mΩ

8

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance 5070 pF

Output Capacitance 550 pF

Reverse Transfer Capacitance

= 15 V, V

V

DS

f = 1.0 MHz

GS

= 0 V,

230 pF

Switching Characteristics (Note 2)

V

= 10 V, ID = 1 A,

t

t

t

t

Q

Q

Q

d(on)

r

d(off)

f

Turn–On Delay Time 17 25 ns

Turn–On Rise Time 18 25 ns

Turn–Off Delay Time 69 100 ns

Turn–Off Fall Time

g

gs

gd

Total Gate Charge 33 46 nC

Gate–Source Charge 7.5 nC

Gate–Drain Charge

DD

= 4.5 V, R

V

GS

V

= 15 V, ID = 11.5 A,

DS

= 4.5V

V

GS

GEN

= 6 Ω

29 42 ns

6.8 nC

Drain–Source Diode Characteristics and Maximum Ratings

I

S

V

SD

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

Maximum Continuous Drain–Source Diode Forward Current 2.1 A
Drain–Source Diode Forward

Voltage

is guaranteed by design while R

θJC

is determined by the user's board design.

θCA

= 0 V, IS = 2.1 A (Note 2) 0.7 1.2 V

V

GS

µA

a) 70°/W when

mounted on a 1in
pad of 2 oz copper

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

2

b) 125°/W when

mounted on a .04 in
pad of 2 oz copper

2

c) 135°/W when mounted on a

minimum pad.

FDR6674A Rev C(W)

Typical Characteristics

FDR6674A

50

VGS = 4.5V

40

30

20

10

0

3.5V

00.511.5

3.0V

2.5V

2.0V

, DRAIN-SOURCE VO LTAGE (V)

V

DS

1.5

1.3

1.1

0.9

0 102030405060

VGS = 2.5V

3.0V

3.5V

4.0V

4.5V

, DRAIN CURR ENT (A)

I

D

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.8

ID = 11.5A
V

= 10V

1.6

GS

1.4

1.2

1

0.8

0.6

-50 -25 0 25 50 75 100 125 150

, JUNCTION TEM PERATURE (oC)

T

J

0.025

0.02

0.015

0.01

TA = 25oC

0.005

12.545.578.510

V

TA = 125oC

, GATE TO SOURCE VOLTAGE (V)

GS

ID = 5.8 A

Figure 3. On-Resistance Variation

withTemperature.

60

VDS = 5V

45

30

TA = 125oC

15

0

0.5 1 1.5 2 2.5 3

V

, GATE TO SOURCE VOLTAGE (V)

GS

25oC

-55oC

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

100

VGS = 0V

10

1

0.1

0.01

0.001

00.20.40.60.811.21.4

TA = 125oC

25oC

-55oC

V

, BODY DIODE FORWA RD VOLTAGE (V)

SD

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDR6674A Rev C(W)

Typical Characteristics

µ

FDR6674A

5

ID = 11.5A

4

3

2

1

0

0 10203040

Q

, GATE CHAR GE (nC)

g

VDS = 5V

10V

15V

8000

7000

6000

5000

4000

3000

2000

1000

0

C

OSS

C

RSS

0 5 10 15 20 25 30

, DRAIN TO SOURCE VOLTAGE (V)

V

DS

C

ISS

f = 1MHz

V

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

100

R

LIMIT

DS(ON)

100ms

10ms

1ms

10

1

VGS = 10V

SINGLE PULSE

0.1
= 135oC/W

R

θ

JA

= 25oC

T

0.01

A

0.1 1 10 100

V

1s

DC

, DRAIN-SOURCE VO LTAGE (V)

DS

50

40

30

20

10

0

0.001 0.01 0.1 1 10 100 1000

t

, TIME (sec)

1

SINGLE PULSE

= 135°C/W

R

θ

JA

T

= 25°C

A

GS

= 0 V

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

1

0.1

0.01

D = 0.5

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

RθJA(t) = r(t) + Rθ

RθJA = 135°C/W

t

1

t

2

- TA = P * RθJA(t)

T

J

Duty Cycle, D = t

0.001

0.0001 0.001 0.01 0.1 1 10 100 1000

, TIME (sec)

t

1

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.

FDR6674A Rev C(W)

JA

/ t

1

2

SuperSOTTM-8 Tape and Reel Data and Package Dimensions

SSOT-8 Packaging
Configuration: Figure 1.0

Customized Label

F63TNR Label

Emboss ed Carrier Tape

Antistatic Cover Tape

Static Dissipative

852

F

831N

Packaging Description:

SSOT-8 parts are shipped in tape. The carrier tape is
made from a di ssipati ve (carbo n fil led) polycarbon ate
resin. The cov er tap e is a mu lt ilayer film (Heat Act ivat ed
Adhesiv e in nat ure) prim aril y c omp osed of po lyes ter film ,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standar d option are ship ped wi th
3,000 u n i t s pe r 13" o r 33 0c m d ia m et er r eel . Th e r e els ar e
dark blue in color and is made of polyst yr ene plas ti c (anti­static c oated). Other option comes in 500 units per 7" or
177c m diam eter reel. This and s ome o ther opt ion s are
furth er described in the Packaging Information table.

These full reels are in di vidu ally barcode labeled a nd
placed in side a standard intermediat e box (illus trated in
figur e 1.0) made of recyc lable corrugat ed brown paper.
One box cont ains t wo reels maxi mum. And t hese bo xes
are placed ins ide a barc ode labeled shipp ing bo x whic h
co m e s i n di f f er e n t siz es depe nd in g on t h e nu mb e r of part s
sh i ppe d.

852

852

F

831N

F

831N

852

F

831N

852

F

831N

Pin 1

SSOT-8 Packaging Information

Packaging Option
Packaging type

Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (kg)

Note/Comments

184mm x 187mm x 47mm

Stan dard

(no flow c ode )

3,000 500

13" Dia

343x64x343 184x187x47

6,000 1,000

0.0416 0.0416

0.5615 0.0980

TNR

D84Z

TNR

7" Di a

F63TNR
Label

Pizza Box for D84Z Option

SSOT-8 Tape Leader and Trailer
Configuration: Figure 2.0

F63TNR
Label

SSOT-8 Unit Orientation

343mm x 342mm x 64mm

Inter mediate box for Standar d

and L 99Z Options

F63TNR Label sampl e

LOT: CBVK7 41B019

FSID: FDR835N

D/C1: D9842 QTY1: SPEC REV:
D/C2: QTY2: CPN:

F63TNR Label

QTY: 3000

SPEC:

N/F: F (F63TNR)3

Carrier Tape

Cover Tape

Tr ailer Tape
300mm mi n i mum or
38 empty pock ets

Components

Leader Tape
500mm mi n i mum or
62 empty pocket s

August 1999, Rev. C

SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued

SSOT-8 Embossed Carrier Tape
Configuration: Figure 3.0

T

K0

Wc

B0

P0

D0

E1

F

W

E2

Tc

A0

P1

D1

User Direction of Feed

Dimensions are in millimeter

Pkg type

SSOT-8

(12mm)

Notes: A0, B0, and K0 dimensions are determined with r espec t to t he EIA/Jedec RS-481

rotationa l and lateral movement requirements (see sketches A, B, and C).

SSOT-8 Reel Configuration: Figur e 4.0

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

4.47

5.00

12.0

1.55

1.50

1.75

10.25

5.50

+/-0.10

+/-0.10

20 deg maximum component rotation

Sketc h A (Sid e or Fron t Sectional View)

Component Rotation

+/-0.3

+/-0.05

+/-0.10

+/-0.10

B0

min

A0

Sketc h B (Top View)

Component Rotation

8.0

+/-0.05

+/-0.1

20 deg maximum

Typical
component
cavity
center line

Typical
component
center line

W1 Measured at Hub

Dim A

Max

4.0
+/-0.1

1.37

0.280
+/-0.150

9.5
+/-0.025

0.5mm
maximum

+/-0.10

0.5mm
maximum

Sketc h C (Top View)

Component lateral movement

0.06
+/-0.02

Dim A

max

13" Diameter Option

Tape Size

12mm 7" Di a

12mm 13" Di a

 1998 Fairchild Semiconductor Corporation

Reel

Option

Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

7.00

177.8

13.00
330

0.059

1.5

0.059

1.5

Dim N

See detail AA

W3

W2 max Measured at Hub

Dimensions are in inches and millimeters

512 +0.020/-0.008
13 +0.5/-0.2

512 +0.020/-0.008
13 +0.5/-0.2

0.795

20.2

0.795

20.2

5.906
150

7.00
178

Dim D

min

0.488 +0.078/-0.000

12.4 +2/0

0.488 +0.078/-0.000

12.4 +2/0

Diameter Option

7"

DETAIL AA

0.724

18.4

0.724

18.4

See detail AA

B Min

Dim C

0.469 – 0.606

11.9 – 15.4

0.469 – 0.606

11.9 – 15.4

July 1999, Rev. C

SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued

SuperSOT-8 (FS PKG Code 34, 35)

1 : 1

Scale 1:1 on letter size paper

Dimensio ns shown below are in:

inches [mil lime ters ]

Part Weight per unit (gram): 0.0416

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™
Bottomless™
CoolFET™
CROSSVOLT™

2

CMOS

E

TM

FACT™
FACT Quiet Series™



FAST
FASTr™
GTO™

HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench



QFET™
QS™

Quiet Series™
SuperSOT™-3
SuperSOT™-6

SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:

1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.

2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or
In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.

This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. E