Datasheet FDP7N50, FDPF7N50 Datasheet (Fairchild)

FDP7N50/FDPF7N50

D

G

S

TO-220

FDP Series

G

S

D

TO-220F

FDPF Series

GSD

500V N-Channel MOSFET

FDP7N50/FDPF7N50 500V N-Channel MOSFET

April 2007

TM

UniFET

Features

• 7A, 500V, R

• Low gate charge ( typical 12.8 nC)

•Low C

•Fast switching

• 100% avalanche tested

• Improved dv/dt capability

( typical 9 pF)

rss

= 0.9Ω @VGS = 10 V

DS(on)

Description

These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology.

This advanced technology has been especially minimize performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction.

on-state resistance, provide superior switching

Absolute Maximum Ratings

Symbol Parameter FDP7N50 FDPF7N50 Unit

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt P

D

T

J, TSTG

T

L

* Drain current limited by maximum junction temperature.

Drain-Source Voltage 500 V Drain Current - Continuous (TC = 25°C)

- Continuous (T Drain Current - Pulsed Gate-Source voltage ±30 V Single Pulsed Avalanche Energy Avalanche Current (Note 1) 7 A Repetitive Avalanche Energy (Note 1) 8.9 mJ

Power Dissipation (TC = 25°C)

- Derate above 25°C Operating and Storage Temperature Range -55 to +150 °C Maximum Lead Temperature for Soldering Purpose,

1/8” from Case for 5 Seconds

= 100°C)

C

(Note 1)

(Note 2)

(Note 3) 4.5 V/ns

7

4.2 28 28 * A

270 mJ

89

0.71

300 °C

7 *

4.2 *

31.3

0.25

Thermal Characteristics

tailored to

A A

W

W/°C

Symbol Parameter FDP7N50 FDPF7N50 Unit

R

θJC

R

θCS Thermal Resistance, Case-to-Sink Typ.

R

θJA

FDP7N50/FDPF7N50 REV. B

Thermal Resistance, Junction-to-Case 1.4 4.0 °C/W

0.5 -- °C/W

Thermal Resistance, Junction-to-Ambient

62.5 62.5 °C/W

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

FDP7N50 FDP7N50 TO-220 -- -- 50

FDPF7N50 FDPF7N50 TO-220F -- -- 50

FDP7N50/FDPF7N50 500V N-Channel MOSFET

Electrical Characteristics T

= 25°C unless otherwise noted

C

Symbol Parameter Conditions Min. Typ. Max Units

Off Characteristics

BV

DSS

ΔBV / ΔT

I

DSS

I

GSSF

I

GSSR

On Characteristics

V

GS(th)

R

DS(on)

g

FS

Dynamic Characteristics

C

iss

C

oss

C

rss

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

g

Q

gs

Q

gd

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 500 -- -- V Breakdown Voltage Temperature

DSS

Coefficient

J

Zero Gate Voltage Drain Current VDS = 500V, VGS = 0V

I

= 250μA, Referenced to 25°C -- 0.5 -- V/°C

D

V

= 400V, TC = 125°C

DS

--

-Gate-Body Leakage Current, Forward VGS = 30V, VDS = 0V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30V, VDS = 0V -- -- -100 nA

Gate Threshold Voltage VDS = VGS, ID = 250μA 3.0 -- 5.0 V Static Drain-Source

On-Resistance

V

= 10V, ID = 3.5A -- 0.76 0.9 Ω

GS

Forward Transconductance VDS = 40V, ID = 3.5A (Note 4) -- 2.5 -- S

Input Capacitance VDS = 25V, VGS = 0V, Output Capacitance -- 95 190 pF

f = 1.0MHz

-- 720 940 pF

Reverse Transfer Capacitance -- 9 13.5 pF

Turn-On Delay Time VDD = 250V, ID = 7A

= 25Ω

R

Turn-On Rise Time -- 55 120 ns

G

-- 6 20 ns

Turn-Off Dela y Time -- 25 60 ns Turn-Off Fall Time -- 35 80 ns Total Gate Charge VDS = 400V, ID = 7A

V

= 10V

Gate-Source Charge -- 3.7 -- nC

GS

Gate-Drain Charge -- 5.8 -- nC

(Note 4, 5)

-- 12.8 16.6 nC

(Note 4, 5)

Maximum Continuous Drain-Source Diode Forward Current -- -- 7 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 28 A Drain-Source Diode Forward Voltage VGS = 0V, IS = 7A -- -- 1.4 V Reverse Recovery Time VGS = 0V, IS = 7A

/dt =100A/μs (Note 4)

dI

Reverse Recovery Charge -- 1.7 -- µC

F

-- 275 -- ns

10

1

μA μA

NOTES:

1. Repetitive Rating: Pulse width limited by maximum junction temperature

2. IAS = 7A, VDD = 50V, L=10mH, RG = 25Ω, Starting TJ = 25°C ≤ 7A, di/dt ≤ 200A/μs, VDD ≤ BV

3. I

SD

4. Pulse Test: Pulse width ≤ 300μs, Duty Cycle ≤ 2%

5. Essentially Independent of Operating Temperature Typical Characteristics

, Starting TJ = 25°C

DSS

FDP7N50/FDPF7N50 REV. B

2 www.fairchildsemi.com

Typical Performance Characteristics

0 1020304050

0

5

10

15

20

V

GS

Top : 10.0 V

8.0 V

7.5 V

7.0 V

6.5 V

6.0 V

5.5 V Bottom : 5.0 V

* Notes :

1. 250

μs Pulse Test

2. T

C

= 25oC

I

D

, Drain Current [A]

VDS, Drain-Source Voltage [V]

246810

10

-2

10

-1

10

0

10

1

* Note:

1. V

DS

= 40V

2. 250

μs Pulse Test

-55oC

150oC

25oC

I

D

, Drain Current [A]

VGS , Gate- Source Voltage [V]

0 5 10 15 20

0.0

0.5

1.0

1.5

2.0

2.5

VGS = 20V

VGS = 10V

* Note : TJ = 25oC

R

DS(ON)

[Ω],Drain-Source On-Resistance

ID, Drain Current [A]

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

10

-1

10

0

10

1

25oC

150oC

* Notes :

1. V

GS

= 0V

2. 250

μs Pulse Test

I

DR

, Reverse Drain Current [A]

VSD , Source-Drain Voltage [V]

10

0

10

1

10

100

1000

C

iss

= Cgs + Cgd (Cds = shorted)

C

oss

= Cds + C

gd

C

rss

= C

gd

* Notes :

1. V

GS

= 0 V

2. f = 1 MHz

C

rss

C

oss

C

iss

Capacitance [pF]

VDS, Drain-Source V oltage [V]

0 5 10 15

0

2

4

6

8

10

12

VDS = 250V

VDS = 100V

VDS = 400V

* Note : ID = 7 A

V

GS

, Gate-Source Voltage [V]

QG, Total Ga te Charge [nC]

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current

and Temperature

FDP7N50/FDPF7N50 500V N-Channel MOSFET

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

FDP7N50/FDPF7N50 REV. B

3 www.fairchildsemi.com

Typical Performance Characteristics (Continued)

-100 -50 0 50 100 150 200

0.8

0.9

1.0

1.1

1.2

*Notes :

1. V

GS

= 0 V

2. I

D

= 250 μA

BV

DSS

, (Normalized)

Drain-Source Breakdown Volt ag e

TJ, Junction Temperature [oC]

-100 -50 0 50 100 150 200

0.0

0.5

1.0

1.5

2.0

2.5

3.0

∗Notes :

1. V

GS

= 10 V

2. I

D

= 3.5 A

R

DS(ON)

, (Normalized)

Drain-Source On-Resistance

TJ, Junction Temperature [oC]

10

0

10

1

10

2

10

-2

10

-1

10

0

10

1

100 ms

10 us

Operation in This Area is Limited by R

DS(on)

DC

10 ms

1 ms

100 us

* Notes :

1. T

C

= 25 oC

2. T

J

= 150 oC

3. Single Pulse

I

D

, Drain Current [A]

VDS, Drain-Source Voltage [V]

10

0

10

1

10

2

10

-2

10

-1

10

0

10

1

100 ms

10 us

Operation in This Area is Limited by R

DS(on)

DC

10 ms

1 ms

100 us

* Notes :

1. T

C

= 25 oC

2. T

J

= 150 oC

3. Single Pulse

I

D

, Drain Current [A]

VDS, Drain-Source Voltage [V]

25 50 75 100 125 150

0

2

4

6

8

I

D

, Drain Current [A]

TC, Case Temperature [oC]

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs. Temperature vs. Temperature

Figure 9-1. Maximum Safe Operating Area Figure 9- 2. Maximum Safe Oper ating Ar ea

- FDP7N50 - FDPF7N50

FDP7N50/FDPF7N50 500V N-Channel MOSFET

Figure 10. Maximum Drain Current Vs. Case Temperature

FDP7N50/FDPF7N50 REV. B

4 www.fairchildsemi.com

Figure 11-1. Transient Thermal Response Curve - FDP7N50

10

-5

10

-4

10

-3

10

-2

10

-1

10

0

10

1

10

-2

10

-1

10

0

* Notes :

1. Z

θJC

(t) = 1.4 oC/W Max.

2. D u ty F a c to r , D =t

1/t2

3. TJM - TC = PDM * Z

θJC

(t)

single pulse

D=0.5

0.02

0.2

0.05

0.1

0.01

Z

θJC

(t), Thermal Response

t1, Sq u a re W ave P u lse D u ra tio n [se c ]

t

1

P

DM

t

2

10

-5

10

-4

10

-3

10

-2

10

-1

10

0

10

1

10

-2

10

-1

10

0

* Note s :

1. Z

θJC

(t) = 4.0 oC/W Max.

2. D u ty F a c to r, D =t

1/t2

3. TJM - TC = PDM * Z

θJC

(t)

single pulse

D=0.5

0.02

0.2

0.05

0.1

0.01

Z

θJC

(t), Thermal Response

t1, Square Wave Pulse Duration [sec]

t

1

P

DM

t

2

Figure 11-2. Transient Thermal Response Curve - FDPF7N50

FDP7N50/FDPF7N50 500V N-Channel MOSFET

FDP7N50/FDPF7N50 REV. B

5 www.fairchildsemi.com

Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & Waveforms

FDP7N50/FDPF7N50 500V N-Channel MOSFET

FDP7N50/FDPF7N50 REV. B

6 www.fairchildsemi.com

Peak Diode Recovery dv/dt Test Circuit & Waveforms

FDP7N50/FDPF7N50 500V N-Channel MOSFET

FDP7N50/FDPF7N50 REV. B

7 www.fairchildsemi.com

Mechanical Dimensions

TO-220

FDP7N50/FDPF7N50 500V N-Channel MOSFET

FDP7N50/FDPF7N50 REV. B

Dimensions in Millimeters

8 www.fairchildsemi.com

Mechanical Dimensions (Continued)

(7.00)

(0.70)

MAX1.47

(30°)

#1

3.30 ±0.10

15.80 ±0.20

15.87 ±0.20

6.68 ±0.20

9.75 ±0.30

4.70 ±0.20

10.16 ±0.20

(1.00x45°)

2.54

±0.20

0.80 ±0.10

9.40 ±0.20

2.76 ±0.20

0.35 ±0.10

ø3.18 ±0.10

2.54TYP

[2.54

±0.20]

2.54TYP

[2.54

±0.20]

0.50

+0.10 –0.05

TO-220F

FDP7N50/FDPF7N50 500V N-Channel MOSFET

FDP7N50/FDPF7N50 REV. B

Dimensions in Millimeters

9 www.fairchildsemi.com

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development. Specifications may change in any manner without notice.

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