Datasheet FDP26N40, FDPF26N40 Datasheet (Fairchild)

Page 1
tm
FDP26N40 / FDPF26N40
N-Channel MOSFET
400V, 26A, 0.16Ω
FDP26N40 / FDPF26N40 N-Channel MOSFET
February 2008
UniFET
Features
•R
• Low gate charge ( Typ. 48nC)
• Low C
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS compliant
MOSFET Maximum Ratings T
V
DSS
V
GSS
I
D
I
DM
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns P
D
, T
T
J
T
L
*Drain current limited by maximum junction temperature
= 0.13Ω ( Typ.)@ VGS = 10V, ID = 13A
DS(on)
( Typ. 30pF)
rss
G
D
S
Symbol Parameter FDP26N40 FDPF26N40 Units
Drain to Source Voltage 400 V Gate to Source Voltage ±30 V
Drain Current Drain Current - Pulsed (Note 1) 104 104* A
Single Pulsed Avalanche Energy (Note 2) 1352 mJ Avalanche Current (Note 1) 26 A Repetitive Avalanche Energy (Note 1) 26.5 mJ
Power Dissipation
STG
Operating and Storage Temperature Range -55 to +150 Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
TO-220 FDP Series
C
= 25
D
G
S
o
C unless otherwise noted*
-Continuous (T
-Continuous (T
(T
= 25oC) 265 40 W
C
- Derate above 25
Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology.
This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pluse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power suppliesand active power factor correction.
D
G
TO-220F FDPF Series
= 25oC) 26 26*
C
= 100oC) 15.6 15.6*
C
o
C2.00.3W/
300
S
o
o
Thermal Characteristics
Symbol Parameter FDP26N40 FDPF26N40 Units
R
θJC θCS
R
θJA
Thermal Resistance, Junction to Case 0.5 3.0 Thermal Resistance, Case to Sink Typ. 0.5 ­Thermal Resistance, Junction to Ambient 62.5 62.5
o
C/WR
A
o
C
C C
©2008 Fairchild Semiconductor Corporation FDP26N40 / FDPF26N40 Rev. A
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Page 2
FDP26N40 / FDPF26N40 N-Channel MOSFET
Package Marking and Ordering Information T
= 25oC unless otherwise noted
C
Device Marking Device Package Reel Size Tape Width Quantity
FDP26N40 FDP26N40 TO-220 - - 50
FDPF26N40 FDPF26N40 TO-220F - - 50
Electrical Characteristics
Symbol Parameter Test Conditions Min. Typ. Max. Units
Off Characteristics
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSS
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Dynamic Characteristics
C
iss
C
oss
C
rss
Q
g(tot)
Q
gs
Q
gd
Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V, TJ = 25oC 400 - - V Breakdown Voltage Temperature
Coefficient Zero Gate Voltage Drain Current Gate to Body Leakage Current VGS = ±30V, V
I
= 250µA, Referenced to 25oC-0.5-V/
D
V
= 400V, V
DS
= 320V, TC = 125oC--10
V
DS
= 0V - - 1
GS
= 0V - - ±100 nA
DS
Gate Threshold Voltage VGS = VDS, ID = 250µA3.0-5.0V Static Drain to Source On Resistance VGS = 10V, ID = 13A - 0.13 0.16 Ω Forward Transconductance VDS = 20V, ID = 13A (Note 4) - 25.5 - S
Input Capacitance Output Capacitance - 390 520 pF Reverse Transfer Capacitance - 30 45 pF
= 25V, VGS = 0V
V
DS
f = 1MHz
Total Gate Charge at 10V
V
= 320V, ID = 26A
Gate to Source Gate Charge - 15 - nC Gate to Drain “Miller” Charge - 20 - nC
DS
V
= 10V
GS
(Note 4, 5)
- 2400 3185 pF
-4860nC
µA
o
C
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time Turn-On Rise Time - 100 210 ns Turn-Off Delay Time - 115 240 ns Turn-Off Fall Time - 66 140 ns
Drain-Source Diode Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1: Repetitive Rating: Pulse width limited by maximum junction temperature 2: L = 4mH, I 3: I
≤ 26A, di/dt ≤ 200A/µs, VDD ≤ BV
SD
4: Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2% 5: Essentially Independent of Operating Temperature Typical Characteristics
Maximum Continuous Drain to Source Diode Forward Current - - 26 A Maximum Pulsed Drain to Source Diode Forward Current - - 104 A Drain to Source Diode Forward Voltage V Reverse Recovery Time Reverse Recovery Charge - 5.17 - µC
= 26A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
AS
, Starting TJ = 25°C
DSS
= 200V, ID = 26A
V
DD
R
= 25Ω
G
(Note 4, 5)
= 0V, I
GS
V
= 0V, I
GS
dI
/dt = 100A/µs (Note 4)
F
= 26A - - 1.4 V
SD
= 26A
SD
- 45 100 ns
- 406 - ns
FDP26N40 / FDPF26N40 Rev. A
2
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Page 3
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
70
V
= 15.0V
GS
10.0V
8.0 V
7.0 V
6.5 V
10
6.0 V
5.5 V
1
,Drain Current[A]
D
I
*Notes:
µs Pulse Test
1. 250
2. T
= 25oC
0.1
0.02
0.1 1 10
C
VDS,Drain-Source Voltage[V]
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
0.35
100
25oC
-55oC
*Notes:
1. V
2. 250
= 20V
DS
µs Pulse Test
10
,Drain Current[A]
D
I
1
456789
150oC
VGS,Gate-Source Voltage[V]
100
FDP26N40 / FDPF26N40 N-Channel MOSFET
0.30
150oC
0.25
[Ω],
0.20
DS(ON)
R
VGS = 10V
0.15
VGS = 20V
Drain-Source On-Resistance
0.10 0 20406080
*Note: TJ = 25oC
ID, Drain Current [A]
10
, Reverse Drain Current [A]
S
I
1
0.2 0.6 1.0 1.4
VSD, Body Diode Forward Voltage [V]
25oC
*Notes:
1. VGS = 0V
2. 250
µs Pulse Test
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
5000
4000
3000
2000
C
= Cgs + Cgd (Cds = shorted)
iss
C
= Cds + C
oss
C
= C
rss
C
C
Capacitances [pF]
1000
0
0.1 1 10
C
VDS, Drain-Source Voltage [V ]
oss
rss
gd
gd
*Note:
= 0V
1. V
GS
iss
2. f = 1MH z
30
10
8
VDS = 100V V
= 200V
DS
= 320V
V
DS
6
4
, Gate-Source Voltage [V]
GS
V
2
0
0 1020304050
*Note: ID = 26A
Qg, Total Gate Char g e [nC]
FDP26N40 / FDPF26N40 Rev. A
3
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Page 4
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation vs. Temperature vs. Temperature
1.2
1.1
3.0
2.5
2.0
FDP26N40 / FDPF26N40 N-Channel MOSFET
1.0
, [Normalized]
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-75 -25 25 75 125 175 TJ, Junction Temperature [oC]
*Notes:
1. V
2. I
= 0V
GS
= 250µA
D
1.5
, [Normalized]
1.0
DS(on)
R
Drain-Source On-Resistance
0.5
0.0
-75 -25 25 75 125 175 TJ, Junction Temperature [oC]
*Notes:
1. V
2. I
D
= 10V
GS
= 13A
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Safe Operating Area
- FDP26N40
300
100
10
Operation in This Area
1
, Drain Current [A]
D
I
is Limited by R
DS(on)
0.1
0.01 1 10 100
VDS, Drain-Source Voltage [V]
1ms
10ms
DC
*Notes:
= 25oC
1. T
C
= 150oC
2. T
J
3. Single Pulse
10µs
100µs
800
28
24
20
16
12
, Drain Current [A]
8
D
I
4
0
25 50 75 100 125 150
TC, Case Temperatu re [oC]
Figure 11. Transient Thermal Response Curve - FDP26N40
FDP26N40 / FDPF26N40 Rev. A
]
θJC
Thermal Response [Z
0.002
0.1
0.01
1
0.5
0.2
0.1
0.05
0.02
Single pulse
-5
10
0.01
P
DM
t
1
t
*Notes:
1. Z
θJC
2. Duty Fact or, D= t
3. TJM - TC = PDM * Z
-4
10
-3
10
-2
10
-1
10
2
(t) = 0.5oC/W Max.
1/t2
θJC
0
10
Rectangular Pulse Duration [sec]
4
(t)
1
10
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Page 5
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
FDP26N40 / FDPF26N40 N-Channel MOSFET
FDP26N40 / FDPF26N40 Rev. A
Unclamped Inductive Switching Test Circuit & Waveforms
5
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Page 6
Peak Diode Recovery dv/dt Test Circuit & Waveforms
g
p
g
p
+
+
V
V
DS
DS
_
_
L
LL
Sam e Type
Sam e Type
as DU T
as DU T
• dv/dt controlled by R
• dv/dt controlled by R
•ISDcontrolled by pulse period
•ISDcontrolled by pulse period
G
G
V
V
GS
GS
R
R
Driver
Driver
G
G
DUT
DUT
I
I
SD
SD
V
V
DD
DD
FDP26N40 / FDPF26N40 N-Channel MOSFET
V
V
GS
GS
( D rive r )
( D rive r )
I
I
SD
SD
( D U T )
( D U T )
V
V
DS
DS
( DUT )
( DUT )
G ate Pulse W idth
G ate Pulse W idth
G ate Pulse W idth
--------------------------
--------------------------
--------------------------
D =
D =
D =
Gate Pulse Period
Gate Pulse Period
Gate Pulse Period
IFM, Body Diode Forward Current
IFM, Body Diode Forward Current
I
I
RM
RM
Body Diode Reverse Current
Body Diode Reverse Current
Body Diode Recovery dv/dt
Body D iode R ecovery dv/dt
V
V
SD
SD
Body Diode
Body Diode
Forward Volta
Forward Volta
e Dro
e Dro
di/dt
di/dt
10V
10V
V
V
DD
DD
FDP26N40 / FDPF26N40 Rev. A
6
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Page 7
Mechanical Dimensions
FDP26N40 / FDPF26N40 N-Channel MOSFET
TO - 220
FDP26N40 / FDPF26N40 Rev. A
Dimensions in Millimeters
7
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Page 8
Mechanical Dimensions
0
0
10.16
±0.1
3.30
±0.20
(7.00)
TO-220F
ø3.18
±0.10
±0.20
6.68
2.54 (0.70)
FDP26N40 / FDPF26N40 N-Channel MOSFET
±0.20
±0.20
±0.20
(1.00x45°)
15.87
15.80
MAX1.47
±0.30
0.80
±0.10
9.75
(30°)
#1
0.35
2.54TYP
±0.20
[2.54
±0.10
2.54TYP
]
9.40
±0.20
[2.54
±0.20
±0.20
]
0.50
+0.10 –0.05
2.76
±0.2
4.70
FDP26N40 / FDPF26N40 Rev. A
Dimensions in Millimeters
8
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Page 9
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PR ODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF AN Y PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIG HTS OF OTH ERS. THESE SPECIFICATIO NS DO N OT EXPAN D THE TERM S OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFIC ALLY THE WARRANTY THER EIN, WHICH COVERS TH ESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical im plant into the body or (b) support or sustain lif e, and (c) whose failure to perform when properly used in accordance with instructi ons for use
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the fail ure of the life support device or system, or to affect its s afety or effectiveness.
provided in the labeling, can be reasonably expected to result in a signific ant injury of the user.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In Desi gn
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
This datasheet contains the design specificati ons for product development. Specif i cations may change in any manner without notice.
This datasheet contains prelim inary data; supplementary data will be published at a later date. Fairc hi l d Semiconductor reserves the right to make changes at any ti me without notice to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design.
This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet i s printed for reference information only.
Rev. I33
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© 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
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