Page 1
tm
UniFET
G
S
D
D
G
S
TO-220F
FDPF Series
G
S
D
TO-220
FDP Series
FDP13N50F / FDPF13N50FT
N-Channel MOSFET
500V, 12A, 0.54Ω
FDP13N50F / FDPF13N50FT N-Channel MOSFET
May 2012
TM
Features
•R
• Low gate charge ( Typ. 30nC)
• Low C
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS compliant
MOSFET Maximum Ratings T
V
DSS
V
GSS
I
D
I
DM
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt (Note 3) 20 V/ns
P
D
, T
T
J
T
L
*Drain current limited by maximum junction temperature
= 0.42Ω ( Typ.)@ VGS = 10V, ID = 6A
DS(on)
( Typ. 14.5pF)
rss
= 25oC unless otherwise noted*
C
Symbol Parameter FDP13N50F FDPF13N50FT Units
Drain to Source Voltage 500 V
Gate to Source Voltage ±30 V
-Continuous (T
-Continuous (T
(T
= 25oC) 195 42 W
C
- Derate above 25
STG
Drain Current
Drain Current - Pulsed (Note 1) 48 48* A
Single Pulsed Avalanche Energy (Note 2) 684 mJ
Avalanche Current (Note 1) 12 A
Repetitive Avalanche Energy (Note 1) 19.5 mJ
Power Dissipation
Operating and Storage Temperature Range -55 to +150
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.
= 25oC) 12 12*
C
= 100oC) 7.2 7.2*
C
o
C 1.53 0.33 W/oC
300
o
o
Thermal Characteristics
Symbol Parameter FDP13N50F FDPF13N50FT Units
R
θJC
θCS
R
θJA
Thermal Resistance, Junction to Case 0.65 3.0
Thermal Resistance, Case to Sink Typ. 0.5 -
Thermal Resistance, Junction to Ambient 62.5 62.5
o
C/WR
A
C
C
©2012 Fairchild Semiconductor Corporation
FDP13N50F / FDPF13N50FT Rev.C1
www.fairchildsemi.com1
Page 2
FDP13N50F / FDPF13N50FT N-Channel MOSFET
Package Marking and Ordering Information T
= 25oC unless otherwise noted
C
Device Marking Device Package Reel Size Tape Width Quantity
FDP13N50F FDP13N50F TO-220 - - 50
FDPF13N50FT FDPF13N50FT TO-220F - - 50
Electrical Characteristics
Symbol Parameter Test Conditions Min. Typ. Max. Units
Off Characteristics
BV
DSS
ΔBV
DSS
ΔT
J
I
DSS
I
GSS
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Dynamic Characteristics
C
iss
C
oss
C
rss
Q
g(tot)
Q
gs
Q
gd
Drain to Source Breakdown Voltage ID = 250μA, VGS = 0V, TJ = 25oC 500 - - V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Body Leakage Current VGS = ±20V, V
I
= 250μA, Referenced to 25oC-0.7-V/
D
V
= 500V, V
DS
= 400V, TC = 125oC - - 100
V
DS
= 0V - - 10
GS
= 0V - - ±100 nA
DS
Gate Threshold Voltage VGS = VDS, ID = 250μA3.0-5.0V
Static Drain to Source On Resistance VGS = 10V, ID = 6A - 0.42 0.54 Ω
Forward Transconductance VDS = 20V, ID = 6A (Note 4) - 13.3 - S
Input Capacitance
Output Capacitance - 198 265 pF
Reverse Transfer Capacitance - 14.5 22 pF
= 25V, VGS = 0V
V
DS
f = 1MHz
Total Gate Charge at 10V
V
= 400V, ID = 13A
Gate to Source Gate Charge - 8 - nC
Gate to Drain “Miller” Charge - 12 - nC
DS
V
= 10V
GS
( Note 4 , 5)
- 1450 1930 pF
-3039nC
μA
o
C
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Turn-On Rise Time - 54 120 ns
Turn-Off Delay Time - 75 160 ns
Turn-Off Fall Time - 47 105 ns
Drain-Source Diode Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
Notes:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 9.5mH, I
≤ 12A, di/dt ≤ 200A/μs, VDD ≤ BV
3. I
SD
4. Pulse Test: Pulse width ≤ 300μs, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
Maximum Continuous Drain to Source Diode Forward Current - - 12 A
Maximum Pulsed Drain to Source Diode Forward Current - - 48 A
Drain to Source Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge - 0.45 - μC
= 12A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
AS
, Starting TJ = 25°C
DSS
= 250V, ID = 13A
V
DD
R
= 25Ω
G
(N ote 4, 5)
= 0V, I
GS
V
= 0V, I
GS
dI
/dt = 100A/μs (Note 4)
F
= 12A - - 1.5 V
SD
= 12A
SD
-2865ns
- 154 - ns
FDP13N50F / FDPF13N50FT Rev.C1
2
www.fairchildsemi.com
Page 3
Typical Performance Characteristics
110
1
10
20
30
*Notes:
1. 250
μs Pulse Test
2. T
C
= 25oC
V
GS
= 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
I
D
,Drain Current[A]
VDS,Drain-Source Voltage[V]
345678
1
10
150oC
*Notes:
1. V
DS
= 20V
2. 250
μs Pulse Test
25oC
I
D
,Drain Current[A]
VGS,Gate-Source Voltage[V]
50
0 10203040
0.3
0.4
0.5
0.6
0.7
0.8
0.9
*Note: TJ = 25oC
VGS = 20V
VGS = 10V
R
DS(ON)
[Ω],
Drain-Source On-Resistance
ID, Drain Current [A]
0.0 0.5 1.0 1.5 2.0 2.5
1
10
100
*Notes:
1. VGS = 0V
2. 250
μs Pulse Test
150oC
I
S
, Reverse Drain Current [A]
VSD, Body Diode Forward Voltage [V]
25oC
0.1 1 10
0
1500
3000
C
oss
C
iss
C
iss
= Cgs + Cgd (Cds = shorted)
C
oss
= Cds + C
gd
C
rss
= C
gd
*Note:
1. V
GS
= 0V
2. f = 1MHz
C
rss
Capacitances [pF]
VDS, Drain-Source Voltage [V]
30
0 5 10 15 20 25 30
0
2
4
6
8
10
*Note: ID = 13A
VDS = 100V
V
DS
= 250V
V
DS
= 400V
V
GS
, Gate-Source Voltage [V]
Qg, Total Gate Charge [nC]
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
FDP13N50F / FDPF13N50FT N-Channel MOSFET
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
FDP13N50F / FDPF13N50FT Rev.C1
3
www.fairchildsemi.com
Page 4
FDP13N50F / FDPF13N50FT N-Channel MOSFET
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
*Notes:
1. V
GS
= 0V
2. I
D
= 250μA
BV
DSS
, [Normalized]
Drain-Source Breakdown Voltage
TJ, Junction Temperature [oC]
1 10 100 1000
0.01
0.1
1
10
100
30μs
100μs
1ms
10ms
I
D
, Drain Current [A]
VDS, Drain-Source Voltage [V]
Operation in This Area
is Limited by R
DS(on)
*Notes:
1. T
C
= 25oC
2. T
J
= 150oC
3. Single Pulse
DC
25 50 75 100 125 150
0
2
4
6
8
10
12
14
I
D
, Drain Current [A]
TC, Case Temperature [oC]
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
0.01
0.1
1
0.01
0.1
0.2
0.05
0.02
*Notes:
1. Z
θJC
(t) = 3oC/W Max.
2. Duty Factor, D= t
1/t2
3. TJM - TC = PDM * Z
θJC
(t)
0.5
Single pulse
Thermal Response [Z
θJC
]
Rectangular Pulse Duration [sec]
5
t
1
P
DM
t
2
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. Maximum Safe Operating Area
vs. Temperature - FDPF13N50FT
Figure 9. Maximum Drain Current
vs. Case Temperature
Figure 10. Transient Thermal Response Curve - FDPF13N50FT
FDP13N50F / FDPF13N50FT Rev.C1
4
www.fairchildsemi.com
Page 5
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
FDP13N50F / FDPF13N50FT N-Channel MOSFET
FDP13N50F / FDPF13N50FT Rev.C1
5
www.fairchildsemi.com
Page 6
DUT
V
DS
+
_
Driver
R
G
Same Type
as DUT
V
GS
• dv/dt controlled by R
G
•ISDcontrolled by pulse period
V
DD
L
I
SD
10V
V
GS
( Driver )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
SD
IFM, Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recovery dv/dt
di/dt
D =
Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
V
DS
+
_
Driver
R
G
Same Type
as DUT
V
GS
• dv/dt controlled by R
G
•ISDcontrolled by pulse period
V
DD
LL
I
SD
10V
V
GS
( Driver )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
SD
IFM, Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recovery dv/dt
di/dt
D =
Gate Pulse Width
Gate Pulse Period
--------------------------
D =
Gate Pulse Width
Gate Pulse Period
--------------------------
FDP13N50F / FDPF13N50FT N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
FDP13N50F / FDPF13N50FT Rev.C1
6
www.fairchildsemi.com
Page 7
4.50
±0.20
9.90
±0.20
1.52
±0.10
0.80
±0.10
2.40
±0.20
10.00
±0.20
1.27
±0.10
ø3.60
±0.10
(8.70)
2.80
±0.10
15.90
±0.20
10.08
±0.30
18.95MAX.
(1.70)
(3.70)(3.00)
(1.46)
(1.00)
(45°)
9.20
±0.20
13.08
±0.20
1.30
±0.10
1.30
+0.10
–0.05
0.50
+0.10
–0.05
2.54TYP
[2.54
±0.20
]
2.54TYP
[2.54
±0.20
]
TO-220
Mechanical Dimensions
FDP13N50F / FDPF13N50FT N-Channel MOSFET
FDP13N50F / FDPF13N50FT Rev.C1
7
www.fairchildsemi.com
Page 8
Package Dimensions
FDP13N50F / FDPF13N50FT N-Channel MOSFET
TO-220F Potted
* Front/Back Side Isolation Voltage : AC 2500V
FDP13N50F / FDPF13N50FT Rev.C1
Dimensions in Millimeters
8
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Page 9
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE
SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN,
WHICH COVERS THESE PRODUCTS.
FDP13N50F / FDPF13N50FT N-Channel MOSFET
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
ANTI-COUNTERFEITING POLICY
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Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
FDP13N50F / FDPF13N50FT Rev.C1
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
9
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Rev. I61
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