Datasheet fdp7n50f_fdpf7n50f Datasheet

tm

FDP7N50F / FDPF7N50F

N-Channel MOSFET, FRFET

500V, 6A, 1.15Ω

FDP7N50F / FDPF7N50F N-Channel MOSFET

November 2007

TM

UniFET

Features

•R

• Low gate charge ( Typ. 15nC)

• Low C

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

• RoHS compliant

MOSFET Maximum Ratings T

V

DSS

V

GSS

I

D

I

DM

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
P

D

, T

T

J

T

L

*Drain current limited by maximum junction temperature

= 0.95Ω ( Typ.)@ VGS = 10V, ID = 3A

DS(on)

( Typ. 6.3pF)

rss

G

D

Symbol Parameter FDP7N50F FDPF7N50F Units

Drain to Source Voltage 500 V
Gate to Source Voltage ±30 V

Drain Current
Drain Current - Pulsed (Note 1) 24 24* A

Single Pulsed Avalanche Energy (Note 2) 270 mJ
Avalanche Current (Note 1) 6 A
Repetitive Avalanche Energy (Note 1) 20 mJ

Power Dissipation

STG

Operating and Storage Temperature Range -55 to +150
Maximum Lead Temperature for Soldering Purpose,

1/8” from Case for 5 Seconds

TO-220

S

FDP Series

D

G

S

o

= 25

C unless otherwise noted*

C

-Continuous (T

-Continuous (T

(T

= 25oC) 200 38.5 W

C

- Derate above 25

Description

These N-Channel enhancement mode power field effect transis­tors are produced using Fairchild’s proprietary, planar stripe,
DMOS technology.

This advance technology has been especially tailored to mini­mize on-state resistance, provide superior switching perfor­mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi­cient switching mode power supplies and active power factor
correction.

D

G

TO-220F

FDPF Series

= 25oC) 6 6*

C

= 100oC) 3.6 3.6*

C

o

C 1.59 0.3 W/oC

S

300

o

o

Thermal Characteristics

Symbol Parameter FDP7N50F FDPF7N50F Units

R

θJC
θCS

R

θJA

Thermal Resistance, Junction to Case 1.4 4.0
Thermal Resistance, Junction to Ambient 0.5 ­Thermal Resistance, Junction to Ambient 62.5 62.5

o

C/WR

A

C
C

©2007 Fairchild Semiconductor Corporation
FDP7N50F / FDPF7N50F Rev. A

www.fairchildsemi.com1

FDP7N50F / FDPF7N50F N-Channel MOSFET

Package Marking and Ordering Information T

= 25oC unless otherwise noted

C

Device Marking Device Package Reel Size Tape Width Quantity

FDP7N50F FDP7N50F TO-220 - - 50

FDPF7N50F FDPF7N50F TO-220F - - 50

Electrical Characteristics

Symbol Parameter Test Conditions Min. Typ. Max. Units

Off Characteristics

BV

DSS

∆BV

DSS

∆T

J

I

DSS

I

GSS

On Characteristics

V

GS(th)

R

DS(on)

g

FS

Dynamic Characteristics

C

iss

C

oss

C

rss

Q

g(tot)

Q

gs

Q

gd

Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V, TJ = 25oC 500 - - V
Breakdown Voltage Temperature

Coefficient
Zero Gate Voltage Drain Current
Gate to Body Leakage Current VGS = ±30V, V

I

= 250µA, Referenced to 25oC-0.5-V/

D

V

= 500V, V

DS

= 400V, TC = 125oC - - 100

V

DS

= 0V - - 10

GS

= 0V - - ±100 nA

DS

Gate Threshold Voltage VGS = VDS, ID = 250µA3.0-5.0V
Static Drain to Source On Resistance VGS = 10V, ID = 3A - 0.95 1.15 Ω
Forward Transconductance VDS = 40V, ID = 3A (Note 4) -4.3-S

Input Capacitance
Output Capacitance - 85 115 pF
Reverse Transfer Capacitance - 6.3 10 pF

= 25V, VGS = 0V

V

DS

f = 1MHz

Total Gate Charge at 10V

V

= 400V, ID = 6A

Gate to Source Gate Charge - 4.5 - nC
Gate to Drain “Miller” Charge - 6 - nC

DS

V

= 10V

GS

(Note 4, 5)

- 720 960 pF

-1520nC

µA

o

C

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Turn-On Delay Time
Turn-On Rise Time - 30 70 ns
Turn-Off Delay Time - 35 80 ns
Turn-Off Fall Time - 20 50 ns

Drain-Source Diode Characteristics

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating: Pulse width limited by maximum junction temperature

2. L = 13mH, I
≤ 6A, di/dt ≤ 200A/µs, VDD ≤ BV

3. I

SD

4. Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2%

5. Essentially Independent of Operating Temperature Typical Characteristics

Maximum Continuous Drain to Source Diode Forward Current - - 6 A
Maximum Pulsed Drain to Source Diode Forward Current - - 24 A
Drain to Source Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge - 0.15 - µC

= 6A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C

AS

, Starting TJ = 25°C

DSS

= 250V, ID = 6A

V

DD

R

= 25Ω

G

(Note 4, 5)

= 0V, I

GS

V

= 0V, I

GS

dI

/dt = 100A/µs (Note 4)

F

= 6A - - 1.5 V

SD

= 6A

SD

-1745ns

-85-ns

FDP7N50F / FDPF7N50F Rev. A

2

www.fairchildsemi.com

Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

28

10

1

V

= 10.0 V

GS

8.0 V

7.0 V

6.5 V

6.0 V

5.5 V

20

10

150oC

25oC

FDP7N50F / FDPF7N50F N-Channel MOSFET

,Drain Current[A]

D

I

0.1

0.04

0.1 1 10

*Notes:

1. 250

2. T

= 25oC

C

VDS,Drain-Source Voltage[V]

µs Pulse Test

20

,Drain Current[A]

D

I

*Notes:

= 20V

1. V

DS

µs Pulse Test

1

5678910

2. 250

VGS,Gate-Source Voltage[V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current

and Temperature

2.4

1.8

[Ω],

DS(ON)

R

1.2

VGS = 10V

VGS = 20V

Drain-Source On-Resistance

0.6
0481216

*Note: TJ = 25oC

ID, Drain Current [A]

100

10

150oC

25oC

1

, Reverse Drain Current [A]

S

I

0.1

0.0 0.5 1.0 1.5 2.0

*Notes:

1. VGS = 0V

2. 250

µs Pulse Test

VSD, Body Diode Forward Voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

1500

C

oss

1200

C

iss

900

600

C

Capacitances [pF]

300

FDP7N50F / FDPF7N50F Rev. A

rss

0

0.1 1 10
VDS, Drain-Source Voltage [V ]

C

= Cgs + Cgd (Cds = shorted)

iss

C

= Cds + C

oss

C

rss

= C

gd

gd

*Note:

1. V

2. f = 1MH z

10

8

= 0V

GS

6

VDS = 100V
V

= 250V

DS

= 400V

V

DS

4

, Gate-Source Voltage [V]

GS

V

2

0

30

0481216

*Note: ID = 6A

Qg, Total Ga te C harge [nC ]

3

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Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. Maximum Safe Operating Area
vs. Temperature

1.2

1.1

1.0

, [Normalized]

DSS

BV

0.9

Drain-Source Breakdown Voltage

0.8

-100 -50 0 50 100 150 200
TJ, Junction Temperature [oC]

Figure 9. Maximum Drain Current
vs. Case Temperature - FDPF7N50F

6.0

- FDPF7N50F

50

10

1

Operation in This Area
is Limited by R

DS(on)

0.1

0.01
1 10 100 1000

VDS, Drain-Source Voltage [V]

*Notes:

1. V

2. I

= 0V

GS

= 250µA

D

, Drain Current [A]

D

I

1ms

10ms

100ms

DC

*Notes:

= 25oC

1. T

C

= 150oC

2. T

J

3. Single Pulse

10µs

100µs

FDP7N50F / FDPF7N50F N-Channel MOSFET

4.8

3.6

2.4

, Drain Current [A]

D

I

1.2

0.0
25 50 75 100 125 150

TC, Case Temperature [oC]

Figure 10. Transient Thermal Response Curve - FDPF7N50F

1

10

D=0.5

0

10

0.2

0.1

0.05

-1

0.02

10

0.01

(t), Thermal Response

θJC

Z

-2

10

-5

10

single pulse

-4

10

-3

10

t1, Square W ave Pulse Duration [sec]

-2

10

P

DM

P

DM

t

1

t

* Notes :

1. Z

2. Duty Factor, D=t

3. TJM - TC = PDM * Z

2

(t) = 4.0 oC/W Max.

θJC

-1

10

t

1

t

2

1/t2

(t)

θJC

0

10

1

10

FDP7N50F / FDPF7N50F Rev. A

4

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Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

FDP7N50F / FDPF7N50F N-Channel MOSFET

FDP7N50F / FDPF7N50F Rev. A

Unclamped Inductive Switching Test Circuit & Waveforms

5

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Peak Diode Recovery dv/dt Test Circuit & Waveforms

g

g

+

+

V

V

DS

DS

_

_

L

LL

Sam e Type

Sam e Type

as DUT

as DUT

• dv/dt controlled by R

• dv/dt controlled by R

•ISDcontrolled by pulse period

•ISDcontrolled by pulse period

G

G

V

V

GS

GS

R

R

G

G

DUT

DUT

I

I

SD

SD

Driver

Driver

V

V

DD

DD

FDP7N50F / FDPF7N50F N-Channel MOSFET

V

V

GS

GS

( D riv er )

( D riv er )

I

I

SD

SD

( DUT )

( DUT )

V

V

DS

DS

( DUT )

( DUT )

G ate Pulse W idth

G ate Pulse W idth

G ate Pulse W idth

--------------------------

--------------------------

--------------------------

D =

D =

D =

Gate Pulse Period

Gate Pulse Period

Gate Pulse Period

IFM, Body Diode Forward C urrent

IFM, Body Diode Forward C urrent

I

I

RM

RM

Body Diode Reverse Current

Body Diode Reverse Current

Body Diode Recovery dv/dt

Body Diode Recovery dv/dt

V

V

SD

SD

Body Diode

Body Diode

e Drop

Forward Volta

Forward Volta

e Drop

di/dt

di/dt

10V

10V

V

V

DD

DD

FDP7N50F / FDPF7N50F Rev. A

6

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Mechanical Dimensions

0
5

FDP7N50F / FDPF7N50F N-Channel MOSFET

TO-220

(1.70)

9.20 ±0.2013.08 ±0.20

1.30 ±0.10

(1.46)

(1.00)

1.27 ±0.10

9.90 ±0.20
(8.70)

ø3.60 ±0.10

(3.70)(3.00)

(45°)

1.52 ±0.10

2.80 ±0.1015.90 ±0.20

18.95MAX.

4.50 ±0.20

+0.1

1.30

–0.0

2.54TYP

[2.54

FDP7N50F / FDPF7N50F Rev. A

±0.20]

10.00 ±0.20

0.80 ±0.10

2.54TYP

[2.54

±0.20]

10.08 ±0.30

7

0.50

+0.10
–0.05

2.40 ±0.20

www.fairchildsemi.com

Mechanical Dimensions

0

0

10.16

±0.1

3.30

±0.20

(7.00)

TO-220F

ø3.18

±0.10

±0.20

6.68

2.54
(0.70)

FDP7N50F / FDPF7N50F N-Channel MOSFET

±0.20

±0.20

±0.20

(1.00x45°)

15.87

15.80

MAX1.47

±0.30

0.80

±0.10

9.75

(30°)

#1

0.35

2.54TYP

±0.20

[2.54

±0.10

2.54TYP

]

9.40

±0.20

[2.54

±0.20

±0.20

]

0.50

+0.10
–0.05

2.76

±0.2

4.70

FDP7N50F / FDPF7N50F Rev. A

Dimensions in Millimeters

8

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FDP7N50F / FDPF7N50F N-Channel MOSFET

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or (b)
support or sustain life, and (c) whose failure to perform when
properly used in accordance with instructions for use provided

2. A critical component in any component of a life support,
device, or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.

in the labeling, can be reasonably expected to result in a
significant injury to the user.

PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In Design

This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.

This datasheet contains preliminary data; supplementary data will be pub-

Preliminary First Production

lished at a later date. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve design.

No Identification Needed Full Production

This datasheet contains final specifications. Fairchild Semiconductor reserves
the right to make changes at any time without notice to improve design.

This datasheet contains specifications on a product that has been discontin-

Obsolete Not In Production

ued by Fairchild Semiconductor. The datasheet is printed for reference infor­mation only.

Rev. I31

FDP7N50F / FDPF7N50F Rev. A

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