Datasheet FDP3672 Datasheet (Fairchild)

FDP3672

N-Channel PowerTrench® MOSFET 105V, 41A, 33mΩ

FDP3672

September 2003

Features

•r

•Q

• Low Miller Charge

•Low Q

• Optimized eff iciency at high frequ encies

• UIS Capability (Single Pulse and Repetitive Pulse)

• Qualified to AEC Q101

= 25mΩ (Typ.), V

DS(ON)

(tot) = 28nC (Typ.), V

g

Body Diode

RR

= 10V, ID = 41A

GS

= 10V

GS

Applications

• DC/DC converters and Off-Line UPS

• Distributed Pow er Architectures and VRMs

• Primary Switch for 24V and 48V Systems

• High Voltage Synchronous Re ctifier

• Direct Injection / Diesel Injection Systems

• 42V Automotive Lo ad Control

• Electronic Valve T rain System s

Formerly developmental type 82760

D

DRAIN

(FLANGE)

TO-220AB

FDP SERIES

MOSFET Maximum Ratings T

C

SOURCE

DRAIN

GATE

= 25°C unless otherwise noted

G

S

Symbol Parameter Ratings Units

V

DSS

V

GS

Drain to Source Voltage 105 V Gate to Source Voltage ±20 V Drain Curr e nt Continuous (T

I

D

Continuous (T Continuous (T

= 25oC, VGS = 10V)

C

= 100oC, VGS = 10V) 31 A

C

= 25oC, VGS = 10V, R

amb

= 62oC/W) 5.9 A

θJA

41 A

Pulsed Figure 4 A

E

AS

P

D

, T

T

J

STG

Single Pulse Avalanche Energy (Note 1) 48 mJ Power dissipation 135 W Derate above 25

o

C0.9W/

Operating and Storage Temperature -55 to 175

o

C

o

C

Thermal Characteristi cs

R

θJC

R

θJA

This product ha s been des igned to me et the e xtr eme test c ondit ions and envir onment deman ded by the automot ive indus t ry. For a

All Fairchild Semiconductor prod ucts are manufactured, assembled and tested under ISO9000 and QS9000 quality systems

Thermal Resistance Junction to Case TO-220 1.11 Thermal Resistance Junction t o Ambient TO-220 (No te 2) 62

Reliability data can be found at: http://www.fairchildsemi.com/products/discrete/reliability/index.html.

copy of the requirements, see AEC Q101 at: http://www.aecouncil.com/

certification.

FDP3672 Rev. A3

o

C/W

o

C/W

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

FDP3672 FDP3672 TO-220AB Tube N/A 50 units

FDP3672

Electrical Characteristics

TC = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

B I

DSS

I

GSS

VDSS

Drain t o Source Breakdown Volta ge ID = 250µA, VGS = 0V 105 - - V

V

= 80V - - 1

Zero Gate Voltage Drain Current

DS

= 0V TC= 150oC- - 250

V

GS

Gate to Source Leakage Current VGS = ±20V - - ±100 nA

On Characteristics

V

GS(TH)

r

DS(ON)

Gate to Source Threshold Voltage VGS = VDS, ID = 250µA2-4V

I

Drain to Source On Resistance

= 41A, V

D

I

= 21A, VGS = 6V, - 0.031 0.055

D

I

= 41A, V

D

T

= 175oC

C

= 10V - 0.025 0.033

GS

= 10V ,

GS

- 0.063 0.070

Dynamic Characteristics

C C C Q Q Q Q Q

ISS OSS RSS

g(TOT) g(TH) gs gs2 gd

Input Capacitance Output Capacitance - 240 - pF Reverse Transfer Capacitance - 55 - pF

= 25V, VGS = 0V,

V

DS

f = 1MHz

Total G ate Ch arg e at 10 V VGS = 0V to 10V Threshold Gate Charge VGS = 0V to 2V - 3.9 5 nC Gate to Source Gate Charge - 12 - nC Gate Charge Threshold to Plateau - 8.0 - nC

V

DD

I

= 41A

D

I

= 1.0m A

g

= 50V

Gate to Drain “Miller” Charge - 6.5 - nC

-1670- pF

-2837nC

µA

Ω

Resistive Switching Characteristics

t

ON

t

d(ON)

t

r

t

d(OFF)

t

f

t

OFF

Turn-On Time Turn-On Delay Time - 12 - ns Rise Time - 48 - ns T u rn-Off Delay Time - 24 - ns Fall Time - 27 - ns Turn-Off Time - - 77 ns

(VGS = 10V)

V

DD

V

GS

--90ns

= 50V, ID = 41A = 10V, RGS = 11.0Ω

Drain-Source Diode Characteristics

I

= 41A - - 1 .25 V

V

SD

t

rr

Q

RR

Notes: 1: Starting T 2: Pulse Width = 100s

Source to Drain Di ode Voltage Reverse Recovery Time ISD = 41A, dISD/dt =100A/µs- - 39ns

Reverse Recovered Charge ISD = 41A, dISD/dt =100A/µs- - 42nC

= 25°C, L = 0.11mH, IAS = 30A.

J

SD

= 21A - - 1.0 V

I

SD

FDP3672

Typical Characteristics T

= 25°C unless otherwise noted

C

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0255075100 175

125

TC, CASE TEMPERATURE (oC)

Figure 1. Normalized Power Dissipation vs

Ambient Temperature

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

150

50

V

= 10V

GS

40

30

20

, DRAIN CURRENT (A)

D

I

10

0

25 50 75 100 125 150 175

TC, CASE TEMPERATURE (oC)

Figure 2. Maximum Continuous Drain Curr ent vs

Case Temperature

, NORMALIZED Z

, PEAK CURRENT (A) I

θJC

DM

THERMAL IMPEDANCE

500

100

30

0.1

0.01

10

-5

10

VGS = 10V

-5

SINGLE PULSE

-4

10

-3

10

-2

10

NOTES: DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-1

10

t, RECTANGULAR PULSE DURATION (s)

Figure 3. Normalized Maximum Transient Thermal Impedance

TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION

-4

10

-3

10

t, PULSE WIDTH (s)

-2

10

-1

10

TC = 25oC

FOR TEMPERATURES ABOVE 25 CURRENT AS FOLLOWS:

I = I

P

DM

1/t2

x R

θJC

0

10

o

25

0

10

t

1

t

2

+ T

θJC

C

C DERATE PEAK

175 - T

C

150

1

10

1

10

Figure 4. Peak Current Capability

Typical Characteristics T

= 25°C unless otherwise noted

C

FDP3672

200 100

10

OPERATION IN THIS

AREA MAY BE

LIMITED BY r

1

, DRAIN CURRENT (A)

D

I

SINGLE PULSE TJ = MAX RATED

= 25oC

T

C

0.1 1 10 100

DS(ON)

VDS, DRAIN TO SOURCE VOLTAGE (V)

10µs

100µs

1ms

10ms

DC

Figure 5. Forward Bias Safe Operating Area

80

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

V

= 15V

DD

60

40

TJ = 25oC

20

, DRAIN CURRENT (A)

D

I

0

3.5 4.0 4.5 5.0 5.5 6.0 6.5 VGS, GATE TO SOURCE VOLTAGE (V)

TJ = 175oC

TJ = -55oC

200

If R = 0

200

tAV = (L)(IAS)/(1.3*RATED BV

100

≠

0

If R

= (L/R)ln[(IAS*R)/(1.3*RATED BV

t

AV

10

, AVALANCHE CURRENT (A)

AS

I

STARTING TJ = 150oC

1

0.001

0.01 0.1 1 10 tAV, TIME IN AVALANCHE (ms)

- VDD)

DSS

- VDD) +1]

DSS

START ING TJ = 25oC

NOTE: Refer to Fairchild Application Notes AN7514 and AN7515

Figure 6. Unclamped Inductive Switching

Capability

80

TC = 25oC

60

40

, DRAIN CURRENT (A)

20

D

I

0

0 0.5 1.0 1.5 2.0 2.5 3.0

VGS = 10V

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

VGS = 5V

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 7V

VGS = 6V

Figure 7. Transfer Characteristics Figure 8. Saturation Characteristics

40

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

35

30

25

20

15

DRAIN TO SOURCE ON RESISTANCE (m Ω)

0 1020304050

VGS = 6V

VGS = 10V

I

, DRAIN CURRENT (A)

D

Figure 9. Drain to So urce On Resistanc e v s Drai n

Current

2.5

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

2.0

1.5

ON RESISTANCE

1.0

NORMALIZED DRAIN TO SOURCE

0.5

-80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)

VGS = 10V, ID = 41A

Figure 10. Normalized Drain to Source On

Resistance vs Junction Temperature

FDP3672

Typical Characteristics T

1.2

1.0

0.8

NORMALIZED GATE

0.6

THRESHOLD VOLTAGE

0.4

-80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)

= 25°C unless otherwise noted

C

VGS = VDS, ID = 250µA

Figure 11. Normalized G ate Threshol d Voltage vs

Junction Temperatur e

3000

C

= CGS + C

1000

100

ISS

C

≅ C

+ C

OSS

DS

GD

C

= C

RSS

GD

1.2 ID = 250µA

1.1

1.0

BREAKDOWN VOLTA GE

NORMALIZED DRAIN TO SOURCE

0.9

-80 -40 0 40 80 120 160 200 T

, JUNCTION TEMPERATURE (oC)

J

Figure 12. Normalized Drain to Source

Breakdown Voltage vs Junction Temperature

10

VDD = 50V

8

6

4

C, CAPACITANCE (pF)

V

= 0V, f = 1MHz

GS

10

0.1 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 13. Capacitance vs Drain to Sour ce

Voltage

2

, GATE TO SOURCE VOLTAGE (V)

GS

V

0

0 5 10 15 20 25 30

Qg, GATE CHARGE (nC)

WAVEFORMS IN DESCENDING ORDER:

ID = 41A I

= 6A

D

Figure 14. Gat e Charge Waveforms for Constant

Gate Currents

Test Circuits and Waveforms

FDP3672

BV

DSS

t

P

V

DS

TO OBTAIN

VARY t

P

REQUIRED PEAK I

V

GS

V

DS

L

I

AS

R

AS

G

+

V

DD

-

DUT

t

0V

P

I

AS

0.01Ω

0

t

AV

Figure 15. Unclamped Energy Test Circuit Figure 16. Unclamped Energy Wavef orm s

V

I

g(REF)

DS

L

V

GS

+

V

DD

-

DUT

Q

V

0

g(TH)

I

g(REF)

0

DD

V

GS

V

= 2V

GS

Q

gs2

Q

gs

Q

g(TOT)

V

DS

Q

gd

V

DD

V

= 10V

GS

Figure 17. Gate Charge Test Circuit Figure 18. Gate Charge Waveforms

V

DS

R

L

V

GS

R

GS

V

GS

DUT

+

V

DD

-

V

DS

0

V

GS

10%

0

t

d(ON)

90%

t

ON

t

r

t

d(OFF)

t

OFF

t

f

90%

10%

90%

PULSE WIDTH

50%50%

Figure 19. Switching Time Test Circuit Figure 20. Switching Time Waveforms

PSPICE Electrical Model

.SUBCKT FDP 3672 2 1 3 ; rev October 2002 Ca 12 8 5.8e-10 Cb 15 14 6.8e-10 Cin 6 8 1.6e-9

Dbod y 7 5 DbodyMOD Dbreak 5 11 Db reakMOD Dplcap 10 5 DplcapMOD

Ebreak 11 7 17 18 105 Eds 14 8 5 8 1 Egs 13 8 6 8 1 Esg 6 10 6 8 1

ESG

Evthres 6 21 19 8 1 Evtemp 20 6 18 22 1

It 8 17 1 Lgat e 1 9 9.56e-9

GATE

1

LGATE

RLGATE

RGATE

9

EVTEMP +

20

18 22

Ldrain 2 5 1.0e -9 Lsource 3 7 4.45e-9

RLgate 1 9 95.6 RLdr ai n 2 5 10 RLsource 3 7 44.5

Mmed 16 6 8 8 M m edMOD Mstro 16 6 8 8 MstroMOD Mweak 16 21 8 8 MweakMOD

CA

S1A

12

S1B

Rbreak 17 18 RbreakMOD 1 Rdrain 50 16 RdrainMOD 6.0e-3 Rgate 9 20 1.5 RSLC1 5 51 RSL CM OD 1.0e-6 RSLC2 5 50 1.0e 3 Rsource 8 7 RsourceMOD 9.5e-3 Rvthres 22 8 RvthresMO D 1 Rvtemp 18 19 RvtempMOD 1 S1a 6 12 13 8 S1AMOD S1b 13 12 13 8 S1BM OD S2a 6 15 14 13 S2AM OD S2b 13 15 14 13 S2BM OD

Vbat 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51))) *(PWR(V(5,51)/(1e-6 *98),3))}

.MODEL DbodyMOD D (IS=1.0E-11 N=1.05 RS=3.7e-3 TRS1=2.5e-3 TRS2=1.0e-6 + CJO=1.2e-9 M= 0.58 TT=3.75e -8 XTI=4.0) .MODEL Db reakMOD D (RS= 15 T RS 1=4.0e-3 TRS 2=-5.0e-6) .MODEL DplcapMOD D (CJO=3.8e-10 IS=1.0e-30 N=10 M=0.60)

.MODEL MmedMOD NMOS (VTO=3.6 KP=3 IS=1e-40 N=10 TOX=1 L=1u W=1u RG=1.5) .MODEL MstroMOD NMOS (VTO =4.3 KP=59 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL Mwe akMOD NMOS (VTO =3.09 KP=0. 05 IS=1e-30 N= 10 T OX=1 L=1u W=1u RG=15 RS=0.1)

DPLCAP

10

RSLC2

6

8

EVTHRES

+

19

6

-

S2A

13

14

8

13

S2B

13

+

6

EGS EDS

8

-

5

RSLC1

51

+

5

ESLC

51

50

RDRAIN

16

21

-

8

MSTRO

CIN

15

CB

8

14

+

5 8

-

MMED

8

DBREAK

EBREAK

MWEAK

RSOURCE

RBREAK

17 18

IT

RVTHRES

FDP3672

LDRAIN

RLDRAIN

11

+

17

DBODY

18

-

LSOURCE

7

RLSOURCE

RVTEMP 19

VBAT

+

22

DRAIN

2

SOURCE

3

.MODEL Rb reakMOD RES (T C1=9.0e-4 TC2=-1.0e-7) .MODEL Rd rai nMOD RES (TC1=11.0e-3 TC2= 6.1e-5) .MODEL RSLCMOD RES (TC1=3.0e-3 TC2=1.0e-6) .MODEL RsourceMOD RES (TC1=4.0e-3 TC 2=1.0e-6) .MODEL RvthresMOD RES (TC1=-3.5e -3 T C2=-1.5e-5 ) .MODEL RvtempMOD RES (T C1=-4.3e-3 TC2=1.5e-6)

.MODEL S1AMOD VSWITC H (RON =1e - 5 ROFF= 0. 1 VON=- 5. 0 VOFF =-3 .5 ) .MODEL S1BMOD VSWITC H (RON =1e - 5 ROFF= 0. 1 VON=- 3. 5 VOFF =-5 .0 ) .MODEL S2AMOD VSWITC H (RON= 1e- 5 ROFF = 0.1 VON= - 0.5 VO FF=0.3) .MODEL S2BMOD VSWITC H (RON= 1e- 5 ROFF = 0.1 VON= 0 .3 VOFF= -0.5)

.ENDS Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global

Temperature Options; IEEE Power Electroni cs Specialist Conference Records, 1991, written by Wil liam J. Hepp and C. F rank Wheatley.

SABER Electrical Model

REV October 2002 template FDP3672 n2,n1,n3 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (isl=1.0e-11,nl=1.05,rs=3.7e-3,trs1=2.5e-3,trs2=1.0e-6,cjo=1.2e-9,m=0.58,tt=3.75e-8,xti=4.0) dp..model dbreakmod = (rs=15,trs1=4.0e-3,trs2=-5. 0e-6) dp..model dplcapmod = (cjo=3.8e-10,isl=10.0e-30,nl=10,m=0.60) m..model mmedmod = (type=_n,vto=3.6,kp=3,is=1e-40, tox=1) m..model mstrongmod = (type=_n,vto=4.3,kp=59,is=1e-30, tox=1) m..model mweakmod = (type=_n,vto=3.09,kp=0.05,is=1e-30, tox=1,rs=0.1) sw_vcsp.. mo del s1amod = (ron=1e-5,roff=0. 1, von=-5.0,voff=-3.5) sw_vcsp.. mo del s1bmod = (ron=1e-5,roff=0. 1, von=-3.5,voff=-5.0) sw_vcsp.. mo del s2amod = (ron=1e-5,roff=0.1,von=-0.5, vof f = 0. 3) sw_vcsp.. mo del s2bmod = (ron=1e-5,roff=0.1,von=0.3,voff=-0.5) c.ca n12 n8 = 5.8e -10 c.cb n15 n14 = 6.8e-10 c.cin n6 n8 = 1.6e -9

dp.dbody n7 n5 = model=dbodym od dp.dbreak n5 n11 = model=dbr eakmod dp.dplcap n10 n5 = model=dplcapmod

spe.ebreak n11 n7 n17 n18 = 105 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1

GATE

spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1

LGATE

1

9

RLGATE

RGATE

ESG

EVTEMP +

18 22

20

spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n1 n9 = 95 .6 e-9

S1A

12

l.ldrain n2 n5 = 1.0e-9 l.lsource n3 n7 = 4.45e-9

res.rlgate n1 n9 = 9.56 res.rldrai n n2 n5 = 10 res.rlsource n3 n7 = 44.5

S1B

CA

EGS EDS

m.mmed n16 n6 n8 n8 = m odel=mmedm od, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l= 1u, w=1u m.mweak n16 n21 n8 n8 = model=mwea kmod, l=1u, w=1u

DPLCAP

10

RSLC2

6

8

EVTHRES

+

6

-

S2A

13

14

8

13

S2B

13

+

6 8

-

5

RSLC1

51

ISCL

8

MMED

8

DBREAK

11

MWEAK

EBREAK

+

RSOURCE

RBREAK

17 18

IT

RVTHRES

50 RDRAIN

16

21

-

19

8

MSTRO

CIN

15

CB

14

+

5 8

-

17 18

7

RVTEMP 19

-

+

22

LDRAIN

RLDRAIN

DBODY

LSOURCE

RLSOURCE

VBAT

DRAIN

2

SOURCE

3

FDP3672

res.rbreak n17 n18 = 1, tc1=9.0e- 4,tc2=-1.0e -7 res.rdrain n50 n16 = 6.0e-3, tc 1=11.0e-3,tc2=6.1e-5 res.rgate n9 n20 = 1.5 res.rslc1 n5 n51 = 1.0e-6, tc1=3.0e-3,tc2 =1.0e-6 res.rslc2 n5 n50 = 1.0e3 res.rsour ce n8 n7 = 9.5e-3, tc1 =4.0e-3,tc2=1 .0 e-6 res.rvthres n22 n8 = 1, tc1=-3.5e-3,tc2=-1. 5e-5 res.rvtemp n18 n19 = 1, tc1=-4.3e-3,tc2=1.5e-6 sw_vcsp.s1 a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1 b n13 n12 n13 n8 = mode l= s1bmod sw_vcsp.s2 a n6 n15 n14 n13 = mode l= s2amod sw_vcsp.s2 b n13 n15 n14 n13 = model = s2bmod

v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5 ,n51))))*(( abs(v(n5,n51)*1e6/98) )** 3)) }

FDP3672

SPICE Thermal Model

REV October 2002 FDP3672 CTHERM1 TH 6 3.2e-3

CTHERM2 6 5 3. 3e-3 CTHERM3 5 4 3. 4e-3 CTHERM4 4 3 3. 5e-3 CTHERM5 3 2 6. 4e-3 CTHERM6 2 TL 1.9e-2

RTHERM1 TH 6 5.5e-4 RTHERM2 6 5 5. 0e-3 RTHERM3 5 4 4. 5e-2 RTHERM4 4 3 10.5e-2 RTHERM5 3 2 3. 4e-1 RTHERM6 2 TL 3.5e-1

SABER Thermal Model

SABER therm al m odel F DP3672 template thermal_model th tl thermal_ c th , tl { cctherm.ctherm1 th 6 =3.2e-3 ctherm.ctherm2 6 5 =3.3e-3 ctherm.ctherm3 5 4 =3.4e-3 ctherm.ctherm4 4 3 =3.5e-3 ctherm.ctherm5 3 2 =6.4e-3 ctherm.ctherm6 2 tl =1.9e-2

rtherm.rtherm1 th 6 =5.5e-4 rtherm.rt herm2 6 5 =5.0e-3 rtherm.rt herm3 5 4 =4.5e-2 rtherm.rt he rm4 4 3 =10. 5 e-2 rtherm.rt herm5 3 2 =3.4e-1 rthe r m.rtherm6 2 tl =3.5 e-1 }

RTHERM1

RTHERM2

RTHERM3

RTHERM4

RTHERM5

JUNCTION

th

CTHERM1

6

CTHERM2

5

CTHERM3

4

CTHERM4

3

CTHERM5

RTHERM6

2

CTHERM6

CASE

tl

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

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

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

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1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Formative or In Design

First Production

Full Production

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. I5