Datasheet FDMC8200 Datasheet (Fairchild)

FDMC8200

Dual N-Channel PowerTrench® MOSFET

30 V, 9.5 mΩ and 20 mΩ

FDMC8200 Dual N-Channel PowerTrench

June 2009

Features

Q1: N-Channel

 Max r  Max r

Q2: N-Channel

 Max r  Max r  RoHS Compliant

Pin 1

= 20 mΩ at VGS = 10 V, ID = 6 A

DS(on)

= 32 mΩ at VGS = 4.5 V, ID = 5 A

DS(on)

= 9.5 mΩ at VGS = 10 V, ID = 9 A

DS(on)

= 13.5 mΩ at VGS = 4.5 V, ID = 7 A

DS(on)

G1

D1

BOTTOM

D1

D2/S1

G2

S2

Power 33

General Description

This device includes two specialized N-Channel MOSFETs in a dual Power33 (3mm x 3mm MLP) package. The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous MOSFET (Q2) have been designed to provide optimal power efficiency.

Applications

 Mobile Computing  Mobile Internet Devices  General Purpose Point of Load

N

I

V

N

I

V

N

I

V

S

H

G

N

I

V

T

I

W

S

E

D

O

N

H

C

G

D

N

G

D

N

G

S

L

G

S2 S2 S2

D

N

G2

Q2

5

5 6

6 7

7 8

8

Q1

D1

4

D1

3

D1

2

G1

1

BOTTOM

®

MOSFET

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

C

Symbol Parameter Q1 Q2 Units

V

DS

V

GS

Drain to Source Voltage 30 30 V Gate to Source Voltage (Note 3) ±20 ±20 V Drain Current - Continuous (Package limited) TC = 25 °C 18 18

I

D

- Continuous (Silicon limited) T

- Continuous T

= 25 °C 23 45

C

= 25 °C 8

A

1a

12

1b

A

- Pulsed 40 40

P

D

TJ, T

STG

Power Dissipation TA = 25 °C 1.9 Power Dissipation T

= 25 °C 0.7

A

1a 1c

Operating and Storage Junction Temperature Range -55 to +150 °C

2.2

0.9

1b 1d

W

Thermal Characteristics

R

θJA θJA

R

θJC

Thermal Resistance, Junction to Ambient 65 Thermal Resistance, Junction to Ambient 180 Thermal Resistance, Junction to Case 7.5 4

1a

1c

55

145

1b

1d

°C/WR

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

FDMC8200 FDMC8200 Power 33 13 ” 12 mm 3000 units

FDMC8200 Dual N-Channel PowerTrench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Type Min Typ Max Units

Off Characteristics

BV

∆BV ∆T

I

DSS

I

GSS

DSS

DSS J

= 250 µA, VGS = 0 V

Drain to Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient Zero Gate Voltage Drain Current

D

I

= 250 µA, VGS = 0 V

D

ID = 250 µA, referenced to 25 °C I

= 250 µA, referenced to 25 °C

D

V

= 24 V, V

DS

V

= 24 V, V

DS

Gate to Source Leakage Current VDS = 20 V, V

GS GS

GS

= 0 V = 0 V

= 0 V

Q1Q230

30

Q1 Q2

V

14 14

mV/°C

1 1

100 100nAnA

I

On Characteristics

V

GS(th)

∆V ∆T

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

Forward Transconductance

= VDS, ID = 250 µA

GS

V

= VDS, ID = 250 µA

GS

ID = 250 µA, referenced to 25 °C I

= 250 µA, referenced to 25 °C

D

= 10 V, ID = 6 A

V

GS

V

= 4.5 V, ID = 5 A

GS

V

= 10 V, ID = 6 A, TJ = 125 °C

GS

V

= 10 V, ID = 9 A

GS

V

= 4.5 V, ID = 7 A

GS

V

= 10 V, ID = 9 A, TJ = 125 °C

GS

V

= 5 V, ID = 6 A

DD

V

= 5 V, ID = 9 A

DD

Q1Q21.0

1.0

Q1 Q2

Q1

Q2

Q1 Q2

2.3

-5

-6

16 24 22

7.3

9.5 10

29 56

3.0

3.0 mV/°C

20 32 28

9.5

13.5 13

µA

V

mΩ

S

®

MOSFET

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Gate Resistance

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

g(TOT)

Q

g(TOT)

Q

gs

Q

gd

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Total Gate Charge VGS = 0 V to 10 V

Total Gate Charge VGS = 0 V to 4.5 V

Gate to Source Charge

Gate to Drain “Miller” Charge

495

= 15 V, VGS = 0 V, f = 1 MHZ

V

DS

Q1 Q2

1180

145 330

20 30

1.4

660

1570

195 440

30 45

pF

Ω

11

Q1 V

= 15 V, ID = 1 A,

DD

V

= 10 V, R

GS

Q2

= 15 V, ID = 1 A,

V

DD

V

= 10 V, R

GS

GEN

= 6 Ω

Q1: V I

D

Q2: V I

D

= 15 V,

DD

= 6 A,

= 15 V,

DD

= 9 A,

Q1 Q2

3.1410

1.3610

7.31610

3.174.3

1.8

4.1

1.5

13

35 38

20

ns

23

ns

10 56

ns

60

ns

12

nC

22

nC

10

nC

1

nC

FDMC8200 Dual N-Channel PowerTrench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Type Min Typ Max Units

Drain-Source Diode Characteristics

0.8

V

SD

t

rr

Q

rr

Notes:

1. R

is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

θJA

by the user's board design.

Source to Drain Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

a.65 °C/W when mounted on a 1 in

c. 180 °C/W when mounted on a minimum pad of 2 oz copper

V

GS

V

GS

Q1

= 6 A, di/dt =

I

F

Q2

= 9 A, di/dt =

I

F

2

pad of 2 oz copper

= 0 V, IS = 6 A (Note 2) = 0 V, IS = 9 A (Note 2)Q1Q2

100 A/μs

Q1 Q2

is guaranteed by design while R

θJC

b.55 °C/W when mounted on

2

a 1 in

pad of 2 oz copper

d. 145 °C/W when mounted on a minimum pad of 2 oz copper

1.2

0.8

1.2

13

24

21

34

2.3

5.61012

θCA

is determined

V

ns

nC

®

MOSFET

2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.

3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.

FDMC8200 Dual N-Channel PowerTrench

Typical Characteristics (Q1 N-Channel) T

40

30

20

DRAIN CURRENT (A)

10

,

D

I

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0

Figure 1.

1.6

ID = 6 A V

GS

VGS = 4.5 V

VGS = 4 V

VGS = 3.5 V

V

,

DRAIN TO SOURCE VOLTAGE (V)

DS

On Region Characteristics Figure 2.

= 10 V

1.4

1.2

NORMALIZED

1.0

DRAIN TO SOURCE ON-RESISTANCE

0.8

-75 -50 -25 0 25 50 75 100 125 150

T

,

JUNCTION TEMPERATURE

J

VGS = 10 V VGS = 6 V

PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX

o

(

C

)

= 25 °C unless otherwise noted

J

4

3

VGS = 3.5 V

2

NORMALIZED

1

DRAIN TO SOURCE ON-RESISTANCE

0

0 10203040

I

,

D

Nor mal ize d On -Resista nce

vs Drain Current and Gate Voltage

100

)

Ω

m

80

(

60

DRAIN TO

,

40

DS(on)

r

20

TJ = 25 oC

SOURCE ON-RESISTANCE

0

246810

V

,

GS

PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX

V

= 4 V

GS

VGS = 4.5 V

VGS = 6 V

DRAIN CURRENT (A)

TJ = 125 oC

GATE TO S OURCE VOLTAGE (V)

PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX

ID = 6 A

V

GS

= 10 V

®

MOSFET

Figure 3 . N ormaliz ed On Resis ta nce

vs Junction Temperature

40

PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX

30

V

= 5 V

DS

20

10

, DRAIN CURRENT (A)

D

I

0

2.0 2.5 3.0 3.5 4.0 4.5

TJ = 150 oC

TJ = 25 oC

TJ = -55 oC

VGS, GATE TO SOURCE V OLTAGE (V)

Figure 5. Transfer Characteristics

Figure 4.

On-Resistance vs Gat e to

Source Voltage

40

V

= 0 V

GS

10

1

TJ = 150 oC

0.1

0.01

, REVERSE DRAIN CURRENT (A)

S

I

0.001

0.2 0.4 0.6 0.8 1.0 1.2

VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 6.

Sourc e to Drain Diode

TJ = 25 oC

TJ = -55 oC

Forward Voltage vs Source Current

FDMC8200 Dual N-Channel PowerTrench

Typical Characteristics (Q1 N-Channel) T

10

ID = 6 A

8

V

= 15 V

DD

6

4

VDD = 10 V

2

, GATE TO SOURCE VOLTAGE (V)

GS

V

0

02468

Figure 7.

Qg, GATE CHARGE (nC)

Gate Charge Characteristics Figure 8.

100

10

1

THIS AREA IS LIMITED BY r

0.1

SINGLE PULSE

, DRAIN CURRENT (A)

D

I

0.01

0.001

= MAX RATED

T

J

R

θ

JA

T

= 25 oC

C

0.01 0.1 1 10 100200

DS(on)

= 180 oC/W

VDS, DRAIN to SOURCE VOLTAGE (V)

VDD = 20 V

100 us 1 ms

10 ms 100 ms 1 s

10 s

DC

= 25 °C unless otherwise noted

J

1000

100

CAPACITANCE (pF)

f = 1 MHz

= 0 V

V

GS

10

0.1 1 10 30

VDS, DRAIN TO SOURCE VOLTAGE (V)

Cap aci t anc e vs Dra i n

to Source Voltage

25

20

15

Limited by P ack ag e

10

DRAIN CURRENT (A)

,

D

I

5

0

25 50 75 100 125 150

T

,

CASE TEMPERATURE

c

C

iss

C

oss

C

rss

®

MOSFET

R

= 7.5 oC/W

θ

JC

V

= 10 V

GS

V

= 4.5 V

GS

o

(

C

)

Figure 9.

Forward Bias Safe

Operating Area

Figure 10.

Maximum Continuous Drain Current

vs Case Temperature

300

100

VGS = 10 V

10

, PEAK TRANSIENT POWER (W)

1

(PK)

P

0.5

-4

10

-3

10

-2

10

-1

10

t, PULSE WIDTH (s)

110

SINGLE PULSE R

= 180 oC/W

θ

JA

T

= 25 oC

A

100 1000

Figure 11. Single Pulse Maximum Power Dissipation

FDMC8200 Dual N-Channel PowerTrench

Typical Characteristics (Q1 N-Channel) T

2

DUTY CYCLE-DESCENDING ORDER

1

D = 0.5

0.1

0.01

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE R

= 180 oC/W

θ

JA

-4

10

-3

10

Figure 12.

-2

10

t, RECTANGULAR PULSE DURATION (sec)

Junction-to-Ambient Transient Thermal Response Curve

JA

θ

Z

IMPEDANCE,

NORMALIZED THERMAL

0.003

= 25 °C unless otherwise noted

J

NOTES: DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-1

110

P

DM

t

1

t

2

1/t2

x R

+ T

θJA

A

100 1000

®

MOSFET

FDMC8200 Dual N-Channel PowerTrench

Typical Characteristics (Q2 N-Channel)

40

30

20

DRAIN CURRENT (A)

10

,

D

I

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0

Figure 13. On-Region Characteristics

1.6

1.4

1.2

1.0

NORMALIZED

0.8

DRAIN TO SOURCE ON-RESISTANCE

0.6

-75 -50 -25 0 25 50 75 100 125 150

VGS = 3.5 V

VGS = 3 V

V

DS

ID = 9 A V

= 10 V

GS

VGS = 10 V

VGS = 4.5 V

VGS = 4 V

PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX

,

DRAIN TO SOURCE VOLTAGE (V)

T

,

JUNCTION TEMPERATURE

J

o

(

C

)

TJ = 25 °C unless otherwise noted

6

5

VGS = 3 V

4

3

2

NORMALIZED

V

1

DRAIN TO SOURCE ON-RESISTANCE

0

0 10203040

I

,

DRAIN CURRENT (A)

D

Figure 14. Normalized on-Resistance vs Drain

Current and Gate Voltage

60

)

Ω

50

m

(

40

30

DRAIN TO

,

20

DS(on)

r

10

SOURCE ON-RESISTANCE

TJ = 25 oC

0

246810

TJ = 125 oC

V

,

GATE TO SOURCE VOLTAGE (V)

GS

PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX

= 3.5 V

GS

VGS = 4 V

PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX

ID = 9 A

VGS = 4.5 V

V

= 10 V

GS

®

MOSFET

Figure 15. Normalized On-Resistance

vs Junction Temperature

40

PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX

, DRAIN CURRENT (A) I

30

20

10

D

V

= 5 V

DS

TJ = 150 oC

TJ = 25 oC

TJ = -55 oC

0

1.5 2.0 2.5 3.0 3.5 4.0

VGS, GATE TO SOURCE V OLTAGE (V)

Figure 17. Transfer Characteristics

Figure 16. On-Resistance vs Gate to

Source Voltage

40

V

= 0 V

GS

10

0.01

, REVERSE DRAIN CURRENT (A)

S

I

0.001

1

0.1

TJ = 150 oC

TJ = -55 oC

0.0 0.2 0.4 0.6 0.8 1.0 1.2

VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 18. Source to Drain Diode

TJ = 25 oC

Forward Voltage vs Source Current

FDMC8200 Dual N-Channel PowerTrench

Typical Characteristics (Q2 N-Channel) T

10

ID = 9 A

= 25 °C unless otherwise noted

J

2000 1000

8

V

= 15 V

DD

6

4

VDD = 10 V

2

, GATE TO SOURCE VOLTAGE ( V)

GS

V

0

0369121518

Qg, GATE CHARGE (nC)

VDD = 20 V

100

CAPACITANCE (pF)

f = 1 MHz

= 0 V

V

GS

10

0.1 1 10 30

VDS, DRAIN TO SOURCE VOL TA G E (V)

Figu re 1 9. G ate Cha r ge C har a cte r ist i cs Fi gure 20. C apa c ita n ce v s Dra i n

to Source Voltage

100

10

1

, DRAIN CURRENT (A)

D

I

0.01

THIS A REA IS

0.1

LIMITED BY r

SINGLE PULSE

= MAX RATED

T

J

R

θ

JA

T

= 25 oC

C

= 145 oC/W

DS(on)

0.01 0.1 1 10 100200

VDS, DRAIN to SOURCE VOLTAGE (V)

100 us

1 ms

10 ms 100 ms

1 s 10 s

DC

50

V

= 10 V

GS

R

40

30

V

= 4.5 V

GS

20

DRAIN CURRENT (A)

,

D

Limited by Package

I

10

0

25 50 75 100 125 150

T

,

CASE TEMPERATURE

c

o

(

θ

JC

C

)

C

iss

C

oss

C

rss

= 4 oC/W

®

MOSFET

Figure 21 . Forw ard Bias Safe

Operating Area

Figure 22. Maximum Continuous Drain

Current vs Case Temperature

1000

VGS = 10 V

100

SINGLE PULSE

= 145 oC/W

R

θ

JA

= 25 oC

T

A

10

, PEAK TRANSIENT POWER (W)

1

(PK)

P

0.5

-4

10

-3

10

-2

10

-1

10

t, PULSE WIDTH (s)

110

100 1000

Figure 22. Single Pulse Maximum Power Dissipation

FDMC8200 Dual N-Channel PowerTrench

Typical Characteristics (Q2 N-Channel) T

2

DUTY CYCLE-DESCENDING ORDER

1

D = 0.5

0.2

0.1

0.01

0.1

0.05

0.02

0.01

SINGLE PULSE

= 145 oC/W

R

θ

JA

-4

10

-3

10

-2

10

t, RECTANGULAR PULSE DURATION (sec)

Figure 23. Junction-to-Ambient Transient Thermal Response Curve

JA

θ

Z

IMPEDANCE,

NORMALIZED THERMAL

0.001

= 25 °C unless otherwise noted

J

NOTES: DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-1

110

P

DM

t

1

t

2

1/t2

x R

+ T

θJA

100 1000

A

®

MOSFET

Dimensional Outline and Pad Layout

FDMC8200 Dual N-Channel PowerTrench

®

MOSFET

TRADEMARKS

®

tm

The following includes registered and unregistered trademarks and service marks, o wned by Fairchild Semiconducto r and/or its g lobal subsidiaries, and i s not intended to be an exhaustive list of all such trademarks.

Auto-SPM™ Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK EfficentMax™ EZSWITCH™ *

™*

Fairchild Fairchild Semiconductor FACT Quiet Series™ FACT FAST FastvCore™ FETBench™ FlashWriter FPS™

®

® ®

®

*

®

F-PFS™ FRFET Global Power Resource Green FPS™ Green FPS™ e-Series™ Gmax™ GTO™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ MotionMax™ Motion-SPM™ OPTOLOGIC OPTOPLANAR

®

PDP SPM™ Power-SPM™

®

SM

PowerTrench PowerXS™ Programmable Active Droop™ QFET QS™ Quiet Series™ RapidConfigure™

Saving our world, 1mW /W /kW at a time™ SmartMax™ SMART START™ SPM STEALTH™ SuperFET™

®

SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SupreMOS™ SyncFET™ Sync-Lock™

®

™

®

The Power Franchise

TinyBoost™ TinyBuck™ TinyLogic TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ TriFault Detect™ TRUECURRENT™*

®

µSerDes™

®

UHC Ultra FRFET™ UniFET™ VCX™ VisualMax™

®*

XS™

*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.

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FDMC8200 Dual N-Channel PowerTrench

®

MOSFET

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As used herein:

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.

2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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Advance Information Formative / In Design

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

Datasheet contains preliminary data; supplement ary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design.

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Rev. I40