Datasheet FDMC7696 Datasheet (Fairchild)

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Page 1

FDMC7696

D D

Bottom

Top

MLP 3.3x3.3

Pin 1

N-Channel PowerTrench® MOSFET

30 V, 12 A, 11.5 mΩ Features

 Max r  Max r  High performance technology for extremely low r  Termination is Lead-free and RoHS Compliant

= 11.5 mΩ at VGS = 10 V, ID = 12 A

DS(on)

= 14.5 mΩ at VGS = 4.5 V, ID = 10 A

DS(on)

General Description

This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced Power Trench been especially tailored to minimize the on-state resistance.This device is well suited for Power Management and load switching applications common in Notebook Computers and Portable Battery Packs.

November 2011

process that has

FDMC7696 N-Channel PowerTrench

Applications

 DC/DC Buck Converters  Notebook battery power management  Load Switch in Notebook

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

, T

STG

Thermal Characteristics

Drain to Source Voltage 30 V Gate to Source Voltage (Note 4) ±20 V Drain Current -Continuous (Package limited) TC = 25°C 20

-Continuous (Silicon limited) T

-Continuous T

-Pulsed 50 Single Pulse Avalanche Energy (Note 3) 21 mJ Power Dissipation TC = 25°C 25 Power Dissipation T Operating and Storage Junction Temperature Range -55 to +150 °C

= 25 °C unless otherwise noted

= 25°C 38

= 25°C (Note 1a) 12

= 25°C (Note 1a) 2.4

MOSFET

θJC

θJA

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

FDMC7696 FDMC7696 MLP 3.3x3.3 13 ’’ 12

Thermal Resistance, Junction to Case 5.0 Thermal Resistance, Junction to Ambient (Note 1a) 53

°C/W

mm 3000 units

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FDMC7696 N-Channel PowerTrench

Electrical Characteristics T

= 25 °C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

ΔBV ΔT

DSS

GSS

DSS

DSS J

Drain to Source Breakdown Voltage I Breakdown Voltage Temperature

Coefficient Zero Gate Voltage Drain Current V Gate to Source Leakage Current, Forward V

= 250 μA, VGS = 0 V30 V

= 250 μA, referenced to 25 °C 14 mV/°C

= 24 V, V

= 20 V, V

= 0 V1μA

= 0 V 100nA

On Characteristics

GS(th)

ΔV ΔT

DS(on)

GS(th)

Gate to Source Threshold Voltage VGS = VDS, I Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

Forward Transconductance V

= 250 μA, referenced to 25 °C -6 mV/°C

= 10 V, ID = 12 A 8.5 11.5

= 4.5 V, ID = 10 A 11.5 14.5

= 10 V, ID = 12 A,

= 125 °C

= 5 V, ID = 12 A45S

= 250 μA 1.2 2.0 3.0 V

11.6 15.7

Dynamic Characteristics

iss

oss

rss

Input Capacitance Output Capacitance 380 505 pF Reverse Transfer Capacitance 40 55 pF

= 15 V, VGS = 0 V,

f = 1 MHz

Gate Resistance 0.2 1.0 2.0 Ω

1075 1430 pF

mΩ

MOSFET

Switching Characteristics

d(on)

d(off)

Q Q Q Q

g g gs gd

Turn-On Delay Time Rise Time 210ns Turn-Off Delay Time 19 33 ns Fall Time 210ns Total Gate Charge V Total Gate Charge V Gate to Source Charge 3.2 nC Gate to Drain “Miller” Charge 1.8 nC

= 15 V, ID = 12 A,

= 10 V, R

= 0 V to 10 V

= 0 V to 5 V811nC

GEN

Drain-Source Diode Characteristics

= 0 V, IS = 1.9 A (Note 2) 0.75 1.2

Notes:

is determined with the devi ce m ount ed on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

1. R

θJA

the user's board design.

Source to Drain Diode Forward Voltage Reverse Recovery Time

Reverse Recovery Charge 9 18 nC

a. 53 °C/W when mounted on a 1 in2 pad of 2 oz copper.

= 0 V, IS = 12 A (Note 2) 0.84 1.2

= 12 A, di/dt = 100 A/μs

= 6 Ω

= 12 A

= 15 V,

θJC

918ns

16 22 nC

25 40 ns

is guaranteed by design while R

b. 125 °C/W when mounted on a minimum pad of 2 oz copper.

is determined by

θCA

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

3. E

of 21 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = 12 A, VDD = 27 V, VGS = 10 V.

4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.

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FDMC7696 N-Channel PowerTrench

0.00.51.01.52.02.5

VGS = 4.0 V

VGS = 4.5 V

VGS = 3.5 V

VGS = 6 V

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

VGS = 10 V

, DRAIN CURRENT (A)

, DRAIN TO SOURCE VOLTAGE (V)

0 1020304050

VGS = 4.0 V

VGS = 6 V

VGS = 3.5 V

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

, DRAIN CURRENT (A)

VGS = 4.5 V

= 10 V

-75 -50 -25 0 25 50 75 100 125 150

0.6

0.8

1.0

1.2

1.4

1.6

ID = 12 A V

= 10 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTANC E

, JUNCTION TEMPERATURE (

246810

TJ = 125 oC

ID = 12 A

TJ = 25 oC

, GATE TO S OURCE VOLTAGE (V)

DS(on)

DRAIN TO

SOURCE ON-RESISTANCE

(mΩ)

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

12345

TJ = 150 oC

= 5 V

PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX

TJ = -55 oC

TJ = 25 oC

, DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

0.0 0.2 0.4 0.6 0.8 1.0 1.2

0.001

0.01

0.1

100

TJ = -55 oC

TJ = 25 oC

TJ = 150 oC

= 0 V

, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Typical Characteristics T

Figure 1.

On Region Characteristics Figure 2.

= 25 °C unless otherwise noted

MOSFET

Norma lized On-Re sista nce

vs Drain Current and Gate Voltage

Fi gu re 3. No rm al iz ed On Re si st an ce

vs Junction Temperature

Figure 5. Transfer Characteristics

Figure 4.

On-Resi stance vs Gat e to

Source Voltage

Figure 6.

Source to D rain Diode

Forward Voltage vs Source Current

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FDMC7696 N-Channel PowerTrench

0 4 8 12 16

ID = 12 A

VDD = 20 V

= 10 V

, GATE TO SOURCE VOLTAGE (V)

Qg, GATE CHARGE (nC)

VDD = 15 V

0.1 1 10

100

1000

3000

f = 1 MHz V

= 0 V

CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VO LTAGE (V)

rss

oss

iss

0.001 0.01 0.1 1 10 100

TJ = 100 oC

TJ = 25 oC

TJ = 125 oC

tAV, TIME IN AVALANCHE (ms)

, AVALANCHE CURRENT (A)

25 50 75 100 125 150

= 4.5 V

Limited by P ack age

θJC

= 5.0 oC/W

= 10 V

, DRAIN CURRENT (A)

, CASE TEMPERATURE (

0.01 0.1 1 10 100200

0.01

0.1

100

1 s

100 μs

10 ms

10 s

100 ms

1 ms

, DRAIN CURRENT (A)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS A REA IS LIMITED BY r

DS(on)

SINGLE PULSE T

= MAX RATED

θJA

= 125

C/W

= 25

10-410-310-210

-1

110

100 1000

0.5

100

1000

SINGLE PULSE R

θJA

= 125

C/W

= 25

), PEAK TRANSIENT POWER (W)

t, PULSE WIDTH (sec)

Typical Characteristics T

Figure 7.

Gate Charge Characteristics

= 25 °C unless otherwise noted

Figure 8.

Cap aci ta nce vs D rai n

to Source Voltage

MOSFET

Figure 9.

Unc lam p ed I ndu cti ve

Switching Capability

Figure 11. Forward Bias Safe

erating Area

Figure 10.

M axim u m C o n tinu o u s D rain

Current vs Case Temperature

Figure 12.

Single Pu lse Maximum

Power Dissipation

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FDMC7696 N-Channel PowerTrench

-4

-3

-2

-1

110

100 1000

0.001

0.01

0.1

SINGLE PULSE R

θJA

= 125 oC/W

DUTY CYCLE-DESCENDING ORDER

NORMALIZED THERMAL

IMPEDANCE,

θJA

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5

0.2

0.1

0.05

0.02

0.01

NOTES: DUTY FACTOR: D = t1/t

PEAK TJ = PDM x Z

θJA

x R

θJA

+ T

Typical Characteristics T

Figure 13.

= 25 °C unless otherwise noted

Junction-to-Ambient Transient Thermal Response Curve

MOSFET

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Page 6

NOTES:

A. EXCEPT AS NOTED, PACKAGE CONFORMS TO JED EC RE GISTRATION MO-240 VARI ATION BA.. B. DIMENSI ONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5 M, 1994. D. SEATING PLANE IS DEFINED BY TERMINAL TIPS ONLY E. BODY DI MENS IONS DO NOT INCLUDE MOLD FLASH PROTRUS IONS NOR GATE BURRS. F. FLANGE DIMENSIONS INCLUDE INTERTERMINAL FLASH OR PROTRUSION. INTERTERMINAL FLASH OR PROTR USION SHALL NOT EXCEED 0.25M M PER SIDE. G. IT IS RECOMMENDED TO HAVE NO TRACE S OR VIA WITHIN THE KEEP OUT AREA. H. DRAWING FILENAME: MKT-MLP08Trev1. I. GENERAL RADII FOR A LL CORNERS SHALL BE 0.20MM MAX.

0.10 CAB

0.05

TOP VIEW

BOTTOM VIEW

0.10 C

0.08 C

0.05

0.00

0.10 C

SIDE VIEW

SEATING

PLANE

0.10 C

(0.20)

1.95

0.65

PIN1

IDENT

0.37

0.27

(8X)

2.32

2.22

0.50

0.40

(4X)

(1.20)

0.50

0.40

2.10

2.00

(0.40)

11? AX

0.8 MAX

RECOMMENDED LAND PATTERN

3.30? .10

KEEP OUT AREA

(3.40)

2.37

0.45(4X)

(1.70)

2.15

(0.65)

0.42(8X)

0.70(4X)

0.65

1.95

(0.40)

Dimensional Outline and Pad Layout

FDMC7696 N-Channel PowerTrench

MOSFET

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Page 7

TRADEMARKS

™

The following includes registered and unregistered trademarks and servi ce marks, owned by Fa irchild Semiconductor and/or its global subsidiaries, and i s not intended to be an exhaustive list of all such trademarks.

2Cool™ AccuPower™ Auto-SPM™ AX-CAP™*

BitSiC Build it Now™ CorePLUS™ CorePOWER™

CROSSVOLT™

CTL™ Current Transfer Logic™ DEUXPEED Dual Cool™ EcoSPARK EfficentMax™

ESBC™

Fairchild Fairchild Semiconductor FACT Quiet Series™

FACT

FAST FastvCore™ FETBench™ FlashWriter

FPS™ F-PFS™

FRFET Global Power Resource Green FPS™ Green FPS™ e-Series™

max™

G GTO™ IntelliMAX™ ISOPLANAR™ Marking Small Speakers Sound Louder and Better™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MicroPak2™ MillerDrive™ MotionMax™ Motion-SPM™ mWSaver™ OptoHiT™ OPTOLOGIC OPTOPLANAR

PDP SPM™ Power-SPM™ PowerTrench PowerXS™ Programmable Active Droop™ QFET QS™ Quiet Series™ RapidConfigure™

Saving our world, 1mW/W/kW at a time™ SignalWise™ SmartMax™ SMART START™ Solutions for Your Success™

SPM STEALTH™ SuperFET SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SupreMOS SyncFET™ Sync-Lock™

®*

The Power Franchise

TinyBoost™ TinyBuck™ TinyCalc™

TinyLogic TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™

TranSiC TriFault Detect™ TRUECURRENT

μSerDes™

UHC Ultra FRFET™ UniFET™ VCX™ VisualMax™ VoltagePlus™ XS™

FDMC7696 N-Channel PowerTrench

MOSFET

*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used here in:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or ( b) suppor t or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably

2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

expected to result in a significant injury of the user.

ANTI-COUNTERFEITING POLICY

Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experien cing counterfeiting of their

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PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative / In Design

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datash eet is for reference information only.

Rev. I58