Datasheet FDMA8884 Datasheet (Fairchild)

Page 1
FDMA8884
D
D
S
G
D
D
Pin 1
Drain
Source
MicroFET 2X2 (Bottom View)
Bottom Drain Contact
D
D
D
D
S
G
Single N-Channel Power Trench® MOSFET
30 V, 6.5 A, 23 mΩ
Features
Max rMax rHigh performance trench technology for extremely low rFast switching speedRoHS Compliant
= 23 mΩ at VGS = 10 V, ID = 6.5 A
DS(on)
= 30 mΩ at VGS = 4.5 V, ID = 6.0 A
DS(on)
DS(on)
General Description
This N-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced Power Trench been optimized for
Application
Primary Switch
r
switching performance.
DS(on)
April 2012
®
process that has
FDMA8884 N-Channel Power Trench
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
P
D
, T
T
J
STG
Drain to Source Voltage 30 V Gate to Source Voltage (Note 3) ±20 V Drain Current -Continuous (Package limited) TC = 25 °C 8.0
-Pulsed 25 Power Dissipation (Note 1a) 1.9 Power Dissipation (Note 1b) 0.7 Operating and Storage Junction Temperature Range -55 to +150 °C
= 25 °C unless otherwise noted
A
= 25 °C (Note 1a)
A
Thermal Characteristics
R
θJA
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMA8884 Rev.C3
Thermal Resistance, Junction to Ambient (Note 1a) 65 Thermal Resistance, Junction to Ambient (Note 1b) 180
884 FDMA8884 MicroFET 2x2 7 ’’ 12 mm 3000 units
°C/W
A6.5 -Continuous T
W
Page 2
FDMA8884 N-Channel Power Trench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV ΔT
I
DSS
I
GSS
DSS
DSS J
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 30 V Breakdown Voltage Temperature
Coefficient Zero Gate Voltage Drain Current VDS = 24 V, V Gate to Source Leakage Current, Forward VGS = 20 V, V
I
= 250 μA, referenced to 25 °C 15 mV/°C
D
= 0 V 1 μA
GS
= 0 V 100 nA
DS
On Characteristics
V
GS(th)
ΔV ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA1.21.83.0V Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 μA, referenced to 25 °C -5 mV/°C
D
V
= 10 V, ID = 6.5 A 19 23
GS
= 4.5 V, ID = 6.0 A 25 30
GS
= 10 V, ID = 6.5 A, TJ = 125 °C 25 30
V
GS
Forward Transconductance VDD = 5 V, ID = 6.5 A 26 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance Output Capacitance 132 175 pF Reverse Transfer Capacitance 18 28 pF
= 15 V, VGS = 0 V,
V
DS
f = 1 MHz
Gate Resistance 1.1 Ω
339 450 pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q Q
Q
g(TOT)
gs gd
Turn-On Delay Time Rise Time 110ns Turn-Off Delay Time 11 20 ns
= 15 V, ID = 6.5 A,
V
DD
V
= 10 V, R
GS
GEN
= 6 Ω
510ns
Fall Time 110ns Total Gate Charge VGS = 0 V to 10 V Total Gate Charge V Total Gate Charge 1.0 nC
= 0 V to 4.5 V 2.7 3.7 nC
GS
V
DD
I
= 6.5 A
D
= 15 V
5.4 7.5 nC
Gate to Drain “Miller” Charge 0.9 nC
mΩV
®
MOSFET
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
NOTES:
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
1. R
θJA
R
is guaranteed by design while R
θJC
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDMA8884 Rev.C3
Source to Drain Diode Forward Voltage V Reverse Recovery Time Reverse Recovery Charge 4 10 nC
is determined by the user's board design.
θCA
a. 65 °C/W when mounted on a 1 in2 pad of 2 oz copper.
= 0 V, IS = 6.5 A (Note 2) 0.86 1.2 V
GS
= 6.5 A, di/dt = 100 A/μs
I
F
b. 180 °C/W when mounted on a minimum pad of 2 oz copper.
16 28 ns
Page 3
FDMA8884 N-Channel Power Trench
0 0.4 0.8 1.2 1.6 2.0
0
5
10
15
20
25
VGS = 6 V
VGS = 4.5 V
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
VGS = 4 V
VGS = 3.5 V
VGS = 10 V
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
0 5 10 15 20 25
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VGS = 10 V
VGS = 3.5 V
VGS = 4 V
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
I
D
, DRAIN CURRENT (A)
VGS = 4.5 V
VGS = 6 V
-75 -50 -25 0 25 50 75 100 125 150
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
ID = 6.5 A V
GS
= 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESIST ANCE
T
J
, JUNCTION TEMPERATURE (
o
C)
246810
0
20
40
60
80
PULSE DURA TION = 80 μs DUTY CYCLE = 0.5% MAX
TJ = 125 oC
T
J
= 25
o
C
ID = 6.5 A
r
DS(on)
, DRAIN TO
SOURCE ON-RESISTANCE
(mΩ)
VGS, GATE TO S O U RCE VOLTAGE (V)
12345
0
5
10
15
20
25
TJ = 150 oC
V
DS
= 5 V
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
I
D
, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
0.20.40.60.81.01.2
0.01
0.1
1
10
30
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
V
GS
= 0 V
I
S
, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Typical Characteristics T
Figure 1.
On Region Characteristics Figure 2.
= 25 °C unless otherwise noted
J
®
MOSFET
Norma l i z e d O n - Resistance
vs Drain Current and Gate Voltage
Fig ure 3. Norm a lize d On Re s ista n ce
vs Junction Temperature
©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDMA8884 Rev.C3
Figure 5. Transfer Characteristics
Figure 4.
On-Resista nce vs Gate to
Source Voltage
Figure 6.
Source to Drain Diode
Forward Voltage vs Source Current
Page 4
FDMA8884 N-Channel Power Trench
0123456
0
2
4
6
8
10
ID = 6.5 A
VDD = 20 V
V
DD
= 15 V
V
GS
, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 10 V
0.1 1 10 30
10
100
500
f = 1 MHz V
GS
= 0 V
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
C
rss
C
oss
C
iss
0.01 0.1 1 10 100
0.01
0.1
1
10
30
100 μs
1 ms
1 s
10 ms
DC
10 s
100 ms
I
D
, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS A REA IS LIMITED BY r
DS(on)
SINGLE PULSE T
J
= MAX RATED
R
θJA
= 180
o
C/W
T
A
= 25
o
C
10-410-310-210-1110
100
10
3
0.5
1
10
100
200
SINGLE PULSE R
θJA
= 180
o
C/W
T
A
= 25
o
C
P(
PK
), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (sec)
10
-4
10
-3
10
-2
10
-1
110
100 1000
0.005
0.01
0.1
1
SINGLE PULSE R
θJA
= 180 oC/W
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE,
Z
θJA
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.05
0.02
0.01
2
P
DM
t
1
t
2
NOTES: DUTY FACTOR: D = t
1/t2
PEAK TJ = PDM x Z
θJA
x R
θJA
+ T
A
Typical Characteristics T
Figure 7.
Gate Charge Characteristics Figure 8.
= 25 °C unless otherwise noted
J
Capacitance vs Drain
to Source Voltage
®
MOSFET
Figure 9.
Forward Bias Safe
Operating Area
©2012 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDMA8884 Rev.C3
Figure 11.
Figure 10.
Power Dissipation
Junction-to-Ambient Transient Thermal Response Curve
Figure 12.
Si ngle Puls e Ma ximu m
Page 5
Dimensional Outline and Pad Layout
B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER
A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION
ASME Y14.5M, 1994
0.10 CAB
0.05
C
RECOMMENDED LAND PATTERN OPT 1
0.10 C
0.08 C C
2.000
2.000
0.05
0.00
0.10 C
2X
2X
0.8 MAX
SEATING PLANE
0.10
C
(0.20)
0.33
0.20
1
3
4
6
4
6
3
1
PIN #1 IDENT
0.65
1.30
1.35
(0.47)
1.05
0.40 TYP0.65 TYP
0.25~0.35
1.000
0.800
2.30
1.00
MO-229 DATED AUG/2003
(0.56)
(0.30)
0.66
RECOMMENDED LAND PATTERN OPT 2
46
31
1.35
(0.47)
1.05
0.40 TYP
0.65 TYP
2.30
1.00
0.66
NO DRAIN OR GATE TRACES ALLOWED IN THIS AREA
PIN#1 LOCATION
1.05
0.95
D. DRAWING FILENAME: MKT-MLP06Lrev2.
FDMA8884 N-Channel Power Trench
®
MOSFET
©2012 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDMA8884 Rev.C3
Page 6
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tm
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
FDMA8884 N-Channel Power Trench
®
MOSFET
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
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PRODUCT STATUS DEFINITIONS Definition of Terms
.
Datasheet Identification Product Status Definition
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
Datasheet contains preliminary data; supplementa ry data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I61
©2012 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com FDMA8884 Rev.C3
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