Datasheet FDMA7672 Datasheet (Fairchild)

FDMA7672

D

D

S

G

D

D

Pin 1

Drain

Source

MicroFET 2X2 (Bottom View)

Bottom Drain Contact

D

D

D

D

S

G

Single N-Channel PowerTrench® MOSFET

30 V, 9 A, 21 mΩ
Features

 Max r
 Max r
 Low Profile - 0.8 mm maximum - in the new package

MicroFET 2x2 mm

 Free from halogenated compounds and antimony oxides
 RoHS compliant

= 21 mΩ at VGS = 10 V, ID = 9 A

DS(on)

= 32 mΩ at VGS = 4.5 V, ID = 7 A

DS(on)

General Description

This device has been designed to provide maximum efficiency
and thermal performance for synchronous buck converters. The
low r
performance.

and gate charge provide excellent switching

DS(on)

Application

 DC – DC Buck Converters

FDMA7672 Single N-Channel Power Trench

April 2012

®

MOSFET

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

P

D

, T

T

J

STG

Thermal Characteristics

R

θJC
θJA

R

θJA

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

©2012 Fairchild Semiconductor Corporation
FDMA7672 Rev.C5

Drain to Source Voltage 30 V
Gate to Source Voltage ±20 V
Drain Current -Continuous TA = 25 °C (Note 1a) 9

-Pulsed 24
Power Dissipation TA = 25 °C (Note 1a) 2.4
Power Dissipation T
Operating and Storage Junction Temperature Range –55 to +150 °C

Thermal Resistance, Junction to Case 6.9
Thermal Resistance, Junction to Ambient (Note 1a) 52
Thermal Resistance, Junction to Ambient (Note 1b) 145

672 FDMA7672 MicroFET 2x2 7 ’’ 12 mm 3000 units

= 25 °C unless otherwise noted

A

= 25 °C (Note 1b) 0.9

A

1

A

W

°C/WR

www.fairchildsemi.com

FDMA7672 Single N-Channel Power Trench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

ΔBV
ΔT

I

DSS

I

GSS

DSS

DSS
J

Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 30 V
Breakdown Voltage Temperature

Coefficient
Zero Gate Voltage Drain Current VDS = 24 V, V
Gate to Source Leakage Current VGS = 20 V, V

I

= 250 μA, referenced to 25 °C 16 mV/°C

D

= 0 V 1 μA

GS

= 0 V 100 nA

DS

On Characteristics

V

GS(th)

ΔV
ΔT

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.0 2.1 3.0 V
Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

I

= 250 μA, referenced to 25 °C –6 mV/°C

D

V

= 10 V, ID = 9 A 14 21

GS

= 4.5 V, ID = 7 A 20 32

GS

= 10 V, ID = 9 A, TJ = 125 °C 19 28

V

GS

Forward Transconductance VDS = 5 V, ID = 9 A 35 S

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance
Output Capacitance 195 260 pF
Reverse Transfer Capacitance 25 40 pF
Gate Resistance 1.5 Ω

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q
Q
Q
Q

g
g
gs
gd

Turn-On Delay Time
Rise Time 210ns
Turn-Off Delay Time 14 25 ns
Fall Time 210ns
Total Gate Charge VGS = 0 V to 10 V
Total Gate Charge VGS = 0 V to 4.5 V 4.4 6 nC
Gate to Source Gate Charge 1.9 nC
Gate to Drain “Miller” Charge 1.5 nC

= 15 V, VGS = 0 V

V

DS

f = 1.0 MHz

= 15 V, ID = 9 A

V

DD

V

= 10 V, R

GS

GEN

= 6 Ω

V
I

D

DD

= 9 A

= 15 V,

570 760 pF

612ns

9.3 13 nC

mΩV

®

MOSFET

Drain-Source Diode Characteristics

I

S

V

SD

t

rr

Q

rr

NOTES:

1. R

is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

θJA

the user's board design.

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

©2012 Fairchild Semiconductor Corporation
FDMA7672 Rev.C5

Maximum Continuous Drain-Source Diode Forward Current 2 A
Source to Drain Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge 5 10 nC

GS

= 9 A, di/dt = 100 A/μs

I

F

a. 52 °C/W when mounted
on a 1 in2 pad of 2 oz copper.

= 0 V, IS = 2 A (Note 2) 0.8 1.2 V

18 32 ns

is guaranteed by design while R

θJC

b. 145 °C/W when mounted on a
minimum pad of 2 oz copper.

2

is determined by

θCA

www.fairchildsemi.com

FDMA7672 Single N-Channel Power Trench

0 0.5 1.0 1 .5 2.0

0

4

8

12

16

20

24

VGS = 3.5 V

VGS = 4.5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

VGS = 6 V

VGS = 4 V

VGS = 10 V

I

D

, DRAIN CURRENT (A)

V

DS

, DRAIN TO SOURCE VOLTAGE (V)

0 4 8 12162024

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

V

GS

= 4.5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

I

D

, DRAIN CURRENT (A)

V

GS

= 10 V

VGS = 6 V

VGS = 4 V

V

GS

= 3.5 V

-75 -50 -25 0 25 50 75 100 125 150

0.7

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

ID = 9 A
V

GS

= 10 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

T

J

, JUNCTION TEMPERATURE (

o

C)

246810

0

20

40

60

80

ID = 9 A

TJ = 25 oC

TJ = 125 oC

V

GS

, GATE TO SOURCE VOLTAGE (V)

r

DS(on)

,

DRAIN TO

SOURCE ON-RESISTANCE

(mΩ)

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

0

4

8

12

16

20

24

V

DS

= 5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

TJ = -55 oC

TJ = 25 oC

TJ = 125 oC

I

D

, DRAIN CURRENT (A)

VGS, GATE T O SOURC E VOLTAGE (V )

0.20.40.60.81.01.2

0.01

0.1

10

24

TJ = -55 oC

TJ = 25 oC

TJ = 125 oC

V

GS

= 0 V

I

S

, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Typical Characteristics T

Figure 1.

On-Region Characteristics

= 25°C unless otherwise noted

J

Figure 2.

Norma l i z e d O n - Resistance

vs Drain Current and Gate Voltage

®

MOSFET

Figu r e 3. Norm a l ized On - R esista n c e

vs Junction Temperature

©2012 Fairchild Semiconductor Corporation
FDMA7672 Rev.C5

Figure 5. Transfer Characteristics

Figure 4.

On-Resista nce vs Gate to

Source Voltage

Figure 6.

Source to Drain Diode

Forward Voltage vs Source Current

3

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FDMA7672 Single N-Channel Power Trench

0246810

0

2

4

6

8

10

Qg, GATE CHARGE (nC)

V

GS

, GATE TO SOURCE VOLTAGE (V)

ID = 9 A

VDD = 20 V

V

DD

= 10 V

VDD = 15 V

0.1 1 10 30

10

100

1000

f = 1 MHz
V

GS

= 0 V

CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VOLTAGE (V)

C

rss

C

oss

C

iss

0.01 0.1 1 10 100

0.01

0.1

1

10

100

1 s

0.1 ms

10 ms

DC

10 s

100 ms

1 ms

I

D

, DRAIN CURRENT (A)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS AREA IS
LIMITED BY r

DS(on)

SINGLE PULSE
T

J

= MAX RATED

R

θJA

= 145

o

C/W

T

A

= 25

o

C

10-410-310-210-110010

1

100 1000

0.1

1

10

100

1000

SINGLE PULSE
R

θJA

= 145

o

C/W

T

A

= 25

o

C

P(

PK

), PEAK TRANSIENT POWER (W)

t, PULSE WIDTH (sec)

10

-4

10

-3

10

-2

10

-1

110

100 1000

0.001

0.01

0.1

1

SINGLE PULSE
R

θJA

= 145 oC/W

DUTY CYCLE-DESCENDING ORDER

NORMALIZED THERMAL

IMPEDANCE,

Z

θJC

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5

0.2

0.1

0.05

0.02

0.01

2

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t1/t

2

PEAK TJ = PDM x Z

θJA

x R

θJA

+ T

A

Typical Characteristics T

Figure 7.

Gate Charge Characteristics

= 25°C unless otherwise noted

J

Figure 8.

Capacitance vs Drain

to Source Voltage

®

MOSFET

Figure 9.

Forward Bias Safe

Operating Area

©2012 Fairchild Semiconductor Corporation
FDMA7672 Rev.C5

Figure 11.

Figure 10.

Single Pulse Maximum

Pow er Dis s ipat i on

Transient Thermal Response Curve

4

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Dimensional Outline and Pad Layout

B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER

A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION

ASME Y14.5M, 1994

0.10 CAB

0.05

C

RECOMMENDED LAND PATTERN OPT 1

0.10 C

0.08 C
C

2.000

2.000

0.05

0.00

0.10 C

2X

2X

0.8 MAX

SEATING

PLANE

0.10

C

(0.20)

0.33

0.20

1

3

4

6

4

6

3

1

PIN #1 IDENT

0.65

1.30

1.35

(0.47)

1.05

0.40 TYP0.65 TYP

0.25~0.35

1.000

0.800

2.30

1.00

MO-229 DATED AUG/2003

(0.56)

(0.30)

0.66

RECOMMENDED LAND PATTERN OPT 2

46

31

1.35

(0.47)

1.05

0.40 TYP

0.65 TYP

2.30

1.00

0.66

NO DRAIN OR GATE
TRACES ALLOWED IN
THIS AREA

PIN#1 LOCATION

1.05

0.95

D. DRAWING FILENAME: MKT-MLP06Lrev2.

FDMA7672 Single N-Channel Power Trench

®

MOSFET

©2012 Fairchild Semiconductor Corporation
FDMA7672 Rev.C5

5

www.fairchildsemi.com

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FDMA7672 Single N-Channel Power Trench

®

MOSFET

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PRODUCT STATUS DEFINITIONS
Definition of Terms

.

Datasheet Identification Product Status Definition

Advance Information Formative / In Design

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.

Rev. I61

©2012 Fairchild Semiconductor Corporation

6

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FDMA7672 Rev.C5