Datasheet FDMA7628 Datasheet (Fairchild)

D

D

S

G

D

D

Pin 1

Drain

Source

MicroFET 2X2 (Bottom View)

Bottom Drain Contact

D

D

D

D

S

G

FDMA7628

Single N-Channel 1.5 V Specified PowerTrench® MOSFET

20 V, 9.4 A, 14.5 mΩ

Features

 Max r
 Max r
 Max r
 Max r
 Low Profile-0.8 mm maximum in the new package MicroFET

2x2 mm
 RoHS Compliant

= 14.5 mΩ at VGS = 4.5 V, ID = 9.4 A

DS(on)

= 18.2 mΩ at VGS = 2.5 V, ID = 8.3 A

DS(on)

= 23.3 mΩ at VGS = 1.8 V, ID = 7.3 A

DS(on)

= 32.3 mΩ at VGS = 1.5 V, ID = 6.2 A

DS(on)

General Description

This Single N-Channel MOSFET has been designed using
Fairchild Semiconductor’s advanced Power Trench
optimize the r
leadframe.

DS(ON)

@ V

= 1.5 V on special MicroFET

GS

Applications

 Li-lon Battery Pack
 DC-DC Buck Converters

May 2012

®

process to

FDMA7628 Single N-Channel 1.5 V Specified PowerTrench

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DS

V

GS

I

D

P

D

, T

T

J

STG

Thermal Characteristics

R

θJA

R

θJA

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

Drain to Source Voltage 20 V
Gate to Source Voltage ±8 V

-Continuous TA = 25 °C (Note 1a) 9.4

-Pulsed 54
Power Dissipation TA = 25 °C (Note 1a) 1.9
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C

Thermal Resistance, Junction to Ambient (Note 1a) 65
Thermal Resistance, Junction to Ambient (Note 1b) 180

104 FDMA7628 MicroFET 2X2 7 ’’ 12 mm 3000 units

= 25 °C unless otherwise noted

A

= 25 °C (Note 1b) 0.7

A

®

MOSFET

A

W

°C/W

©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C

1

www.fairchildsemi.com

FDMA7628 Single N-Channel 1.5 V Specified PowerTrench

Electrical Characteristics T

= 25 °C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

ΔBV
ΔT

I

DSS

I

GSS

DSS

DSS
J

Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 20 V
Breakdown Voltage Temperature

Coefficient
Zero Gate Voltage Drain Current VDS = 16 V, V
Gate to Source Leakage Current VGS = ±8 V, V

I

= 250 μA, referenced to 25 °C 15 mV/°C

D

= 0 V 1 μA

GS

= 0 V ±100 nA

DS

On Characteristics

V

GS(th)

ΔV
ΔT

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 0.4 0.6 1.0 V
Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

I

= 250 μA, referenced to 25 °C -3 mV/°C

D

V

= 4.5 V, ID = 9.4 A 11.3 14.5

GS

= 2.5 V, ID = 8.3 A 12.7 18.2

V

GS

= 1.8 V, ID = 7.3 A 15.0 23.3

V

GS

= 1.5 V, ID = 6.2 A 18.3 32.3

V

GS

= 4.5 V, ID = 9.4 A,

V

GS

T

= 125 °C

J

14.7 18.3

Forward Transconductance VDD = 5 V, ID = 9.4 A 56 S

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance
Output Capacitance 180 240 pF
Reverse Transfer Capacitance 122 185 pF
Gate Resistance 1.9 Ω

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

Q
Q

g

gs
gd

Turn-On Delay Time
Rise Time 611ns
Turn-Off Delay Time 37 58 ns
Fall Time 611ns
Total Gate Charge V
Total Gate Charge V
Total Gate Charge V
Total Gate Charge V
Gate to Source Charge 1.7 nC
Gate to Drain “Miller” Charge 2.7 nC

= 10 V, VGS = 0 V,

V

DS

f = 1 MHz

= 10 V, ID = 9.4 A,

V

DD

V

= 4.5 V, R

GS

= 0 V to 4.5 V

GS

= 0 V to 2.5 V 10.0 nC

GS

= 0 V to 1.8 V 7.4 nC

GS

= 0 V to 1.5 V 6.2 nC

GS

GEN

= 6 Ω

V

DD

I

= 9.4 A

D

= 10 V,

1260 1680 pF

917ns

17.5 nC

mΩ

®

MOSFET

Drain-Source Diode Characteristics

I

S

V

SD

t

rr

Q

rr

©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C

Maximum Continuous Drain-Source Diode Forward Current 2.0 A
Source to Drain Diode Forward Voltage V
Reverse Recovery Time
Reverse Recovery Charge 5 10 nC

= 0 V, IS = 2.0 A (Note 2) 0.63 1.2 V

GS

= 9.4 A, di/dt = 100 A/μs

I

F

2

16 29 ns

www.fairchildsemi.com

NOTES:

1. R

is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in . board of FR-4 m ater ial. R

θJA

the user's board design.

a.65 °C/W when mounted

2

on a 1 in

SS

SF

DS

DF

G

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

pad of 2 oz copper.

SS

SF

DS

DF

G

is guaranteed by design while R

θJC

b. 180 °C/W when mounted on a
minimum pad of 2 oz copper.

is determined by

θJA

FDMA7628 Single N-Channel 1.5 V Specified PowerTrench

®

MOSFET

©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C

3

www.fairchildsemi.com

FDMA7628 Single N-Channel 1.5 V Specified PowerTrench

0 0.5 1.0 1.5 2.0 2.5 3.0

0

9

18

27

36

45

54

VGS = 1.5 V

VGS = 2.5 V

V

DS

, DRAIN TO SOURCE VOLTAGE (V)

I

D

, DRAIN CURRENT (A)

VGS = 1.2 V

VGS = 1.8 V

VGS = 4.5 V

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

0 9 18 27 36 45 54

0

1

2

3

4

VGS = 2.5 V

VGS = 4.5 V

VGS = 1.8 V

PULSE DURA TION = 80 μs
DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

I

D

, DRAIN CURRENT (A)

VGS = 1.5 V

VGS = 1.2 V

-75 -50 -25 0 25 50 75 100 125 150

0.6

0.8

1.0

1.2

1.4

1.6

ID = 9.4 A
V

GS

= 4.5 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTANC E

T

J

, JUNCTION TEMPERATURE (

o

C)

0.91.82.73.64.5

0

10

20

30

40

50

60

TJ = 125 oC

ID = 9.4 A

TJ = 25 oC

V

GS

, GATE TO S O URCE VOLTA GE (V)

r

DS(on)

,

DRAIN TO

SOURCE ON-RESISTANCE

(mΩ)

PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX

0.51.01.52.02.5

0

9

18

27

36

45

54

TJ = 125 oC

V

DS

= 5 V

PULSE DURA TION = 80 μs
DUTY CYCLE = 0.5% MAX

TJ = -55 oC

TJ = 25 oC

I

D

, DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

0.0 0.2 0.4 0.6 0.8 1.0 1.2

0.001

0.01

0.1

1

10

100

TJ = -55 oC

TJ = 25 oC

TJ = 125 oC

V

GS

= 0 V

I

S

, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Typical Characteristics T

Figure 1.

On Region Characteristics Figur e 2 .

= 25 °C unless otherwise noted

J

Nor m aliz e d On- R esist a nce

vs Drain Current and Gate Voltage

Fig ure 3 . No rmal ized On Re sist ance

vs Junction Temperature

©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C

Figure 5. Transfer Characteristics

®

MOSFET

Figure 4.

Figure 6.

Forward Voltage vs Source Current

4

On-Resistance vs Gate to

Source Voltage

Source to Drain Diode

www.fairchildsemi.com

FDMA7628 Single N-Channel 1.5 V Specified PowerTrench

0 3 6 9 12 15 18

0.0

0.9

1.8

2.7

3.6

4.5

ID = 9.4 A

VDD = 12 V

V

DD

= 8 V

V

GS

, GATE TO SOURCE VOLTAGE (V)

Qg, GATE CHARGE (nC)

VDD = 10 V

0.1 1 10 20

10

100

1000

5000

f = 1 MHz
V

GS

= 0 V

CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VOLTAGE (V)

C

rss

C

oss

C

iss

0.01 0.1 1 10 100

0.01

0.1

1

10

100

100 us

1 ms

1 s

10 ms

DC

10 s

100 ms

I

D

, DRAIN CURRENT (A)

VDS, DRAIN to SOURCE VOLTAGE (V)

THIS AREA IS
LIMITED BY r

DS(on)

SINGLE PULSE
T

J

= MAX RATED

R

θJA

= 180

o

C/W

T

A

= 25

o

C

10-410-310-210

-1

110

100 1000

0.1

1

10

100

1000

SINGLE PULSE
R

θJA

= 180

o

C/W

T

A

= 25

o

C

P(

PK

), PEAK TRANSIENT POWER (W)

t, PULSE WIDTH (sec)

10

-4

10

-3

10

-2

10

-1

110

100 1000

0.001

0.01

0.1

1

SINGLE PULSE
R

θJA

= 180 oC/W

DUTY CYCLE-DESCENDING ORDER

NORMALIZED THERMAL

IMPEDANCE,

Z

θJA

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5

0.2

0.1

0.05

0.02

0.01

2

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t1/t

2

PEAK TJ = PDM x Z

θJA

x R

θJA

+ T

A

Typical Characteristics T

Figure 7.

Gate Charge Characteristics Figure 8.

= 25 °C unless otherwise noted

J

Capaci t a n c e v s Drain

to Source Voltage

Figure 9. Forward Bias Safe

Operating Area

Figure 11. Junction-to-Ambient Transient Thermal Response Curve

©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C

Fi gur e 10. S ingle Pul se Max imum

5

Power Dissipation

®

MOSFET

www.fairchildsemi.com

Dimensional Outline and Pad Layout

B. DIM ENSIO NS ARE IN M ILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER

A. DOES NOT FUL L Y CONF ORM TO J EDEC REGIS TRAT ION

AS M E Y14.5M, 1994

0.10 C A B

0.05 C

TO P VIEW

BOTTOM VIEW

RECOMMENDED LAND PAT TERN OPT 1

0.15 C

0.08 C

B

A

C

2.00

2.00

0.05

0.00

0.15 C

2X

2X

0.8 MAX

SIDE VIE W

SEATING
PLANE

0.10 C
(0.20)

0.33

0.20

13

4

6

4

6

31

PIN #1 IDENT

0.65

1.30

1.35

(0.48)

1.05

0.40 TY P

0.65 TYP

1.00

0.80

2.30

1.00

MO-22 9 DA TED AUG/2003

(0.30)

0.66

RECOMMENDED LAND PATTERN OPT 2

46

31

1.35

(0.48)

1.05

0.40 TYP

0.65 TYP

2.30

1.00

No Traces or Vias
Allowed in this Area

PIN #1 LOCATION

D. DRAWING FILENAME: MKT-MLP06Prev1.

(0.50)

(0.15)

(0.50)

(0.20)

(0.45)

(0.20)

1.05

0.95

0.66

0.56

6X

0.35

0.25

6X

FDMA7628 Single N-Channel 1.5 V Specified PowerTrench

®

MOSFET

©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C

6

www.fairchildsemi.com

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®

™

tm

tm

The following includes registered and unregistered trademarks a nd service marks, owned by Fairch ild Semiconductor and/ or its global subsidiaries, and is n ot
intended to be an exhaustive list of all such trademarks.

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THEREIN, WHICH COVERS THESE PRODUCTS.

FDMA7628 Single N-Channel 1.5 V Specified PowerTrench

®

MOSFET

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PRODUCT STATUS DEFINITIONS
Definition of Terms

.

Datasheet Identification Product Status Definition

Advance Information Formative / In Design

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

©2012 Fairchild Semiconductor Corporation
FDMA7628 Rev.C

Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.

Datasheet contains preliminary data; supplementa ry data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.

Rev. I61

7

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