Datasheet fdh5500_f085 Datasheet

Page 1
FDH5500_F085
N-Channel UltraFET Power MOSFET
55V, 75A, 7mΩ
FDH5500_F085 N-Channel UltraFET Power MOSFET
October 2008
Typ r
Typ Q
Simulation Models
-Temperature Compensated PSPICE and SABER Models
Peak Current vs Pulse Width Curve
UIS Rating Curve
Related Literature
-TB334, “Guidelines for Soldering Surface Mount Componets to PC Boards“
Qualified to AEC Q101
RoHS Compliant
= 5.2mΩ at V
DS(on)
= 118nC at VGS = 10V
g(10)
= 10V, ID = 75A
GS
TM
Applications
DC Linear Mode Control
Solenoid and Motor Control
Switching Regulators
Automotive Systems
©2008 Fairchild Semiconductor Corporation FDH5500_F085 Rev. A1
www.fairchildsemi.com1
Page 2
FDH5500_F085 N-Channel UltraFET Power MOSFET
MOSFET Maximum Ratings T
= 25°C unless otherwise noted
C
Symbol Parameter Ratings Units
V
V
V
I
E
P
T
T
DSS
DGR
GS
D
AS
D
J
L
pkg
Drain to Source Voltage (Note 1) 55 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) 55 V
Gate to Source Voltage ±20 V
Drain Current Continuous (TC < 135oC, V
= 10V) 75
GS
Pulsed See Figure 4
Single Pulse Avalanche Energy (Note 2) 864 mJ
Power Dissipation 375 W
o
Dreate above 25
, T
Operating and Storage Temperature -55 to + 175
STG
C2.5W/
Max. Lead Temp. for Soldering (at 1.6mm from case for 10sec) 300
Max. Package Temp. for Soldering (Package Body for 10sec) 260
Thermal Characteristics
R
θJC
R
θJA
Thermal Resistance Junction to Case 0.4
Thermal Resistance Junction to Ambient TO-247, 1in2 copper pad area 30
o
C/W
o
C/W
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDH5500
Electrical Characteristics T
FDH5500_F085 TO-247 Tube N/A 30 units
= 25°C unless otherwise noted
C
A
o
C
o
CT
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
B
I
DSS
I
GSS
VDSS
Drain to Source Breakdown Voltage ID = 250μA, VGS = 0V 55 - - V
V
= 50V, VGS = 0V - - 1
Zero Gate Voltage Drain Current
DS
= 45V TC = 150oC - - 250
V
DS
Gate to Source Leakage Current VGS = ±20V - - ±100 nA
On Characteristics
V
GS(th)
r
DS(on)
Gate to Source Threshold Voltage VGS = VDS, ID = 250μA22.94V
Drain to Source On Resistance ID = 75A, VGS= 10V - 5.2 7 mΩ
Dynamic Characteristics
C
iss
C
oss
C
rss
Q
g(TOT)
Q
g(10)
Q
g(TH)
Q
gs
Q
gd
Input Capacitance
Output Capacitance - 1310 - pF
Reverse Transfer Capacitance - 395 - pF
= 25V, VGS = 0V,
V
DS
f = 1MHz
Total Gate Charge at 20V VGS = 0 to 20V
V
= 30V
Total Gate Charge at 10V VGS = 0 to 10V - 118 153 nC
Threshold Gate Charge VGS = 0 to 2V - 6.2 8.1 nC
Gate to Source Gate Charge
Gate to Drain “Miller“ Charge - 51 - nC
DD
I
= 75A
D
R
= 0.4Ω
L
I
= 1.0mA
g
- 3565 - pF
- 206 268 nC
- 17.8 - nC
μA
FDH5500_F085 Rev. A1 www.fairchildsemi.com2
Page 3
FDH5500_F085 N-Channel UltraFET Power MOSFET
Electrical Characteristics T
= 25oC unless otherwise noted
C
Symbol Parameter Test Conditions Min Typ Max Units
Switching Characteristics
t
on
t
d(on)
t
r
t
d(off)
t
f
t
off
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Notes:
1: Starting TJ = 25oC to175oC. 2: Starting TJ = 25oC, L = 0.48mH, IAS = 60A
Turn-O n Ti me
Turn-On Delay Time - 13.7 - ns
Rise Time - 102 - ns
Turn-O ff Delay Time - 34 - ns
Fall Time - 22 - ns
= 30V, ID = 75A,
V
DD
R
= 0.4Ω, VGS = 10V,
L
R
= 2.5Ω
GS
- - 185 ns
Turn-O ff Time - - 9 1 ns
Source to Drain Diode Voltage ISD = 75A - 1 1.25 V
Reverse Recovery Time
Reverse Recovery Charge - 77 100 nC
= 75A, dISD/dt = 100A/μs
I
F
-6078ns
This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For
All Fairchild Semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems
FDH5500_F085 Rev. A1 www.fairchildsemi.com3
a copy of the requirements, see AEC Q101 at: http://www.aecouncil.com/
certification.
Page 4
Typical Characteristics
0 25 50 75 100 125 150 175
0.0
0.2
0.4
0.6
0.8
1.0
1.2
POWER DISSIPATION MULTIPLIER
TC, CASE TEMPERATURE(oC)
25 50 75 100 125 150 175
0
30
60
90
120
150
180
CURRENT LIMITED BY PACKAGE
VGS = 10V
I
D
, DRAIN CURRENT (A)
TC, CASE TEMPERATURE(oC)
10
-5
10
-4
10
-3
10
-2
10
-1
110
0.01
0.1
1
SINGLE PULSE
D = 0.50
0.20
0.10
0.05
0.02
0.01
NORMALIZED THERMAL
IMPEDANCE, Z
θJC
t, RECTANGULAR PULSE DURATION(s)
DUTY CYCLE - DESCENDING ORDER
2
NOTES: DUTY FACTOR: D = t1/t
2
PEAK TJ = PDM x Z
θJA
x R
θJA
+ T
C
P
DM
t
1
t
2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
100
1000
10000
VGS = 10V
SINGLE PULSE
I
DM
, PEAK CURRENT (A)
t, RECTANGULAR PULSE DURATION(s)
TC = 25oC
I = I
2
175 - T
C
150
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
FDH5500_F085 N-Channel UltraFET Power MOSFET
Figure 1. Normalized Power Dissipation vs Case
Temperature
Figure 3. Normalized Maximum Transient Thermal Impedance
Figure 2. Maximum Continuous Drain Current vs
Case Temperature
FDH5500_F085 Rev. A1 www.fairchildsemi.com4
Figure 4. Peak Current Capability
Page 5
Typical Characteristics
1 10 100 200
0.1
1
10
100
1000
100us
1ms
10ms
I
D
, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
OPERATION IN THIS AREA MAY BE LIMITED BY r
DS(on)
SINGLE PULSE T
J
= MAX RATED
T
C
= 25
o
C
DC
0.01 0.1 1 10 100 1000 5000
1
10
100
1000
STARTING TJ = 150oC
STARTING TJ = 25oC
I
AS
, AVALANCHE CURRENT (A)
tAV, TIME IN AVALANCHE (ms)
tAV = (L)(IAS)/(1.3*RATED BV
DSS
- VDD)
If R = 0
If R
≠
0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BV
DSS
- VDD) +1]
01234567
0
40
80
120
160
TJ = -55oC
TJ = 25oC
TJ = 175oC
PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX
V
DD
= 5V
I
D
, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
012345
0
40
80
120
160
VGS = 5.5V
VGS = 10V
VGS = 6V
VGS = 4.5V
VGS = 5V
PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX
I
D
, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
46810
0
10
20
30
40
I
D
= 75A
PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX
r
DS(on)
, DRAIN TO SOURCE
ON-RESISTANCE
(mΩ)
V
GS
, GATE TO SOURCE VOLTAGE (V)
TJ = 25oC
TJ = 175oC
-80 -40 0 40 80 120 160 200
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX
ID = 75A V
GS
= 10V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
TJ, JUNCTION TEMPERATURE(oC)
Figure 5. Forward Bias Safe Operating Area
FDH5500_F085 N-Channel UltraFET Power MOSFET
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 6. Unclamped Inductive Switching
Capability
Figure 7. Transfer Characteristics Figure 8. Saturation Characteristics
FDH5500_F085 Rev. A1 www.fairchildsemi.com5
Figure 9. Drain to Source On-Resistance
Variation vs Gate to Source Voltage
Figure 10. Normalized Drain to Source On
Resistance vs Junction Temperature
Page 6
Typical Characteristics
-80 -40 0 40 80 120 160 200
0.4
0.6
0.8
1.0
1.2
V
GS
= V
DS
I
D
= 250μA
NORMALIZED GATE
THRESHOLD VOLTAGE
TJ, JUNCTION TEMPERATURE(oC)
-80 -40 0 40 80 120 160 200
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
ID = 1mA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
0.1 1 10 80
100
1000
10000
f = 1MHz V
GS
= 0V
C
rss
C
oss
C
iss
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
0 20406080100120140
0
2
4
6
8
10
ID = 75A
VDD = 40V
VDD = 20V
VDD = 30V
Q
g
, GATE CHARGE(nC)
V
GS
, GATE TO SOURCE VOLTAGE(V)
FDH5500_F085 N-Channel UltraFET Power MOSFET
Figure 11. Normalized Gate Threshold Voltage vs
Junction Temperature
Figure 13. Capacitance vs Drain to Source
Voltage
Figure 12. Normalized Drain to Source
Breakdown Voltage vs Junction Temperature
Figure 14. Gate Charge vs Gate to Source Voltage
FDH5500_F085 Rev. A1 www.fairchildsemi.com6
Page 7
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FDH5500_F085 N-Channel UltraFET Power MOSFET
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Datasheet Identification Product Status Definition
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
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FDH5500_F085 Rev. A1 www.fairchildsemi.com7
Rev. I36
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