Page 1
FDD86110
G
S
D
TO-252
D-PAK
(TO-252)
D
G
S
N-Channel PowerTrench® MOSFET
100 V, 50 A, 10.2 mΩ
FDD86110 N-Channel PowerTrench
October 2011
Features
Max r
Max r
100% UIL tested
RoHS Compliant
= 10.2 mΩ at VGS = 10 V, ID = 12.5 A
DS(on)
= 16 mΩ at VGS = 6 V, ID = 9.8 A
DS(on)
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench
been especially tailored to minimize the on-state resistance and
yet maintain superior switching performance.
®
process that has
Application
DC - DC Conversion
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Drain to Source Voltage 100 V
Gate to Source Voltage ±20 V
Drain Current -Continuous (Package limited) TC = 25 °C 50
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 60
Single Pulse Avalanche Energy (Note 3) 135 mJ
Power Dissipation TC = 25 °C 127
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
= 25 °C unless otherwise noted
C
= 25 °C 80
C
= 25 °C (Note 1a) 12.5
A
= 25 °C (Note 1a) 3.1
A
A
W
Thermal Characteristics
R
θJC
R
θJA
Thermal Resistance, Junction to Case 0.98
Thermal Resistance, Junction to Ambient (Note 1a) 40
°C/W
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDD86110 FDD86110 D-PAK(TO-252) 13 ’’ 12 mm 2500 units
©2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com
FDD86110 Rev.C
Page 2
FDD86110 N-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV
ΔT
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 80 V, V
Gate to Source Leakage Current VGS = ±20 V, V
I
= 250 μA, referenced to 25 °C 72 mV/°C
D
= 0 V 1 μA
GS
= 0 V ±100 nA
DS
On Characteristics
V
GS(th)
ΔV
ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA22.84V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 μA, referenced to 25 °C -10 mV/°C
D
V
= 10 V, ID = 12.5 A 8.5 10.2
GS
= 6 V, ID = 9.8 A 11.3 16
GS
= 10 V , ID = 12.5 A,TJ = 125°C 15 18
V
GS
Forward Transconductance VDS = 10 V, ID = 12.5 A 38 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 379 505 pF
Reverse Transfer Capacitance 17 30 pF
Gate Resistance 0.5 Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time
Rise Time 5.4 10 ns
Turn-Off Delay Time 19 35 ns
Fall Time 3.9 10 ns
Total Gate Charge VGS = 0 V to 10 V
Gate to Source Charge 7.1 nC
Gate to Drain “Miller” Charge 5.2 nC
= 50 V, VGS = 0 V,
V
DS
f = 1MHz
= 50 V, ID = 12.5 A,
V
DD
V
= 10 V, R
GS
GEN
= 6 Ω
V
DD
I
= 12.5 A
D
= 50 V,
1702 2265 pF
12 20 ns
25 35 nC
mΩV
®
MOSFET
Drain-Source Diode Characteristics
V
= 0 V, IS = 12.5 A (Note 2) 0.80 1.3 V
V
SD
t
rr
Q
rr
Notes:
1: R
θJA
R
θJC
2: Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.
3: Starting T
©2011 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com
FDD86110 Rev.C
Source-Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 60 96 nC
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
is guaranteed by design while R
= 25 °C, L = 0.3 mH, IAS = 30 A, VDD = 90 V, VGS = 10 V.
J
is determined by the user’s board design.
θJA
a)
40 °C/W when mounted on a
1 in2 pad of 2 oz copper
GS
= 0 V, IS = 2.6 A (Note 2) 0.72 1.2
V
GS
= 12.5 A, di/dt = 100 A/μs
I
F
b)
52 83 ns
96 °C/W when mounted on
a minimum pad
Page 3
FDD86110 N-Channel PowerTrench
012345
0
15
30
45
60
VGS = 5.5 V
VGS = 5 V
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 6 V
VGS = 4.5 V
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
0 15304560
0
1
2
3
4
5
VGS = 5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
I
D
, DRAIN CURRENT (A)
V
GS
= 4.5 V
VGS = 6 V
VGS = 5.5 V
V
GS
= 10 V
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ID = 12.5 A
V
GS
= 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
T
J
, JUNCTION TEMPERATURE (
o
C)
45678910
0
10
20
30
40
50
TJ = 125 oC
ID = 12.5 A
TJ = 25 oC
V
GS
, GATE TO SOURCE VOLTA G E (V)
r
DS(on)
,
DRAIN TO
SOURCE ON-RESISTANCE
(mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
234567
0
15
30
45
60
TJ = 25 oC
TJ = 150 oC
V
DS
= 5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
I
D
, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
10
100
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
V
GS
= 0 V
I
S
, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Typical Characteristics T
Figure 1.
On Region Characteristics Figure 2.
= 25 °C unless otherwise noted
J
Nor mal ize d O n-R esi sta nce
vs Drain Current and Gate Voltage
®
MOSFET
Figure 3. N or malized On Re sistanc e
vs Junction Temperature
©2011 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com
FDD86110 Rev.C
Figure 5. Transfer Characteristics
Figure 4.
On-Resist ance vs Gate to
Source Voltage
Figure 6.
Source to D rain Diode
Forward Voltage vs Source Current
Page 4
FDD86110 N-Channel PowerTrench
0 5 10 15 20 25
0
2
4
6
8
10
ID = 12.5 A
VDD = 50 V
V
DD
= 25 V
V
GS
, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 75 V
0.1 1 10 100
10
100
1000
5000
f = 1 MHz
V
GS
= 0 V
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
C
rss
C
oss
C
iss
0.001 0.1 1 10 100
1
10
100
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALAN CHE (ms)
I
AS
, AVALANCHE CURRENT (A)
25 50 75 100 125 150
0
20
40
60
80
Limited by P ack ag e
V
GS
= 6 V
R
θJC
= 0.98 oC/W
V
GS
= 10 V
I
D
, DRAIN CURRENT (A)
T
C
, CASE TEMPERATURE (
o
C)
0.1 1 10 100 400
0.5
1
10
80
10 ms
100 μs
DC
1 ms
I
D
, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS
LIMITED BY r
DS(on)
SINGLE PULSE
T
J
= MAX RATED
R
θJC
= 0.98
o
C/W
T
C
= 25
o
C
10
-5
10
-4
10
-3
10
-2
10
-1
1
50
100
1000
10000
SINGLE PULSE
R
θJC
= 0.98
o
C/W
T
C
= 25
o
C
P(
PK
), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (sec)
Typical Characteristics T
Figure 7.
Gate Charge Characteristics Figure 8.
= 25 °C unless otherwise noted
J
Cap aci t anc e vs Dra in
to Source Voltage
®
MOSFET
Figure 9.
Unc l amp e d In d uct i ve
Switching Capability
©2011 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com
FDD86110 Rev.C
Figure 11.
Forward Bias Safe
Operating Area
Figure 10.
Maximum Continous Drain Current
vs. Case Temperature
Figure 12.
Single Pulse Maximum
Power Dissipation
Page 5
FDD86110 N-Channel PowerTrench
10
-5
10
-4
10
-3
10
-2
10
-1
1
0.01
0.1
1
SINGLE PULSE
R
θJC
= 0.98 oC/W
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE,
Z
θJC
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.05
0.02
0.01
2
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t1/t
2
PEAK TJ = PDM x Z
θJC
x R
θJC
+ T
C
Typical Characteristics T
Figure 13.
= 25 °C unless otherwise noted
J
Junction-to-Case Transient Thermal Response Curve
®
MOSFET
©2011 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com
FDD86110 Rev.C
Page 6
tm
®
tm
™
tm
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The following includes registered and unregistered trade marks and service marks, o wned by Fairchild Semicond uctor and/or its g lobal subsidiaries, and i s not
intended to be an exhaustive list of all such trademarks.
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®
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Saving our world, 1mW/W/kW at a time™
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®
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®
®
®
*
FDD86110 N-Channel PowerTrench
®
MOSFET
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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As used here in:
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intended for surgical implant into the body or ( b) su pport or susta in life ,
and (c) whose failure to perform when properly used in accordance with
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PRODUCT STATUS DEFINITIONS
Definition of Terms
.
Datasheet Identification Product Status Definition
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
©2011 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com
FDD86110 Rev.C
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I58
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