Gate to Source Leakage CurrentVGS = ±20V - - ±100nA
Gate to Source Threshold VoltageVGS = VDS, ID = 250μA22.54V
Drain to Source On Resistance
= 25°C unless otherwise noted
J
V
= 32V --1
DS
= 0V TJ = 150oC -- 250
V
GS
= 50A, VGS= 10V -45.2
I
D
I
= 50A, VGS= 10V,
D
T
= 175oC
J
-7.29.4
C/W
C/W
μA
mΩ
®
MOSFET
C
iss
C
oss
C
rss
R
G
Q
g(TOT)
Q
g(5)
Q
g(TH)
Q
gs
Q
gs2
Q
gd
Input Capacitance
Output Capacitance -585-pF
Reverse Transfer Capacitance -332-pF
= 25V, VGS = 0V,
V
DS
f = 1MHz
Gate Resistancef = 1MHz-1.9 -Ω
Total Gate Charge at 10VVGS = 0 to 10V
Total Gate Charge at 5VVGS = 0 to 5V4356nC
Threshold Gate ChargeVGS = 0 to 2V -1114.3nC
Gate to Source Gate Charge
Gate Charge Threshold to Plateau -11 -nC
Gate to Drain “Miller“ Charge -20 -nC
FDD8444 Rev B (W)www.fairchildsemi.com2
V
DD
I
= 50A
D
I
= 1.0mA
g
-6195-pF
-89116nC
= 20V
-23-nC
Page 3
FDD8444 N-Channel PowerTrench
Electrical Characteristics T
= 25oC unless otherwise noted
J
SymbolParameterTest ConditionsMinTypMaxUnits
Switching Characteristics
t
on
t
d(on)
t
r
t
d(off)
t
f
t
off
Turn-On Time
Turn-On Delay Ti me-12-ns
Turn-On Rise Time-78-n s
Turn-Off Delay Time-48-n s
Turn-Off Fall Time-15-n s
Turn-Off Time--9 5ns
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Notes:
1: Package current limitation is 50A.
2: Starting TJ = 25oC, L = 0.67mH, IAS = 40A
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge-4559nC
= 20V, ID = 50A
V
DD
V
= 10V, RGS = 2Ω
GS
I
= 50A-0.91.25
SD
= 25A-0.81.0
I
SD
= 50A, dIF/dt = 100A/μs
I
F
--135ns
-3951ns
V
®
MOSFET
This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For
All Fairchild Semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems
FDD8444 Rev B (W)www.fairchildsemi.com3
a copy of the requirements, see AEC Q101 at: http://www.aecouncil.com/
certification.
Page 4
Typical Characteristics
0255075100125150175
0.0
0.2
0.4
0.6
0.8
1.0
1.2
POWER DISSIPATION MULIPLIER
TC, CASE TEMPERATURE(oC)
255075100125150175
0
20
40
60
80
100
120
140
160
CURRENT LIMITED
BY PACKAGE
VGS = 10V
TC, CASE TEMPERATURE(oC)
I
D
, DRAIN CURRENT (A)
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
0.01
0.1
1
SINGLE PULSE
D = 0.50
0.20
0.10
0.05
0.02
0.01
NORMALIZED THERMAL
IMPEDANCE, Z
θJC
t, RECTANGULAR PULSE DURATION(s)
DUTY CYCLE - DESCENDING ORDER
2
NOTES:
DUTY FACTOR: D = t1/t
2
PEAK TJ = PDM x Z
θJC
x R
θJC
+ T
C
P
DM
t
1
t
2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
100
1000
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
VGS = 10V
SINGLE PULSE
I
DM
, PEAK CURRENT (A)
t, RECTANGULAR PULSE DURATION(s)
2000
TC = 25oC
I = I
25
175 - T
C
150
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
FDD8444 N-Channel PowerTrench
®
MOSFET
Figure 1. Normalized Power Dissipation vs Case
Temperature
Figure 3. Normalized Maximum Transient Thermal Impedance
Figure 2. Maximum Continuous Drain Current vs
Case Temperature
FDD8444 Rev B (W)www.fairchildsemi.com4
Figure 4. Peak Current Capability
Page 5
Typical Characteristics
110100
0.1
1
10
100
1000
CURRENT LIMITED
BY PACKAGE
10us
100us
1ms
10ms
I
D
, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(on)
SINGLE PULSE
T
J
= MAX RATED
T
C
= 25
o
C
DC
0.010.11101001000
1
10
100
STARTING TJ = 150oC
STARTING TJ = 25oC
I
AS
, AVALANCHE CURRENT (A)
tAV, TIME IN AVALANCHE (ms)
500
tAV = (L)(IAS)/(1.3*RATED BV
DSS
- VDD)
If R = 0
If R
≠
0
t
AV
= (L/R)ln[(IAS*R)/(1.3*RATED BV
DSS
- VDD) +1]
2.02.53.03.54.04.55.0
0
20
40
60
80
100
TJ = -55oC
TJ = 25oC
TJ = 175oC
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
V
DD
= 5V
I
D
, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
0.00.30.60.91.21.5
0
20
40
60
80
100
V
GS
= 4.5V
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
I
D
, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 10V
VGS = 5V
V
GS
= 4V
45678910
2
4
6
8
10
12
14
TJ = 25oC
I
D
= 50A
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
TJ = 175oC
r
DS(on)
, DRAIN TO SOURCE
ON-RESISTANCE
(mΩ)
V
GS
, GATE TO SOURCE VOLTAGE (V)
-80-4004080120160200
0.6
0.8
1.0
1.2
1.4
1.6
1.8
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
ID = 50A
V
GS
= 10V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
TJ, JUNCTION TEMPERATURE(oC)
FDD8444 N-Channel PowerTrench
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching
Capability
Figure 7. Transfer CharacteristicsFigure 8. Saturation Characteristics
®
MOSFET
FDD8444 Rev B (W)www.fairchildsemi.com5
Figure 9. Drain to Source On-Resistance
Variation vs Gate to Source Voltage
Figure 10. Normalized Drain to Source On
Resistance vs Junction Temperature
Page 6
Typical Characteristics
-80-4004080120160200
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
V
GS
= V
DS
I
D
= 250μA
NORMALIZED GATE
THRESHOLD VOLTAGE
TJ, JUNCTION TEMPERATURE(oC)
-80-4004080120160200
0.90
0.95
1.00
1.05
1.10
1.15
I
D
= 250μA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
0.1110
100
1000
10000
f = 1MHz
V
GS
= 0V
C
rss
C
oss
C
iss
VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
40
0 20406080100
0
2
4
6
8
10
ID = 50A
VDD = 25V
VDD = 20V
V
GS
, GATE TO SOURCE VOLTAGE(V)
Q
g
, GATE CHARGE(nC)
VDD = 15V
Figure 11. Normalized Gate Threshold Voltage vs
Junction Temperature
Figure 12. Normalized Drain to Source
Breakdown Voltage vs Junction Temperature
FDD8444 N-Channel PowerTrench
®
MOSFET
Figure 13. Capacitance vs Drain to Source
Voltage
FDD8444 Rev B (W)www.fairchildsemi.com6
Figure 14. Gate Charge vs Gate to Source Voltage
Page 7
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®
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when properly used in accordance with instructions for use
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device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In Design This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary First Production This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
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reserves the right to make changes at any time without notice to improve
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