Datasheet FDD8424H Datasheet (Fairchild)

tm

FDD8424H

Dual N & P-Channel PowerTrench® MOSFET

N-Channel: 40V, 20A, 24mΩ P-Channel: -40V, -20A, 54mΩ

FDD8424H Dual N & P-Channel PowerTrench

March 2007

Features

Q1: N-Channel

 Max r  Max r

Q2: P-Channel

 Max r  Max r  Fast switching speed

 RoHS Compliant

MOSFET Maximum Ratings T

Symbol Parameter Q1 Q2 Units

V

DS

V

GS

I

D

P

D

E

AS

, T

T

J

= 24mΩ at VGS = 10V, ID = 9.0A

DS(on)

= 30mΩ at VGS = 4.5V, ID = 7.0A

DS(on)

= 54mΩ at VGS = -10V, ID = -6.5A

DS(on)

= 70mΩ at VGS = -4.5V, ID = -5.6A

DS(on)

D1/D2

Dual DPAK 4L

Drain to Source Voltage 40 -40 V Gate to Source Voltage ±20 ±20 V Drain Current - Continuous (Package Limited) 20 -20

- Continuous (Silicon Limited) T

- Continuous T

- Pulsed 55 -40 Power Dissipation for Single Operation TC = 25°C (Note 1) 30 35

T Single Pulse Avalanche Energy (Note 3) 29 33 mJ

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

S1

G2

S2

G1

= 25°C unless otherwise noted

C

General Description

These dual N and P-Channel enhancement mode Power MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench- process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance.

Application

 Inverter  H-Bridge

G1

N-Channel P-Channel

= 25°C 26 -20

C

= 25°C 9.0 -6.5

A

= 25°C (Note 1a) 3.1

A

= 25°C (Note 1b) 1.3

A

D1 D2

G2

S1

S2

Thermal Characteristics

®

MOSFET

A

W T

R

θJC

R

θJC

Thermal Resistance, Junction to Case, Single Operation for Q1 (Note 1) 4.1 Thermal Resistance, Junction to Case, Single Operation for Q2 (Note 1) 3.5

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

FDD8424H FDD8424H TO-252-4L 13” 12mm 2500 units

°C/W

1

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FDD8424H Dual N & P-Channel PowerTrench

Electrical Characteristics T

= 25°C unless otherwise noted

J

Symbol Parameter Test Conditions Type Min Typ Max Units

Off Characteristics

BV

∆BV ∆T

I

DSS

I

GSS

DSS

DSS J

Drain to Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient Zero Gate Voltage Drain Current

Gate to Source Leakage Current VGS = ±20V, V

On Characteristics

V

GS(th)

∆V ∆T

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage Gate to Source Threshold Voltage

Temperature Coefficient

Static Drain to Source On Resistance

Forward Transconductance

ID = 250µA, VGS = 0V ID = -250µA, VGS = 0V

ID = 250µA, referenced to 25°C ID = -250µA, referenced to 25°CQ1Q2

VDS = 32V, V VDS = -32V, V

GS GS

DS

= 0V = 0V

= 0V

VGS = VDS, ID = 250µA VGS = VDS, ID = -250µA

ID = 250µA, referenced to 25°C ID = -250µA, referenced to 25°C

VGS = 10V, ID = 9.0A VGS = 4.5V, ID = 7.0A VGS = 10V, ID = 9.0A, TJ = 125°C

VGS = -10V, ID = -6.5A VGS = -4.5V, ID = -5.6A VGS = -10V, ID = -6.5A, TJ = 125°C

VDS = 5V, ID = 9.0A VDS = -5V, ID = -6.5A

Q1Q240

-40

Q1 Q2

Q1Q21

Q1 Q2

Q1

Q2

Q1 Q2

-1

V

34

-32

mV/°C

1

-1

±100 ±100nAnA

1.7

-1.6

-5.3

4.8 19

23 29

42 58 62

3

-3 mV/°C

24 30 37

54 70 80

29 13

µA

V

mΩ

S

®

MOSFET

Dynamic Characteristics

C

iss

C

oss

C

rss

R

g

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Gate Resistance f = 1MHz

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

g(TOT)

Q

gs

Q

gd

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Total Gate Charge

Gate to Source Charge

Gate to Drain “Miller” Charge

Q1 V

= 20V, VGS = 0V, f = 1MHZ

DS

Q2 V

= -20V, VGS = 0V, f = 1MHZ

DS

Q1 VDD = 20V, ID = 9.0A, VGS = 10V, R

GEN

= 6Ω

Q2 VDD = -20V, ID = -6.5A, VGS = -10V, R

GEN

= 6Ω

Q1 VGS = 10V, VDD = 20V, ID = 9.0A

Q2 VGS = -10V, VDD = -20V, ID = -6.5A

Q1 Q2

750

115 140

75 75

1.1

3.3

7 7

13

3

17 20

6 3

14 17

2.3

3.0

3.2

3.6

1000 1330

155 185

115 115

14 14

24 10

31 36

12 10

20 24

pF

Ω

ns

nC

1000

2

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FDD8424H Dual N & P-Channel PowerTrench

Electrical Characteristics T

= 25°C unless otherwise noted

J

Symbol Parameter Test Conditions Type Min Typ Max Units

Drain-Source Diode Characteristics

V

= 0V, IS = 9.0A (Note 2)

V

SD

t

rr

Q

rr

Notes:

1. R

is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

θJA

by the user's board design.

Source to Drain Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Q1

Q2

a. 40°C/W when mounted on a 1 in

Scale 1 : 1 on letter size paper

a. 40°C/W when mounted on a 1 in

2

GS

V

= 0V, IS = -6.5A (Note 2)Q1Q2

GS

Q1 I

= 9.0A, di/dt = 100A/s

F

Q2 I

= -6.5A, di/dt = 100A/s

F

pad of 2 oz copper

0.87

0.88

Q1 Q2

is guaranteed by design while R

θJC

b. 96°C/W when mounted on a minimum pad of 2 oz copper

25 29

19 29

1.2

-1.2 38

44 29

44

is determined

θCA

V

ns

nC

®

MOSFET

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.

3. Starting TJ = 25°C, N-ch: L = 0.3mH, IAS = 14A, VDD = 40V, VGS = 10V; P-ch: L = 0.3mH, IAS = -15A, VDD = -40V, VGS = -10V.

3

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FDD8424H Dual N & P-Channel PowerTrench

Typical Characteristics (Q1 N-Channel)T

60

50

VGS = 10V

40

30

VGS = 4.5V

PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX

20

, DRAIN CURRENT (A)

D

I

10

0

01234

VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 1.

On- Region Characteristics Figure 2.

1.8

ID = 9A V

= 10V

GS

1.6

1.4

1.2

1.0

NORMALIZED

0.8

DRAIN TO SOURCE ON-RESISTANCE

0.6

-75 -50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC)

Fig ure 3. N ormalize d On -Re sis tan ce

vs Junction Temperature

VGS = 4.0V

VGS = 3.5V

VGS = 3.0V

= 25°C unless otherwise noted

J

3.0

VGS = 3.0V

2.5

V

GS

= 3.5V

NORMALIZED

2.0

1.5

1.0

DRAIN TO SOURCE ON-RESISTANCE

0.5 0 102030405060

ID, DRAIN CURRENT(A)

Nor mal i zed On- R esi sta n ce

vs Drain Current and Gate Voltage

50

(mΩ)

40

30

, DRAIN TO

DS(on)

r

20

SOURCE ON-RESISTANCE

10

246810

VGS, GATE TO SO URCE VOLT AGE ( V)

Figure 4.

On-Re sistance vs Gate to

Source Voltage

ID = 9A

PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX

V

= 4.0V

GS

V

= 4.5V

GS

V

GS

PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX

TJ = 125oC

o

T

= 25

C

J

= 10V

®

MOSFET

60

PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX

50

V

= 5V

DS

40

30

20

, DRAIN CURRENT (A)

D

I

10

0

1.5 2.0 2.5 3.0 3.5 4.0 4.5

TJ = 150oC

VGS, GATE TO SOURCE VOLTAGE (V)

Figure 5. Transfer Characteristics

TJ = -55oC

TJ = 25oC

60

V

= 0V

GS

10

TJ = 150oC

1

0.1

0.01

, REVERSE DRAIN CURRENT (A)

S

I

0.001

0.0 0.3 0.6 0.9 1.2 1.5

VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 6.

Sourc e to Dr ain Di ode

TJ = 25oC

TJ = -55oC

Forward Voltage vs Source Current

4

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FDD8424H Dual N & P-Channel PowerTrench

Typical Characteristics (Q1 N-Channel)T

10

ID = 9A

8

6

V

= 15V

4

DD

V

= 25V

DD

2

, GATE TO SOURCE VOLTAGE(V)

GS

V

0

0 4 8 12 16

Q

, GATE CHARGE(nC)

Figure 7.

g

Gate Charge Characteristics Figure 8.

30

10

TJ = 25oC

TJ = 125oC

, AVALANCHE CURRENT(A)

AS

I

1

0.001 0.01 0.1 1 10 100

tAV, TIME IN AVALA NCHE (ms)

Figure 9.

Uncl a mped I n duc t i ve

Switching Capability

100

10

THIS AREA IS

LIMITED BY r

1

, DRAIN CURRENT (A)

D

I

0.1 110

DS(on)

SINGLE PULSE T

= MAX RATED

J

R

= 4.1oC/W

θJC

o

T

= 25

C

V

, DRAIN to SOURCE VOLTAGE (V)

DS

Figur e 11. Forward Bias Saf e

Operating Area

V

= 20V

DD

10us

100us

1ms

10ms

DC

80

= 25°C unless otherwise noted

J

2000

1000

100

CAPACITANCE (pF)

f = 1MHz V

= 0V

GS

30

0.1 1 10

30

25

20

15

10

, DRAIN CURRENT (A)

D

I

5

R

= 4.1oC/W

θJC

0

25 50 75 100 125 150

F i g u r e 1 0 . M a x i m u m C o n t i n u ou s D ra i n

Current vs Case Temperature

10000

VGS = 10V

1000

100

-5

10

SINGLE PULSE R

θJC

10

), PEAK TRANSIENT POWER (W)

PK

P(

10

Figure 12.

C

iss

C

oss

C

rss

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

Cap a cit a nce v s Dra i n

to Source Voltage

Limited by Package

V

= 10V

GS

V

= 4.5V

GS

T

, CASE TEMPERATURE (

C

o

C)

FOR TEMPERATURES

o

ABOVE 25 CURRENT AS FOLLOWS:

I = I

25

C DERATE PEAK

150 TC–

----------------------- -

125

TC = 25oC

= 4.1oC/W

-4

-3

-2

10

t, PULSE WIDTH (s)

-1

10

10010

Sin gle P uls e Ma x imu m

Power Dissipation

40

®

MOSFET

1

5

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FDD8424H Dual N & P-Channel PowerTrench

Typical Characteristics (Q1 N-Channel)T

2

DUTY CYCLE-DESCENDING ORDER

1

D = 0.5

θJC

0.1

IMPEDANCE, Z

NORMALIZED THERMAL

0.01

0.005

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE R

= 4.1oC/W

θJC

-5

10

-4

10

-3

10

t, RECTANGULAR PULSE DURATION (s)

Figure 13. Transient Thermal Response Curve

= 25°C unless otherwise noted

J

NOTES: DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

10

-1

10

P

θJC

DM

1/t2

x R

10

t

1

t

2

+ T

θJC

C

0

1

10

®

MOSFET

6

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FDD8424H Dual N & P-Channel PowerTrench

®

MOSFET

7

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FDD8424H Dual N & P-Channel PowerTrench

Typical Characteristics (Q2 P-Channel)

40

30

VGS = -10V

20

, DRAIN CURRENT (A)

D

10

-I

0

01234

-VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 14. On- Region Charac ter is tics

1.6

ID = -6.5A V

= -10V

GS

1.4

1.2

1.0

NORMALIZED

0.8

DRAIN TO SOURCE ON-RESISTANCE

0.6

-75 -50 -25 0 25 50 75 100 125 150

T

, JUNCTION TE MPERATURE (

J

PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX

VGS = -4.5V

VGS = -4V

VGS = -3.5V

VGS = -3V

o

C)

TJ = 25°C unless otherwise noted

3.0

VGS = -3V

2.5

VGS = -3.5V

2.0

1.5

NORMALIZED

1.0

0.5

DRAIN TO SOURCE ON-RESISTANCE

0 10203040

Figure 15. Normalized on-Resistance vs Drain

Current and Gate Voltage

160

(mΩ)

120

80

, DRAIN TO

DS(on)

r

40

SOURCE ON-RESISTANCE

0

246810

ID = -6.5A

-VGS, GATE TO SO URCE VOLT AGE (V)

PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX

VGS = -4V

VGS = -4.5V

VGS = -10V

-ID, DRAIN CURRENT(A)

PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX

TJ = 125oC

o

T

= 25

J

®

MOSFET

C

Figure 16. Normalized On-Resistance

vs Junction Temperature

40

PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX

30

V

= -5V

DS

20

10

, DRAIN CURRENT (A)

D

-I

0

12345

TJ = 150oC

-V

, GATE TO SOURCE V OLTA G E (V)

GS

Figure 18. Transfer Characteristics

TJ = -55oC

TJ = 25oC

Figure 17. On-Resistance vs Gate to

Source Voltage

40

V

= 0V

GS

10

1

TJ = 25oC

0.1

TJ = 150oC

TJ = -55oC

0.01

, REVERSE DRAIN CURRENT (A)

S

-I

0.001

0.0 0.3 0.6 0.9 1.2 1.5

-VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 19. Source to Drain Diode

Forward Voltage vs Source Current

8

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FDD8424H Dual N & P-Channel PowerTrench

Typical Characteristics (Q2 P-Channel)T

10

ID = -6.5A

8

VDD = -15V

6

4

2

, GATE TO SOURCE VOLTAGE(V)

GS

-V

0

048121620

Qg, GATE CHARGE(nC)

Figure 20. Gate Charge Characteristics

30

10

, AVALANCHE CURRENT(A)

AS

-I

1

0.001 0.01 0.1 1 10 100

TJ = 125oC

tAV, TIME IN AVALANCHE(ms)

TJ = 25oC

VDD = -25V

V

= -20V

DD

= 25°C unless otherwise noted

J

2000

1000

100

CAPACITANCE (pF)

f = 1MHz V

= 0V

GS

30

0.1 1 10

-VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 21. Capacitance vs Drain

to Source Voltage

25

20

15

10

, DRAIN CURRENT (A)

D

-I

5

R

= 3.5oC/W

θJC

0

25 50 75 100 125 150

TC, CASE TEMPERA TURE (oC)

C

iss

C

oss

C

rss

40

®

MOSFET

V

= -10V

GS

V

= -4.5V

GS

Figure 22. Unclamped Inductive

Switching Capability

100

10

THIS AREA IS LIMITED BY r

1

, DRAIN CURRENT (A)

D

-I

0.1 110

ds(on)

SINGLE PULSE T

= MAX RATED

J

R

= 3.5oC/W

θJC

o

= 25

C

T

C

-VDS, DRAIN to SOURCE VOLTAGE (V)

Figure 24

. Forward B ias Safe

Operating Area

Fig ure 23. Max im um Conti nuo us D rai n

Current vs Case Temperature

10000

10us

100us

1ms 10ms

DC

1000

100

), PEAK TRANSIENT POWER (W)

PK

P(

80

10

10-510-410-310-210-110010110210

VGS = -10V

SINGLE PULSE

= 3.5oC/W

R

θJC

Figure 25.

t, PULS E WIDTH (s )

Single Pulse Maximum

FOR TEMPERATURES

o

ABOVE 25 CURRENT AS FOLLOWS:

I = I

25

C DERATE PEAK

150 TC–

----------------------- -

125

TC = 25oC

3

Power Dissipation

9

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FDD8424H Dual N & P-Channel PowerTrench

Typical Characteristics (Q2 P-Channel)T

2

1

DUTY CYCLE-DESCENDING ORDER

D = 0.5

θJC

0.1

IMPEDANCE, Z

NORMALIZED THERMAL

0.01

0.005

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

o

= 3.5

θJC

C/W

-4

10

-3

10

R

-5

10

t, RECTANGULAR PULSE DURATION (s)

Figure 26. Transient Thermal Response Curve

= 25°C unless otherwise noted

J

NOTES: DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

10

-1

10

P

DM

t

1

t

2

1/t2

x R

+ T

θJC

C

0

10

1

10

®

MOSFET

10

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FDD8424H Dual N & P-Channel PowerTrench

®

MOSFET

11

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TRADEMARKS

tm

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

®

ACEx Across the board. Around the world.™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ CTL™ Current Transfer Logic™ DOME™

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FDD8424H Dual N & P-Channel PowerTrench

®

MOSFET

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTE MS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification

Advance Information

Product Status Formative or In Design

Preliminary First Production This datasheet contains preliminary data; supplementary data will

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Obsolete

Not In Production

2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

Definition

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

Semiconductor reserves the right to make changes at any time without notice to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor.The datasheet is printed for reference information only.

Rev. I24

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