Page 1
FDD6680
N-Channel Logic Level PWM Optimized PowerTrench™ MOSFET
FDD6680
July 1999
General Description
This N-Channel Logic level MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers.
The MOSFET features faster switching and lower gate
charge than other MOSFETs with comparable R
specifications. The result is a MOSFET that is easier to
drive, even at very high frequencies, and DC/DC power
supply designs with higher overall efficiency .
DS(on)
Features
• 55 A, 30 V . R
R
DS(on)
DS(on)
= 0.010 Ω @ V
= 0.015 Ω @ V
= 10 V
GS
= 4.5 V .
GS
• Optimized for use in high frequency DC/DC converters.
• Low gate charge (19nC typical).
• Very Fast switching.
Applications
• DC/DC converter
• Motor drives
D
D
G
G
S
TO-252
=25oC unless otherwise noted
Absolute Maximum Ratings
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
stg
Drain-Source Voltage 30 V
Gate-Source V oltage
Maximum Drain Cur r ent -Continuous
(Note 1 a )
Maximum Drain Current -Pulsed 100
Maximum Power Dissipation @ TC = 25oC
TA = 25oC
Op erating and Storage Junction Temperatur e Range -55 to +150
T
C
TA = 25oC
(Note 1)
(Note 1)
(Note 1a )
(Note 1b )
S
20
±
55
14
60
3.2
1.3
W
°
V
A
C
Thermal Characteristics
R
θ
JC
R
θ
JA
Therm al Resistance, Junc tion-to- Case
Therm al Resistance, Junc tion-to- Ambient
(Note 1 b )
(Note 1)
(Note 1a)
2.1
40
96
Package Marking and Ordering Information
Device M arking Device Reel Size Tape width Quantity
FDD6680 FDD6680 13’’ 16m m 2500
1999 Fairchild Semiconductor Corporation
C/W
°
C/W
°
C/W
°
FDD6680, Rev.B
Page 2
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
FDD6680
Drain-Source Avalanche ratings
W
DSS
I
AR
Single Pulse Drain-Source
Avalanche Energy
Maximum Drain-Source Avalanche Current 55 A
Off Characteri stics
BV
DSS
BV
∆
DSS
T
∆
J
I
DSS
I
GSSF
I
GSSR
On Characteri st ics
V
GS(th)
V
∆
GS(th)
T
∆
J
R
DS(on)
I
D(on)
g
FS
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1
Gate-Body Leakage Current,
Forwa rd
Gate-Body Leakage Current,
Reverse
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain-Source
On-Resistance
On-State Drain Current VGS = 10 V, VDS = 5 V 50 A
Forward Transconductance VDS = 5 V, ID = 14 A 38 S
Dynamic Characteri st ics
C
iss
C
oss
C
rss
Input Capacitance 2070 pF
Output Capacitance 510 pF
Reverse Transfer Capacitance
(Note 2)
VDD = 15 V, IL = 55 A 170 mJ
V
= 0 V, ID = 250 µA
GS
I
= 250µA,Reference d to 25°C
D
30 V
18
VGS = 20V, VDS = 0 V 100 nA
VGS = -20 V, VDS = 0 V -100 nA
V
= VGS, ID = 250 µA
DS
=250µA,Reference d to 25°C
I
D
VGS =10V, ID = 14A
V
=10V, ID = 14A, TJ =125°C
GS
V
= 4.5V, ID = 12 A
GS
= 15 V,
V
DS
V
= 0 V,
GS
f = 1.0 MHz
12 3 V
-5.5
0.008
0.013
0.012
0.010
0.017
0.015
235 pF
mV/°C
A
µ
mV/°C
Ω
Switching Characteri stics
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time 15 28 ns
Turn-On Rise Time 18 33 ns
Turn-Off Delay Time 40 64 ns
Turn-Off Fall Time
Total Gate Charge 19 27 nC
Gate-Source Charge 7 nC
Gate -Drain Charge
(Note 2)
V
= 15 V, ID = 1 A,
DD
V
= 10 V, R
GS
= 15 V, ID = 14A,
V
DS
V
= 5V,
GS
GEN
= 6
Ω
Drain-Source Diode Ch aracteristics and M aximum Rating s
I
S
V
SD
Notes:
1. R
θJA
design while R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
Maximum Continuous Drain-Source Diode Forward Current 2.3 A
Drain-Source Diode
VGS = 0 V, IS = 2.3 A
(Note 2)
ForwardVoltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the drain tab. R
is determined by the user's board design.
θCA
a) R
θJA
on a 1in2 pad of 2oz copper.
= 40oC/W when mounted
b) R
= 96oC/W on a minimum
θJA
mounting pad.
18 33 ns
6nC
0.75 1.2 V
is guaranteed by
θJC
FDD6680, Rev.B
Page 3
Typical Characteristics
25oC
FDD6680
60
VGS = 10V
50
40
30
20
10
, DRAIN-SOURCE CURRENT (A)
D
I
5V
4.5V
4.0V
3.5V
0
012345
, DRAIN-SOURCE VOLTAGE (V)
V
DS
Figure 1. On-Region Characteristics.
1.8
ID = 14A
V
= 10V
GS
1.6
1.4
1.2
, NORMALIZED
1
DS(ON)
R
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
T
, JUNCTION TEMPERATURE (oC)
J
2.2
2
1.8
1.6
1.4
, NORMALIZED
DS(ON)
1.2
R
DRAIN-SOURCE ON-RESISTANCE
0.8
VGS = 4.0V
4.5V
5.0V
6.0V
1
0 102030405060
, DRAIN CURRENT (A)
I
D
10V
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
0.04
0.03
0.02
=
, ON-RESISTANCE (OHM)
0.01
DS(ON)
R
0
246810
, GATE TO SOURCE VOLTAGE (V)
V
GS
T
= 25oC
ID = 7A
o
Figure 3. On-Resistance Variation
with Temperature.
60
VDS =5V
50
40
30
20
, DRAIN CURRENT (A)
D
I
10
0
12345
V
, GATE TO SOURCE VOLTAGE (V)
GS
TA = -55oC
o
Figure 4. On-Resistance Variation
with Gate-to-Source Voltage.
100
VGS=0
10
T
1
0.1
0.01
0.001
, REVERSE DRAIN CURRENT (A)
S
I
0.0001
0 0.2 0.4 0.6 0.8 1 1.2
=125oC
25oC
-
, BODY DIODE VOLTAGE (V)
V
SD
o
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDD6680, Rev.B
Page 4
T ypical Characteristics (continued)
FDD6680
10
ID = 14A
VDS = 5V
8
6
4
2
, GATE-SOURCE VOLTAGE (V)
GS
V
0
0 10203040
, GATE CHARGE (nC)
Q
g
2500
2000
C
1500
ISS
1000
CAPACITANCE (pF)
500
0
C
OSS
C
RSS
0 5 10 15 20 25 30
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
Figure 7. Gate-Charge Characteristics. Figure 8. Capacitance Characteristics.
100
R
LIMIT
DS(ON)
10
100ms
10ms
1ms
100µs
1S
1
10S
DC
, DRAIN CURRENT (A)
0.1
D
I
VGS = 10V
SINGLE PULSE
= 96oC/W
R
JA
θ
T
= 25oC
A
0.01
0.1 1 10 100
V
, DRAIN-SOURCE VOLTAGE (V )
DS
60
SINGLE PULSE
R
= 96oC/W
JA
θ
T
= 25oC
40
POWER (W)
20
A
0
0.01 0.1 1 10 100 1000
SINGLE PULSE TIME (SEC)
f = 1 MHz
V
= 0 V
GS
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
0.2
0.1
0.01
0.001
r(t), NORMALIZED EF F E C T I VE
TRANSIENT THERMAL RESISTANCE
0.0001
0.0001 0.001 0.01 0.1 1 10 100 300
0.1
0.05
0.01
0.02
Single Pulse
t , TIME (sec)
1
R (t) = r(t) * R
JA
θ
R =
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
A
Duty Cycle, D = t / t
96°C/W
JA
θ
1
JA
θ
2
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient themal response will change depending on the circuit board design.
FDD6680, Rev.B
Page 5
TO-252 Tape and Reel Data and Package Dimensions
D-PAK (TO-252) Packaging
Configuration: Figure 1.0
Packaging Description:
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC
ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS
TNR DATE
PT NUMBER
PEEL STRENGTH MIN ______________gms
MAX _____________ gms
ESD Label
F63TNR
Label
Antistatic Cover Tape
Static Dissipative
Embossed Carrier Tape
TO-252 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). This and some other options are further
described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in di ffe re nt siz es depe nd in g on the nu m ber of pa rts
shippe d.
D-PAK (TO-252) Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (k g)
Note/Comments
Standard
(no flow code)
TNR
2,500
13" Dia
359x359x57
5,000
0.300
1.200
F63TNR Label sample
LOT: CBVK741B019
FSID: FDD6680
D/C1: Z9942 QTY1: SPEC REV:
D/C2: QTY2: CPN:
QTY: 2500
SPEC:
N/F: F (F63TNR)3
TO-252 (D-PAK) Tape Leader and
Trailer Configuration: Figure 2.0
6680
FDD
F
Z9935
6680
FDD
F
Z9935
D-PAK (TO-252) Unit Orientation
359mm x 359mm x 57mm
Stand a r d In termedia t e bo x
F63TNR Label
6680
FDD
F
Z9935
ESD Label
6680
FDD
F
Z9935
Carrier Tape
Cover Tape
Trailer Tape
640mm minimum or
80 empty pockets
Components
Leader Tape
1680mm minimum or
210 empty pockets
July 1999, Rev. A
Page 6
TO-252 Tape and Reel Data and Package Dimensions
D-PAK (TO-252) Embossed Carrier
Tape Co nfi guratio n: Figure 3.0
T
K0
Wc
B0
P0
D0
E1
F
W
E2
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
Pkg ty pe
TO252
(24mm)
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
D-PAK (TO-252) Reel
Configuration: Figure 4.0
Dim A
max
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
6.90
10.50
16.0
1.55
1.5
1.75
14.25
+/-0.10
+/-0.10
+/-0.3
+/-0.05
+/-0.10
+/-0.10
7.50
min
+/-0.10
rotational and lateral movement requirements (see sketches A, B, and C).
10 deg maximum
B0
10 deg maximum component rotation
Sketch A (Side or Front Sectional View)
Component Rotation
W1 Measured at Hub
Dim N
A0
Sketch B (Top View)
Component Rotation
8.0
+/-0.1
Typical
component
cavity
center line
Typical
component
center line
Dim A
Max
Dim D
min
4.0
+/-0.1
2.65
0.30
+/-0.05
13.0
+/-0.3
0.9mm
maximum
+/-0.10
0.9mm
maximum
Sketch C (Top View)
Component lateral movement
B Min
Dim C
0.06
+/-0.02
Tape Size
164mm 13" Dia
Reel
Option
DETAIL AA
13" Diameter Option
See detail AA
W2 max Measured at Hub
W3
Dimensions are in inches and millimeters
Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
13.00
0.059
1.5
512 +0.020/- 0.008
13 +0.5/-0.2
330
0.795
20.2
4.00
100
0.646 +0.078/-0.000
16.4 +2/0
0.882
22.4
0.626 – 0.764
15.9 – 19.4
July 1999, Rev. A
Page 7
TO-252 Tape and Reel Data and Package Dimensions
TO-252 (FS PKG Code AA)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.300
September 1999, Rev. A
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
2
CMOS
E
TM
FACT™
FACT Quiet Series™
®
FAST
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
Formative or
In Design
First Production
Full Production
Not In Production
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D
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