Datasheet FDD6672A Datasheet (Fairchild Semiconductor)

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Page 1

FDD6672A

30V N-Channel PowerTrench MOSFET

May 2000

PRELIMINARY

General Description

This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low R

and fast switching speed.

DS( ON)

Applications

• DC/DC converter

Features

• 65 A, 30 V. R

• High performance trench technology for extremely

low R

DS(ON)

• Low gate charge (33 nC typical)

• High power and current handling capability

= 9.5 mΩ @ VGS = 4.5 V

DS(ON)

= 8 mΩ @ VGS = 10 V

DS(ON)

TO-252

Absolute Maximum Ratings T

=25oC unless otherwise noted

Symbol Parameter Ratings Units

DSS

GSS

TJ, T

STG

Drain-Source Voltage 30 V Gate-Source Voltage Drain Current – Continuous (Note 1a) 65 A

– Pulsed 100

Maximum Power Dissipation @ TC = 25°C (Note 1) @ TA = 25°C (Note 1a) @ TA = 25°C (Note 1b)

Operating and Storage Junction Temperature Range -55 to +150

±12

3.2

1.3

°C

Thermal Characteristics

θJC

θJA

Thermal Resistance, Junction-to-Case (Note 1) 1.8 Thermal Resistance, Junction-to-Ambient (Note 1b) 96

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

FDD6672A FDD6672A 13’’ 16mm 2500 units

2000 Fairchild Semiconductor Corporation

°C/W °C/W

FDD6672A Rev B(W)

Page 2

Electrical Characteristics T

FDD6672A

= 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics

DSS

∆BVDSS ∆T

DSS

GSSF

GSSR

Drain–Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient

VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C 20 mV/°C

30 V

Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA Gate–Body Leakage, Reverse VGS = –12 V VDS = 0 V –100 nA

On Characteristics (Note 2)

GS(th)

∆VGS(th) ∆T

DS(on)

D(on)

Gate Threshold Voltage Gate Threshold Voltage

Temperature Coefficient

Static Drain–Source On–Resistance

VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C

VGS = 4.5 V, ID = 13 A VGS = 4.5 V, ID = 13 A, TJ=125°C VGS = 10 V, ID = 14 A

0.8 1.2 2.0 V

-4 mV/°C

8.2

11.5

6.8

On–State Drain Current VGS = 10 V, VDS = 5 V 50 A Forward Transconductance VDS = 10 V, ID = 15 A 75 S

9.5 16

mΩ

Dynamic Characteristics

iss

oss

rss

Input Capacitance 5070 pF Output Capacitance 550 pF Reverse Transfer Capacitance

VDS = 15 V, V f = 1.0 MHz

= 0 V,

230 pF

Switching Characteristics (Note 2)

t t t t Q Q Q

d(on)

d(off)

Turn–On Delay Time 17 25 ns Turn–On Rise Time 18 25 ns Turn–Off Delay Time 69 100 ns Turn–Off Fall Time

Total Gate Charge 33 46 nC Gate–Source Charge 7.5 nC Gate–Drain Charge

VDD = 10 V, ID = 1 A, VGS = 4.5 V, R

GEN

= 6 Ω

VDS = 15 V, ID = 15 A, VGS = 4.5 V

29 42 ns

6.8 nC

Drain–Source Diode Characteristics and Maximum Ratings

Notes:

1. R

θJA

by design while R

Maximum Continuous Drain–Source Diode Forward Current 2.7 A Drain–Source Diode Forward

Voltage

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the drain tab. R

is determined by the user's board design.

θCA

VGS = 0 V, IS = 2.7 A (Note 2) 0.7 1.2 V

is guaranteed

θJC

µA

a) R

= 40oC/W when

θJA

mounted on a 1in2 pad of 2oz copper.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

b) R

= 96oC/W on a

θJA

minimum mounting pad.

FDD6672A Rev B(W)

Page 3

Typical Characteristics

2.0V

3.0V

DRAIN-SOURCE ON-RESISTANCE

3.0V

3.5V

4.0V

4.5V

DRAIN-SOURCE ON-RESISTANCE

-55oC

25oC

, REVERSE DRAIN CURRENT (A)

-55oC

FDD6672A

VGS = 4.5V

, DRAIN CURRENT (A)

3.5V

0 0.5 1 1.5

VDS, DRAIN-SOURCE VOLTAGE (V)

1.5

1.3

, NORMALIZED

1.1

DS(ON)

0.9 0 10 20 30 40 50 60

VGS = 2.5V

ID, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.8 ID = 15A

VGS = 10V

1.6

1.4

1.2

, NORMALIZED

DS(ON)

0.8

0.6

-50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC)

0.025

0.02

0.015

0.01

, ON-RESISTANCE (OHM)

0.005

DS(ON)

0 2 4 6 8 10

TA = 125oC

TA = 25oC

VGS, GATE TO SOURCE VOLTAGE (V)

ID = 6 A

Figure 3. On-Resistance Variation with

Temperature.

VDS = 5V

, DRAIN CURRENT (A)

0.5 1 1.5 2 2.5 3

TA = 125oC

VGS, GATE TO SOURCE VOLTAGE (V)

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

100

VGS = 0V

TA = 125oC

0.1

0.01

0.001 0 0.2 0.4 0.6 0.8 1 1.2 1.4

VSD, BODY DIODE FORWARD VOLTAGE (V)

25oC

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDD6672A Rev B(W)

Page 4

Typical Characteristics

10V

10s1s100ms

10ms

1ms

t1, TIME (sec)

r(t), NORMALIZED EFFECTIVE TRANSIENT

P(pk)

0.01

0.02

0.05

0.1

D = 0.5

FDD6672A

ID = 12.5A

, GATE-SOURCE VOLTAGE (V)

0 10 20 30 40

Qg, GATE CHARGE (nC)

VDS = 5V

15V

8000

6000

4000

CAPACITANCE (pF)

2000

RSS

0 5 10 15 20 25 30

VDS, DRAIN TO SOURCE VOLTAGE (V)

COSS

ISS

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

1000

RDS(ON) LIMIT

100

VGS = 4.5V

SINGLE PULSE

0.1

0.01

0.1 1 10 100

JA = 96

C/W

TA = 25oC

VDS, DRAIN-SOURCE VOLTAGE (V)

100

SINGLE PULSE

0.01 0.1 1 10 100 1000

t1, TIME (sec)

f = 1MHz VGS = 0 V

JA = 96 °C/W

TA = 25°C

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

JA(t) = r(t) +

0.2

0.1

JA = 96 °C/W

0.01

THERMAL RESISTANCE

SINGLE PULSE

TJ - TA = P * R

Duty Cycle, D = t1 / t2

0.001

0.0001 0.001 0.01 0.1 1 10 100 1000

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design.

FDD6672A Rev B(W)

JA(t)

Page 5

TO-252 Tape and Reel Data and Package Dimensions

D-PAK (TO-252) Packaging Configuration: Figure 1.0

Packaging Description:

ELECTROSTATIC

SENSITIVE DEVICES

DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS

TNR DATE PT NUMBER PEEL STRENGTH MIN ______________gms

MAX _____________ gms

ESD Label

F63TNR Label

Antistatic Cover Tape

Static Dissipative

Embossed Carrier Tape

TO-252 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). This and some other options are further described in the Packaging Information table.

These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in di ffe re nt siz es depe nd in g on the nu m ber of pa rts shippe d.

D-PAK (TO-252) Packaging Information

Packaging Option Packaging type

Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (k g)

Note/Comments

Standard

(no flow code)

TNR

2,500

13" Dia

359x359x57

5,000

0.300

1.200

F63TNR Label sample

LOT: CBVK741B019

FSID: FDD6680

D/C1: Z9942 QTY1: SPEC REV: D/C2: QTY2: CPN:

QTY: 2500

SPEC:

N/F: F (F63TNR)3

TO-252 (D-PAK) Tape Leader and Trailer Configuration: Figure 2.0

6680 FDD

Z9935

D-PAK (TO-252) Unit Orientation

359mm x 359mm x 57mm

Stand a r d In termediate bo x

6680 FDD

Z9935

ESD Label

F63TNR Label

6680 FDD

Z9935

6680 FDD

Z9935

Carrier Tape

Cover Tape

Trailer Tape 640mm minimum or 80 empty pockets

Components

Leader Tape 1680mm minimum or 210 empty pockets

July 1999, Rev. A

Page 6

TO-252 Tape and Reel Data and Package Dimensions

D-PAK (TO-252) Embossed Carrier Tape Co nfi guration: Figure 3.0

User Direction of Feed

Dimensions are in millimeter

Pkg ty pe

TO252

(24mm)

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

rotational and lateral movement requirements (see sketches A, B, and C).

D-PAK (TO-252) Reel Configuration: Figure 4.0

Dim A

max

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

6.90

10.50

16.0

1.55

1.5

1.75

14.25

+/-0.10

10 deg maximum component rotation

Sketch A (Side or Front Sectional View)

Component Rotation

+/-0.3

+/-0.05

+/-0.10

7.50

min

+/-0.10

10 deg maximum

Sketch B (Top View)

Component Rotation

W1 Measured at Hub

Dim N

8.0 +/-0.1

Typical component cavity center line

Typical component center line

Dim A

Max

Dim D

min

4.0 +/-0.1

2.65

0.30 +/-0.05

13.0 +/-0.3

0.9mm maximum

+/-0.10

0.9mm maximum

Sketch C (Top View)

Component lateral movement

B Min

Dim C

0.06 +/-0.02

Tape Size

164mm 13" Dia

Reel

Option

DETAIL AA

13" Diameter Option

See detail AA

W2 max Measured at Hub

Dimensions are in inches and millimeters

Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

13.00

0.059

1.5

512 +0.020/-0.008 13 +0.5/-0.2

330

0.795

20.2

4.00 100

0.646 +0.078/-0.000

16.4 +2/0

0.882

22.4

0.626 – 0.764

15.9 – 19.4

July 1999, Rev. A

Page 7

TO-252 Tape and Reel Data and Package Dimensions

TO-252 (FS PKG Code AA)

1:1

Scale 1:1 on letter size paper

Dimensions shown below are in:

inches [millimeters]

Part Weight per unit (gram): 0.300

September 1999, Rev. A

Page 8

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™

CMOS

FACT™ FACT Quiet Series™



FAST FASTr™ GTO™

HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench



QFET™ QS™

Quiet Series™ SuperSOT™-3 SuperSOT™-6

SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. E