Datasheet FDD6612A Datasheet (Fairchild)

Page 1

FDD6612A/FDU6612A

30V N-Channel PowerTrench MOSFET

February 2004

General Description

This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS( ON) , fast switching speed and extremely low R

in a small package.

DS(ON)

Features

• 30 A, 30 V R R

• Low gate charge

• Fast Switching

= 20 mΩ @ VGS = 10 V

DS(ON)

= 28 mΩ @ VGS = 4.5 V

DS(ON)

Applications

• DC/DC converter

• Motor Drives

• High performance trench technology for extremely

low R

DS(ON)

D-PAK

TO-252

(TO-252)

G D S

Absolute Maximum Ratings T

I-PAK

(TO-251AA)

=25oC unless otherwise noted

Symbol Parameter Ratings Units

DSS

GSS

TJ, T

STG

Drain-Source Voltage 30 V Gate-Source Voltage Continuous Drain Current @TC=25°C (Note 3) 30 A

@TA=25°C (Note 1a) 9.5 Pulsed (Note 1a) 60

Power Dissipation @TC=25°C (Note 1) 36

@TA=25°C (Note 1a) 2.8 @TA=25°C (Note 1b) 1.3

Operating and Storage Junction Temperature Range –55 to +175

±20

°C

Thermal Characteristics

θJC

θJA

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape width Quantity

FDD6612A FDD6612A D-PAK (TO-252) 13’’ 12mm 2500 units FDU6612A FDU6612A I-PAK (TO-251) Tube N/A 75

2004 Fairchild Semiconductor Corporation

Thermal Resistance, Junction-to-Case (Note 1) 3.9 Thermal Resistance, Junction-to-Ambient (Note 1a) 45 Thermal Resistance, Junction-to-Ambient (Note 1b) 96

°C/W °C/W °C/W

FDD6612A/FDU6612A Rev E(W)

Page 2

Electrical Characteristics T

FDD6612A/FDU6612A

= 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings (Note 2)

DSS

Drain-Source Avalanche Energy Single Pulse, VDD = 27 V, ID=10 A 51 mJ Drain-Source Avalanche Current 10 A

Off Characteristics

DSS

∆BVDSS ∆T

DSS

GSS

Drain–Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient

VGS = 0 V, ID = 250 µA ID = 250 µA,Referenced to 25°C

Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 Gate–Body Leakage

VGS = ±20 V, VDS = 0 V ±100

30 V

mV/°C

µA nA

On Characteristics (Note 2)

GS(th)

∆VGS(th) ∆T

DS(on)

Gate Threshold Voltage Gate Threshold Voltage

Temperature Coefficient

Static Drain–Source On–Resistance

VDS = VGS, ID = 250 µA ID = 250 µA,Referenced to 25°C

VGS = 10 V, ID = 9.5 A VGS = 4.5 V, ID = 8 A VGS = 10 V, ID = 9.5 A, TJ=125°C

1 2.0 3 V

–5.1

15 20 23

Forward Transconductance VDS = 5 V, ID = 9.5 A 28 S

20 28 33

mV/°C

mΩ

Dynamic Characteristics

iss

oss

rss

Input Capacitance 660 pF Output Capacitance 170 pF Reverse Transfer Capacitance

VDS = 15 V, V f = 1.0 MHz

= 0 V,

90 pF

Gate Resistance VGS = 15 Mv, f = 1.0 MHz 2.3

Ω

Switching Characteristics (Note 2)

t t t t Q Q Q

d(on)

d(off)

Turn–On Delay Time 9 18 ns Turn–On Rise Time 5 10 ns Turn–Off Delay Time 24 38 ns Turn–Off Fall Time

VDD = 15 V, ID = 1 A, VGS = 10 V, R

GEN

= 6 Ω

4 8 ns Total Gate Charge 6.7 9.4 nC Gate–Source Charge 2.1 nC Gate–Drain Charge

VDS = 15 V, ID = 9.5 A, VGS = 5 V

2.7 nC

FDD6612A/FDU6612A Rev. E(W)

Page 3

Electrical Characteristics T

FDD6612A/FDU6612A

= 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units Drain–Source Diode Characteristics and Maximum Ratings

trr Qrr

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

3. Maximum current is calculated as:

where PD is maximum power dissipation at TC = 25°C and R

Maximum Continuous Drain–Source Diode Forward Current 2.3 A Drain–Source Diode Forward

VGS = 0 V, IS = 2.3 A (Note 2) 0.8 1.2 V

Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge

is guaranteed by design while R

θJC

θCA

a) R

θJA

1in2 pad of 2 oz copper

DS(ON)

IF = 9.5 A, diF/dt = 100 A/µs 20 nS

10 nC

is determined by the user's board design.

= 45°C/W when mounted on a

is at T

DS(on)

and VGS = 10V. Package current limitation is 21A

J(max)

b) R

= 96°C/W when mounted

θJA

on a minimum pad.

FDD6612A/FDU6612A Rev. E(W)

Page 4

Typical Characteristics

3.0V

5.0V

4.5V

10V

FDD6612A/FDU6612A

VGS = 10V

6.0V

, DRAIN CURRENT (A)

0 1 2 3 4

VDS, DRAIN TO SOURCE VOLTAGE (V)

4.5V

4.0V

3.5V

VGS = 3.5V

1.8

1.6

1.4

, NORMALIZED

1.2

DS(ON)

DRAIN-SOURCE ON-RESISTANCE

0.8

4.0V

5.0V

6.0V

0 10 20 30 40

ID, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage

1.8

ID = 9.5A

1.6

VGS = 10V

1.4

1.2

, NORMALIZED

DS(ON)

0.8

DRAIN-SOURCE ON-RESISTANCE

0.6

-50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC)

0.06

0.05

0.04

0.03

, ON-RESISTANCE (OHM)

0.02

DS(ON)

0.01 2 4 6 8 10

TA = 25oC

VGS, GATE TO SOURCE VOLTAGE (V)

TA = 125oC

ID = 5 A

Figure 3. On-Resistance Variation

VDS = 5V

, DRAIN CURRENT (A)

1.5 2 2.5 3 3.5 4 4.5 5 5.5

Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation

withTemperature

TA = 125oC

25oC

-55oC

VGS, GATE TO SOURCE VOLTAGE (V)

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage

100

VGS = 0V

0.1

0.01

0.001

, REVERSE DRAIN CURRENT (A)

0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4

TA = 125oC

25oC

-55oC

VSD, BODY DIODE FORWARD VOLTAGE (V)

with Source Current and Temperature

FDD6612A/FDU6612A Rev. E(W)

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Typical Characteristics

100µs

P(pk)

0.01

0.02

0.05

0.1

FDD6612A/FDU6612A

ID = 9.5A

, GATE-SOURCE VOLTAGE (V)

0 2 4 6 8 10 12 14

Qg, GATE CHARGE (nC)

VDS = 10V

20V

15V

1000

800

600

400

CAPACITANCE (pF)

200

rss

0 5 10 15 20 25 30

oss

VDS, DRAIN TO SOURCE VOLTAGE (V)

iss

Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics

100

LIMIT

DS(ON)

, DRAIN CURRENT (A)

0.01

VGS = 10V

SINGLE PULSE

0.1

= 96oC/W

θJA

TA = 25oC

0.01 0.1 1 10 100

VDS, DRAIN-SOURCE VOLTAGE (V)

10s

100ms

10ms

1ms

P(pk), PEAK TRANSIENT POWER (W)

0.001 0.01 0.1 1 10 100

t1, TIME (sec)

f = 1 MHz VGS = 0 V

SINGLE PULSE

= 96oC/W

θJA

TA = 25oC

Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum

0.1

0.01

r(t), NORMALIZED EFFECTIVE

0.001

TRANSIENT THERMAL RESISTANCE

Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design.

Power Dissipation

D = 0.5

0.2

SINGLE PULSE

(t) = r(t) * R

θJA

TJ - TA = P * R

Duty Cycle, D = t1 / t

= 96oC/W

θJA

(t)

0.0001 0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec)

Figure 11. Transient Thermal Response Curve

FDD6612A/FDU6612A Rev. E(W)

Page 6

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ ActiveArray™ Bottomless™

FPS™

CoolFET™ CROSSVOL T™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™

Across the board. Around the world.™ The Power Franchise Programmable Active Droop™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE T O ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY , FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT

CONVEY ANY LICENSE UNDER ITS PA TENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY



FAST FASTr™

LittleFET™

FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™



ISOPLANAR™ MICROCOUPLER™

MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC



OPTOPLANAR™ P ACMAN™ POP™

Power247™ PowerSaver™ PowerTrench



QFET



QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART ST ART™ SPM™ Stealth™

SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET



VCX™



FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Formative or In Design

First Production

Full Production

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. I11