Datasheet FDD5N50U Datasheet (Fairchild)

tm

FDD5N50U N-Channel MOSFET, FRFET

FDD5N50U

N-Channel MOSFET, FRFET

500V, 3A, 2.0Ω

Features

•R

• Low gate charge ( Typ. 11nC)

• Low C

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

• RoHS compliant

= 1.65Ω ( Typ.)@ VGS = 10V, ID = 1.5A

DS(on)

( Typ. 5pF)

rss

G

S

D

D-PAK

Description

These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DOMS technology.

This advance technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutationmode. These devices are well suited for high efficient switched mode power supplies and active power factor correction.

December 2007

TM

Ultra FRFET

D

G

S

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

I

DM

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns

P

D

, T

T

J

STG

T

L

Drain to Source Voltage 500 V

Gate to Source Voltage ±30 V

Drain Current

Drain Current - Pulsed (Note 1) 12 A

Single Pulsed Avalanche Energy (Note 2) 275 mJ

Avalanche Current (Note 1) 3 A

Repetitive Avalanche Energy (Note 1) 4 mJ

Power Dissipation

Operating and Storage Temperature Range -55 to +150 Maximum Lead Temperature for Soldering Purpose,

1/8” from Case for 5 Seconds

= 25oC unless otherwise noted*

C

-Continuous (T

(T

= 25oC) 40 W

C

- Derate above 25

= 25oC) 3

C

= 100oC) 1.8

C

o

C0.3W/

300

o

Thermal Characteristics

Symbol Parameter Ratings Units

R

θJC

R

θJA

Thermal Resistance, Junction to Case 1.4

Thermal Resistance, Junction to Ambient 110

o

C/W

A

o

C

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FDD5N50U N-Channel MOSFET, FRFET

Package Marking and Ordering Information T

= 25oC unless otherwise noted

C

Device Marking Device Package Reel Size Tape Width Quantity

FDD5N50U FDD5N50UTM D-PAK 380mm 16mm 2500

FDD5N50U FDD5N50UTF D-PAK 380mm 16mm 2000

Electrical Characteristics

Symbol Parameter Test Conditions Min. Typ. Max. Units

Off Characteristics

BVDSS Drain to Source Breakdown Voltage I ∆BV

∆T

I

DSS

I

GSS

DSS

J

Breakdown Voltage Temperature Coefficient

Zero Gate Voltage Drain Current

Gate to Body Leakage Current VGS = ±30V, V

On Characteristics

V

GS(th)

R

DS(on)

g

FS

Gate Threshold Voltage VGS = VDS, ID = 250µA3-5V

Static Drain to Source On Resistance VGS = 10V, ID = 1.5A - 1.65 2 Ω

Forward Transconductance VDS = 20V, ID = 1.5A (Note 4) -4-S

Dynamic Characteristics

C

Q

iss

oss

rss

g(tot)

gs

gd

Input Capacitance

Output Capacitance - 65 90 pF

Reverse Transfer Capacitance - 5 8 pF

Total Gate Charge at 10V

Gate to Source Gate Charge - 3 - nC

Gate to Drain “Miller” Charge - 5 - nC

= 250µA, VGS = 0V, TJ = 25oC 500 - - V

D

I

= 250µA, Referenced to 25oC-0.6-V/

D

V

= 500V, V

DS

= 400V, TC = 125oC - - 250

V

DS

= 25V, VGS = 0V

V

DS

f = 1MHz

= 0V - - 25

GS

= 0V - - ±100 nA

DS

- 485 650 pF

-1115nC

V

= 400V, ID = 5A

DS

V

= 10V

GS

( Note 4 , 5)

µA

o

C

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Turn-On Delay Time

Turn-On Rise Time - 21 52 ns

Turn-Off Delay Time - 27 64 ns

Turn-Off Fall Time - 20 50 ns

Drain-Source Diode Characteristics

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1: Repetitive Rating: Pulse width limited by maximum junction temperature 2: L = 61mH, I

≤ 3A, di/dt ≤ 200A/µs, VDD ≤ BV

3: I

SD

4: Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2% 5: Essentially Independent of Operating Temperature Typical Characteristics

Maximum Continuous Drain to Source Diode Forward Current - - 3 A

Maximum Pulsed Drain to Source Diode Forward Current - - 12 A

Drain to Source Diode Forward Voltage V

Reverse Recovery Time

Reverse Recovery Charge - 33 - nC

= 3A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C

AS

, Starting TJ = 25°C

DSS

= 250V, ID = 5A

V

DD

R

= 25Ω

G

(N ote 4, 5)

= 0V, I

GS

V

= 0V, I

GS

dI

/dt = 100A/µs (Note 4)

F

= 3A - - 1.6 V

SD

= 5A

SD

-1438ns

-36-ns

FDD5N50U Rev. A

2

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Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

10

1

V

= 15.0V

GS

10.0V

8.0 V

7.0 V

6.5 V

6.0 V

5.5 V

10

150oC

25oC

1

FDD5N50U N-Channel MOSFET, FRFET

,Drain Current[A]

D

I

0.1

0.02

0.1 1 10

*Notes:

1. 250

2. T

VDS,Drain-Source Voltage[V]

µs Pulse Test

= 25oC

C

30

,Drain Current[A]

D

I

*Notes:

1. V

= 20V

DS

µs Pulse Test

0.1 45678

2. 250

VGS,Gate-Source Voltage[V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current

and Temperature

2.6

2.2

[Ω],

DS(ON)

R

1.8

Drain-Source On-Resistance

1.4 0 6 12 18

ID, Drain Current [A]

VGS = 10V

VGS = 20V

*Note: TJ = 25oC

30

10

150oC

25oC

, Reverse Drain Current [A]

S

I

1

0.4 1.0 1.6 2.2

VSD, Body Diode Forward Voltage [V]

*Notes:

1. VGS = 0V

µs Pulse Test

2. 250

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

1000

800

600

400

Capacitances [pF]

200

0

FDD5N50U Rev. A

C

= Cgs + Cgd (Cds = shorted)

iss

C

= Cds + C

oss

C

rss

= C

gd

*Note:

1. V

2. f = 1MHz

C

iss

C

oss

C

rss

0.1 1 10 VDS, Drain-Source Voltage [V]

GS

= 0V

10

VDS = 100V V

= 250V

8

V

DS

= 400V

DS

6

4

, Gate-Source Voltage [V]

GS

V

2

30

0

04812

*Note: ID = 5A

Qg, Total Gate Charge [nC]

3

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Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. Maximum Safe Operating Area vs. Temperature

1.2

1.1

1.0

, [Normalized]

DSS

BV

0.9

Drain-Source Breakdown Voltage

0.8

-75 -25 25 75 125 175

*Notes:

1. V

2. I

D

= 0V

GS

= 250µA

TJ, Junction Temperature [oC]

Figure 9. Maximum Drain Current vs. Case Temperature

3.5

20

10

1

, Drain Current [A]

D

I

0.01

Operation in This Area is Limited by R

0.1

1 10 100 1000

DS(on)

*Notes:

1. T

= 25oC

C

= 150oC

2. T

J

3. Singl e Pulse

VDS, Drain-Source Voltage [V]

40µs

100µs

1ms

10ms

DC

FDD5N50U N-Channel MOSFET, FRFET

3

2

, Drain Current [A]

1

D

I

0

25 50 75 100 125 150

TC, Case Temperature [oC]

Figure 10. Transient Thermal Response Curve

P

DM

*Notes:

1. Z

(t) = 1.4oC/W Max.

θJC

2. Duty Factor, D= t

3. TJM - TC = PDM * Z

-2

10

-1

10

]

θJC

0.1

Thermal Response [Z

0.01

0.005

3

1

0.5

0.2

0.1

0.05

0.02

0.01

Single pulse

-5

10

-4

10

-3

10

Rectangular Pulse Duration [sec]

t

1

t

2

1/t2

θJC

0

10

(t)

1

10

FDD5N50U Rev. A

4

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Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

FDD5N50U N-Channel MOSFET, FRFET

FDD5N50U Rev. A

Unclamped Inductive Switching Test Circuit & Waveforms

5

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Peak Diode Recovery dv/dt Test Circuit & Waveforms

g

p

g

p

+

V

DS

_

L

LL

Sam e Type

as DU T

• dv/dt controlled by R

•ISDcontrolled by pulse period

G

V

GS

R

Driver

G

DUT

I

SD

V

DD

FDD5N50U N-Channel MOSFET, FRFET

V

GS

( D riv e r )

I

SD

( D U T )

V

DS

( DUT )

G ate P ulse W idth

--------------------------

D =

Gate Pulse Period

IFM, B ody Diode Forw ard C urrent

I

RM

Body D iode R everse C urrent

Body D iode R ecovery dv/dt

V

SD

Body D iode

Forw ard Volta

e D ro

di/dt

10V

V

DD

FDD5N50U Rev. A

6

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Mechanical Dimensions

FDD5N50U N-Channel MOSFET, FRFET

D-PAK

FDD5N50U Rev. A

Dimensions in Millimeters

7

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TRADEMARKS

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®

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The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

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FDD5N50U N-Channel MOSFET, FRFET

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

in the labeling, can be reasonably expected to result in significant injury to the user.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In Design

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data; supplementary data will be pub-

Preliminary First Production

lished at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

No Identification Needed Full Production

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

This datasheet contains specifications on a product that has been discontin-

Obsolete Not In Production

ued by Fairchild semiconductor. The datasheet is printed for reference information only.

FDD5N50U Rev. A

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Rev. I32