Page 1
FDC6333C
G2
FDC6333C
30V N & P-Channel PowerTrench MOSFETs
October 2001
General Description
These N & P-Channel MOSFETs are produced using
Fairchild Semiconductor’s advanced PowerTrench
process that has been especially tailored to minimize
on-state resistance and yet maintain superior
switching performance.
These devices have been designed to offer
exceptional power dissipation in a very small footprint
for applications where the bigger more expensive
SO-8 and TSSOP-8 packages are impractical.
Applications
• DC/DC converter
• Load switch
Features
• Q1 2.5 A, 30V. R
• Q2 –2.0 A, 30V. R
• Low gate charge
• High performance trench technology for extremely
low R
DS(ON)
.
• SuperSOT –6 package: small footprint (72% smaller than
SO-8); low profile (1mm thick).
= 95 mΩ @ VGS = 10 V
DS(ON)
R
= 150 mΩ @ VGS = 4.5 V
DS(ON)
= 150 mΩ @ VGS = –10 V
DS(ON)
R
= 220 mΩ @ VGS = –4.5 V
DS(ON)
• LCD display inverter
D2
S1
D1
G1
S2
SuperSOT -6
TM
Pin 1
SuperSOT™-6
Absolute Maximum Ratings T
=25oC unless otherwise noted
A
4
5
6
Q2(P)
3
2
1
Q1(N)
Symbol Parameter Q1 Q2 Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage 30 –30 V
Gate-Source Voltage ±16 ±25 V
Drain Current – Continuous (Note 1a) 2.5 –2.0 A
– Pulsed 8 –8
Power Dissipation for Single Operation (Note 1a) 0.96
(Note 1b)
(Note 1c)
0.9
0.7
Operating and Storage Junction Temperature Range –55 to +150
W
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 130
Thermal Resistance, Junction-to-Case (Note 1) 60
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.333 FDC6333C 7’’ 8mm 3000 units
2001 Fairchild Semiconductor Corporation
°C/W
°C/W
FDC6333C Rev C (W)
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FDC6333C
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BVDSS
∆T
J
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VGS = 0 V, ID = 250 µA
VGS = 0 V, ID = –250 µA
ID = 250 µA,Ref. to 25°C
ID = –250 µA,Ref. to 25°C
VDS = 24 V, VGS = 0 V
VDS = –24 V, VGS = 0 V Q1Q2
VGS = 16 V, VDS = 0 V
VGS = 25 V, VDS = 0 V Q1Q2
VGS = –16 V, VDS = 0 V
VGS = –25 V, VDS = 0 V Q1Q2
Q1Q230
–30
Q1
Q2
27
–22
1
–1
100
100
–100
–100
V
mV/°C
µA
nA
nA
On Characteristics (Note 2)
V
GS(th)
∆VGS(th)
∆T
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
Forward Transconductance
VDS = VGS, ID = 250 µA
Q1
VDS = VGS, ID = –250 µA
Q2
ID = 250 µA,Ref. To 25°C
Q1
ID = –250 µA,Ref. to 25°C
Q2
VGS = 10 V, ID = 2.5 A
Q1
VGS = 4.5 V, ID = 2.0 A
VGS = 10 V, ID = 2.5 A,TJ=125°C
VGS = –10 V, ID = –2.0 A
Q2
VGS =– 4.5 V, ID = –1.7 A
VGS = 10 V, ID= –2.0 A,TJ=125°C
VGS = 10 V, VDS = 5 V
Q1
VGS = –10 V, VDS = –5 V
Q2
VDS = 5 V ID = 2.5 A
Q1
VDS = –5 V ID = –2.0A
Q2
1 1.8 3Gate Threshold Voltage
–1 –1.8 –3
4
–4
73
90
106
95
142
149
95
150
148
130
220
216
8On–State Drain Current
–8
7
3
V
mV/°C
mΩ
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Q1
Q2
Q1
Q2
Q1
Q2
VDS=15 V, V
VDS=–15 V, V
VDS=15 V, V
VDS=–15 V, V
VDS=15 V, V
VDS=–15 V, V
= 0 V, f=1.0MHz
GS
= 0 V, f=1.0MHz
GS
= 0 V, f=1.0MHz
GS
= 0 V, f=1.0MHz
GS
= 0 V, f=1.0MHz
GS
= 0 V, f=1.0MHz
GS
282
185
49Output Capacitance
56
20Reverse Transfer Capacitance
26
pF
pF
pF
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Q1
For Q1:
V
Q2
VGS= 10 V, R
Q1
Q2
For Q2:
V
Q1
VGS= –10 V, R
Q2
Q1
=15 V, I
DS
=–15 V, I
DS
DS
GEN
DS
GEN
= 1 A
= 6 Ω
= –1 A
= 6 Ω
Q2
g
gs
gd
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Q1
For Q1:
V
Q2
VGS= 10 V, R
Q1
For Q2:
Q2
V
Q1
VGS= –10 V,
=15 V, I
DS
=–15 V, I
DS
= 2.5 A
DS
GEN
= –2.0 A
DS
= 6 Ω
Q2
4.5 9
4.5 9
6 12
13 23
19 34
11 20
1.5 3
2 4
4.7 6.6
4.1 5.7
0.9
0.8
0.6
0.4
ns
ns
ns
ns
nC
nC
nC
FDC6333C Rev C (W)
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Electrical Characteristics T
FDC6333C
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current Q1
Q2
V
SD
Drain–Source Diode Forward
Voltage
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
VGS = 0 V, IS = 0.8 A (Note 2)
Q1
VGS = 0 V, IS = 0.8 A (Note 2)
Q2
0.8 1.2
0.8 –1.2
0.8
–0.8
A
V
a) 130 °C/W when
mounted on a 0.125
in2 pad of 2 oz.
copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
b) 140°/W when mounted
on a .004 in2 pad of 2 oz
copper
c) 180°/W when mounted on a
minimum pad.
FDC6333C Rev C (W)
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Typical Characteristics: N-Channel
I
D
, DRAIN CURRENT (A)
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
, DRAIN CURRENT (A)
I
S
, REVERSE DRAIN CURRENT (A)
FDC6333C
10
VGS = 10V
6.0V
8
6
4
2
0
0 1 2 3
4.5V
3.5V
3.0V
VDS, DRAIN-SOURCE VOLTAGE (V)
2
VGS = 3.0V
1.8
1.6
1.4
1.2
R
1
0.8
0 2 4 6 8 10
3.5V
4.0V
4.5V
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
ID = 2.5A
VGS = 10V
1.4
1.2
1
R
0.8
0.25
0.15
0.2
TA = 125oC
0.1
TA = 25oC
6.0V
10V
ID = 1.25A
0.6
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. On-Resistance Variation
withTemperature.
10
VDS =5V
8
6
4
2
0
1.5 2 2.5 3 3.5 4
VGS, GATE TO SOURCE VOLTAGE (V)
TA =-55oC
125oC
25oC
0.05
2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS = 0V
10
1
0.1
0.01
0.001
0.0001
0.2 0.4 0.6 0.8 1 1.2
TA = 125oC
25oC
-55oC
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC6333C Rev C (W)
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Typical Characteristics: N-Channel (continued)
V
, GATE-SOURCE VOLTAGE (V)
CAPACITANCE (pF)
I
D
, DRAIN CURRENT (A)
1s
1ms
P(pk), PEAK TRANSIENT POWER (W)
FDC6333C
10
ID = 2.5A
8
6
VDS = 5V
10V
15V
400
300
C
ISS
200
4
2
GS
0
0 1 2 3 4 5
Qg, GATE CHARGE (nC)
100
0
0 5 10 15 20 25 30
C
C
OSS
RSS
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
100
R
LIMIT
DS(ON)
10
1
VGS = 10V
SINGLE PULSE
0.1
R
= 180oC/W
θ
JA
TA = 25oC
0.01
0.1 1 10 100
VDS, DRAIN-SOURCE VOLTAGE (V)
10ms
100ms
DC
100µs
10µs
5
SINGLE PULSE
4
R
3
2
1
0
0.01 0.1 1 10 100 1000
t1, TIME (sec)
= 180°C/W
θJA
TA = 25°C
f = 1MHz
VGS = 0 V
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
FDC6333C Rev C (W)
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Typical Characteristics: P-Channel
-I
, DRAIN CURRENT (A)
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
R
DS(ON)
, ON-RESISTANCE (OHM)
-I
, DRAIN CURRENT (A)
-I
, REVERSE DRAIN CURRENT (A)
FDC6333C
10
VGS = -10V
8
6
4
D
2
0
0 1 2 3 4 5
-6.0V
-4.5V
-4.0V
-3.5V
-VDS, DRAIN-SOURCE VOLTAGE (V)
3
VGS = -3.5V
2.5
2
1.5
R
1
0.5
0 2 4 6 8 10
-4.0V
-4.5V
-5.0V
-ID, DRAIN CURRENT (A)
-6.0V
Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
ID = -2A
VGS =-10V
1.4
1.2
1
R
0.8
0.6
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
0.4
0.3
TA = 125oC
0.2
0.1
0
2 4 6 8 10
TA = 25oC
-VGS, GATE TO SOURCE VOLTAGE (V)
-10V
ID = -1A
Figure 13. On-Resistance Variation
withTemperature.
5
VDS = -5V
4
3
2
D
1
0
1.5 2.5 3.5 4.5
-VGS, GATE TO SOURCE VOLTAGE (V)
TA = -55oC
25oC
125oC
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
10
VGS = 0V
1
TA = 125oC
0.1
25oC
0.01
0.001
S
0.0001
0 0.2 0.4 0.6 0.8 1 1.2 1.4
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-55oC
Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC6333C Rev C (W)
Page 7
Typical Characteristics: P-Channel (continued)
-V
, GATE-SOURCE VOLTAGE (V)
CAPACITANCE (pF)
I
D
, DRAIN CURRENT (A)
1ms
P(pk), PEAK TRANSIENT POWER (W)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
P(pk)
SINGLE PULSE
FDC6333C
10
ID = -2.0A
8
6
4
2
GS
0
0 1 2 3 4 5
Qg, GATE CHARGE (nC)
VDS = -5V
-15V
-10V
300
250
200
150
100
50
C
RSS
0
0 5 10 15 20 25 30
C
ISS
C
OSS
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 17. Gate Charge Characteristics. Figure 18. Capacitance Characteristics.
100
R
LIMIT
DS(ON)
10
1
VGS = 10V
SINGLE PULSE
0.1
R
= 180oC/W
θ
JA
TA = 25oC
0.01
0.1 1 10 100
VDS, DRAIN-SOURCE VOLTAGE (V)
10ms
100ms
1s
DC
100µs
10µs
5
SINGLE PULSE
R
4
3
2
1
0
0.01 0.1 1 10 100 1000
t1, TIME (sec)
θJA
TA = 25°C
f = 1MHz
VGS = 0 V
= 180°C/W
Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum
Power Dissipation.
1
0.1
0.01
D = 0.5
0.2
0.1
0.05
0.02
0.01
R
(t) = r(t) + R
θJA
R
= 180°C/W
θ
JA
t
1
t
2
TJ - TA = P * R
Duty Cycle, D = t1 / t
0.001
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDC6333C Rev C (W)
θJA
(t)
θJA
2
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOS
EnSigna
TM
TM
FACT™
FACT Quiet Series™
STAR*POWER is used under license
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or
In Design
First Production
Full Production
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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